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- #ifndef _SAML11_GCLK_COMPONENT_H_
- #define _SAML11_GCLK_COMPONENT_H_
- #define _SAML11_GCLK_COMPONENT_
- #define GCLK_U2122
- #define REV_GCLK 0x112
- #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
- typedef union {
- struct {
- uint8_t SWRST:1;
- uint8_t :7;
- } bit;
- uint8_t reg;
- } GCLK_CTRLA_Type;
- #endif
- #define GCLK_CTRLA_OFFSET (0x00)
- #define GCLK_CTRLA_RESETVALUE _U_(0x00)
- #define GCLK_CTRLA_SWRST_Pos 0
- #define GCLK_CTRLA_SWRST_Msk (_U_(0x1) << GCLK_CTRLA_SWRST_Pos)
- #define GCLK_CTRLA_SWRST GCLK_CTRLA_SWRST_Msk
- #define GCLK_CTRLA_MASK _U_(0x01)
- #define GCLK_CTRLA_Msk _U_(0x01)
- #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
- typedef union {
- struct {
- uint32_t SWRST:1;
- uint32_t :1;
- uint32_t GENCTRL0:1;
- uint32_t GENCTRL1:1;
- uint32_t GENCTRL2:1;
- uint32_t GENCTRL3:1;
- uint32_t GENCTRL4:1;
- uint32_t :25;
- } bit;
- struct {
- uint32_t :2;
- uint32_t GENCTRL:5;
- uint32_t :25;
- } vec;
- uint32_t reg;
- } GCLK_SYNCBUSY_Type;
- #endif
- #define GCLK_SYNCBUSY_OFFSET (0x04)
- #define GCLK_SYNCBUSY_RESETVALUE _U_(0x00)
- #define GCLK_SYNCBUSY_SWRST_Pos 0
- #define GCLK_SYNCBUSY_SWRST_Msk (_U_(0x1) << GCLK_SYNCBUSY_SWRST_Pos)
- #define GCLK_SYNCBUSY_SWRST GCLK_SYNCBUSY_SWRST_Msk
- #define GCLK_SYNCBUSY_GENCTRL0_Pos 2
- #define GCLK_SYNCBUSY_GENCTRL0_Msk (_U_(0x1) << GCLK_SYNCBUSY_GENCTRL0_Pos)
- #define GCLK_SYNCBUSY_GENCTRL0 GCLK_SYNCBUSY_GENCTRL0_Msk
- #define GCLK_SYNCBUSY_GENCTRL1_Pos 3
- #define GCLK_SYNCBUSY_GENCTRL1_Msk (_U_(0x1) << GCLK_SYNCBUSY_GENCTRL1_Pos)
- #define GCLK_SYNCBUSY_GENCTRL1 GCLK_SYNCBUSY_GENCTRL1_Msk
- #define GCLK_SYNCBUSY_GENCTRL2_Pos 4
- #define GCLK_SYNCBUSY_GENCTRL2_Msk (_U_(0x1) << GCLK_SYNCBUSY_GENCTRL2_Pos)
- #define GCLK_SYNCBUSY_GENCTRL2 GCLK_SYNCBUSY_GENCTRL2_Msk
- #define GCLK_SYNCBUSY_GENCTRL3_Pos 5
- #define GCLK_SYNCBUSY_GENCTRL3_Msk (_U_(0x1) << GCLK_SYNCBUSY_GENCTRL3_Pos)
- #define GCLK_SYNCBUSY_GENCTRL3 GCLK_SYNCBUSY_GENCTRL3_Msk
- #define GCLK_SYNCBUSY_GENCTRL4_Pos 6
- #define GCLK_SYNCBUSY_GENCTRL4_Msk (_U_(0x1) << GCLK_SYNCBUSY_GENCTRL4_Pos)
- #define GCLK_SYNCBUSY_GENCTRL4 GCLK_SYNCBUSY_GENCTRL4_Msk
- #define GCLK_SYNCBUSY_MASK _U_(0x7D)
- #define GCLK_SYNCBUSY_Msk _U_(0x7D)
- #define GCLK_SYNCBUSY_GENCTRL_Pos 2
- #define GCLK_SYNCBUSY_GENCTRL_Msk (_U_(0x1F) << GCLK_SYNCBUSY_GENCTRL_Pos)
- #define GCLK_SYNCBUSY_GENCTRL(value) (GCLK_SYNCBUSY_GENCTRL_Msk & ((value) << GCLK_SYNCBUSY_GENCTRL_Pos))
- #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
- typedef union {
- struct {
- uint32_t SRC:3;
- uint32_t :5;
- uint32_t GENEN:1;
- uint32_t IDC:1;
- uint32_t OOV:1;
- uint32_t OE:1;
- uint32_t DIVSEL:1;
- uint32_t RUNSTDBY:1;
- uint32_t :2;
- uint32_t DIV:16;
- } bit;
- uint32_t reg;
- } GCLK_GENCTRL_Type;
- #endif
- #define GCLK_GENCTRL_OFFSET (0x20)
- #define GCLK_GENCTRL_RESETVALUE _U_(0x00)
- #define GCLK_GENCTRL_SRC_Pos 0
- #define GCLK_GENCTRL_SRC_Msk (_U_(0x7) << GCLK_GENCTRL_SRC_Pos)
- #define GCLK_GENCTRL_SRC(value) (GCLK_GENCTRL_SRC_Msk & ((value) << GCLK_GENCTRL_SRC_Pos))
- #define GCLK_GENCTRL_SRC_XOSC_Val _U_(0x0)
- #define GCLK_GENCTRL_SRC_GCLKIN_Val _U_(0x1)
- #define GCLK_GENCTRL_SRC_GCLKGEN1_Val _U_(0x2)
- #define GCLK_GENCTRL_SRC_OSCULP32K_Val _U_(0x3)
- #define GCLK_GENCTRL_SRC_XOSC32K_Val _U_(0x4)
- #define GCLK_GENCTRL_SRC_OSC16M_Val _U_(0x5)
- #define GCLK_GENCTRL_SRC_DFLLULP_Val _U_(0x6)
- #define GCLK_GENCTRL_SRC_FDPLL96M_Val _U_(0x7)
- #define GCLK_GENCTRL_SRC_XOSC (GCLK_GENCTRL_SRC_XOSC_Val << GCLK_GENCTRL_SRC_Pos)
- #define GCLK_GENCTRL_SRC_GCLKIN (GCLK_GENCTRL_SRC_GCLKIN_Val << GCLK_GENCTRL_SRC_Pos)
- #define GCLK_GENCTRL_SRC_GCLKGEN1 (GCLK_GENCTRL_SRC_GCLKGEN1_Val << GCLK_GENCTRL_SRC_Pos)
- #define GCLK_GENCTRL_SRC_OSCULP32K (GCLK_GENCTRL_SRC_OSCULP32K_Val << GCLK_GENCTRL_SRC_Pos)
- #define GCLK_GENCTRL_SRC_XOSC32K (GCLK_GENCTRL_SRC_XOSC32K_Val << GCLK_GENCTRL_SRC_Pos)
- #define GCLK_GENCTRL_SRC_OSC16M (GCLK_GENCTRL_SRC_OSC16M_Val << GCLK_GENCTRL_SRC_Pos)
- #define GCLK_GENCTRL_SRC_DFLLULP (GCLK_GENCTRL_SRC_DFLLULP_Val << GCLK_GENCTRL_SRC_Pos)
- #define GCLK_GENCTRL_SRC_FDPLL96M (GCLK_GENCTRL_SRC_FDPLL96M_Val << GCLK_GENCTRL_SRC_Pos)
- #define GCLK_GENCTRL_GENEN_Pos 8
- #define GCLK_GENCTRL_GENEN_Msk (_U_(0x1) << GCLK_GENCTRL_GENEN_Pos)
- #define GCLK_GENCTRL_GENEN GCLK_GENCTRL_GENEN_Msk
- #define GCLK_GENCTRL_IDC_Pos 9
- #define GCLK_GENCTRL_IDC_Msk (_U_(0x1) << GCLK_GENCTRL_IDC_Pos)
- #define GCLK_GENCTRL_IDC GCLK_GENCTRL_IDC_Msk
- #define GCLK_GENCTRL_OOV_Pos 10
- #define GCLK_GENCTRL_OOV_Msk (_U_(0x1) << GCLK_GENCTRL_OOV_Pos)
- #define GCLK_GENCTRL_OOV GCLK_GENCTRL_OOV_Msk
- #define GCLK_GENCTRL_OE_Pos 11
- #define GCLK_GENCTRL_OE_Msk (_U_(0x1) << GCLK_GENCTRL_OE_Pos)
- #define GCLK_GENCTRL_OE GCLK_GENCTRL_OE_Msk
- #define GCLK_GENCTRL_DIVSEL_Pos 12
- #define GCLK_GENCTRL_DIVSEL_Msk (_U_(0x1) << GCLK_GENCTRL_DIVSEL_Pos)
- #define GCLK_GENCTRL_DIVSEL GCLK_GENCTRL_DIVSEL_Msk
- #define GCLK_GENCTRL_RUNSTDBY_Pos 13
- #define GCLK_GENCTRL_RUNSTDBY_Msk (_U_(0x1) << GCLK_GENCTRL_RUNSTDBY_Pos)
- #define GCLK_GENCTRL_RUNSTDBY GCLK_GENCTRL_RUNSTDBY_Msk
- #define GCLK_GENCTRL_DIV_Pos 16
- #define GCLK_GENCTRL_DIV_Msk (_U_(0xFFFF) << GCLK_GENCTRL_DIV_Pos)
- #define GCLK_GENCTRL_DIV(value) (GCLK_GENCTRL_DIV_Msk & ((value) << GCLK_GENCTRL_DIV_Pos))
- #define GCLK_GENCTRL_MASK _U_(0xFFFF3F07)
- #define GCLK_GENCTRL_Msk _U_(0xFFFF3F07)
- #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
- typedef union {
- struct {
- uint32_t GEN:3;
- uint32_t :3;
- uint32_t CHEN:1;
- uint32_t WRTLOCK:1;
- uint32_t :24;
- } bit;
- uint32_t reg;
- } GCLK_PCHCTRL_Type;
- #endif
- #define GCLK_PCHCTRL_OFFSET (0x80)
- #define GCLK_PCHCTRL_RESETVALUE _U_(0x00)
- #define GCLK_PCHCTRL_GEN_Pos 0
- #define GCLK_PCHCTRL_GEN_Msk (_U_(0x7) << GCLK_PCHCTRL_GEN_Pos)
- #define GCLK_PCHCTRL_GEN(value) (GCLK_PCHCTRL_GEN_Msk & ((value) << GCLK_PCHCTRL_GEN_Pos))
- #define GCLK_PCHCTRL_GEN_GCLK0_Val _U_(0x0)
- #define GCLK_PCHCTRL_GEN_GCLK1_Val _U_(0x1)
- #define GCLK_PCHCTRL_GEN_GCLK2_Val _U_(0x2)
- #define GCLK_PCHCTRL_GEN_GCLK3_Val _U_(0x3)
- #define GCLK_PCHCTRL_GEN_GCLK4_Val _U_(0x4)
- #define GCLK_PCHCTRL_GEN_GCLK0 (GCLK_PCHCTRL_GEN_GCLK0_Val << GCLK_PCHCTRL_GEN_Pos)
- #define GCLK_PCHCTRL_GEN_GCLK1 (GCLK_PCHCTRL_GEN_GCLK1_Val << GCLK_PCHCTRL_GEN_Pos)
- #define GCLK_PCHCTRL_GEN_GCLK2 (GCLK_PCHCTRL_GEN_GCLK2_Val << GCLK_PCHCTRL_GEN_Pos)
- #define GCLK_PCHCTRL_GEN_GCLK3 (GCLK_PCHCTRL_GEN_GCLK3_Val << GCLK_PCHCTRL_GEN_Pos)
- #define GCLK_PCHCTRL_GEN_GCLK4 (GCLK_PCHCTRL_GEN_GCLK4_Val << GCLK_PCHCTRL_GEN_Pos)
- #define GCLK_PCHCTRL_CHEN_Pos 6
- #define GCLK_PCHCTRL_CHEN_Msk (_U_(0x1) << GCLK_PCHCTRL_CHEN_Pos)
- #define GCLK_PCHCTRL_CHEN GCLK_PCHCTRL_CHEN_Msk
- #define GCLK_PCHCTRL_WRTLOCK_Pos 7
- #define GCLK_PCHCTRL_WRTLOCK_Msk (_U_(0x1) << GCLK_PCHCTRL_WRTLOCK_Pos)
- #define GCLK_PCHCTRL_WRTLOCK GCLK_PCHCTRL_WRTLOCK_Msk
- #define GCLK_PCHCTRL_MASK _U_(0xC7)
- #define GCLK_PCHCTRL_Msk _U_(0xC7)
- #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
- typedef struct {
- __IO GCLK_CTRLA_Type CTRLA;
- __I uint8_t Reserved1[3];
- __I GCLK_SYNCBUSY_Type SYNCBUSY;
- __I uint8_t Reserved2[24];
- __IO GCLK_GENCTRL_Type GENCTRL[5];
- __I uint8_t Reserved3[76];
- __IO GCLK_PCHCTRL_Type PCHCTRL[21];
- } Gclk;
- #endif
- #endif
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