evsys.h 96 KB

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  1. /**
  2. * \file
  3. *
  4. * \brief Component description for EVSYS
  5. *
  6. * Copyright (c) 2018 Microchip Technology Inc.
  7. *
  8. * \license_start
  9. *
  10. * \page License
  11. *
  12. * SPDX-License-Identifier: Apache-2.0
  13. *
  14. * Licensed under the Apache License, Version 2.0 (the "License");
  15. * you may not use this file except in compliance with the License.
  16. * You may obtain a copy of the License at
  17. *
  18. * http://www.apache.org/licenses/LICENSE-2.0
  19. *
  20. * Unless required by applicable law or agreed to in writing, software
  21. * distributed under the License is distributed on an "AS IS" BASIS,
  22. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  23. * See the License for the specific language governing permissions and
  24. * limitations under the License.
  25. *
  26. * \license_stop
  27. *
  28. */
  29. /* file generated from device description version 2018-05-30T11:07:17Z */
  30. #ifndef _SAML11_EVSYS_COMPONENT_H_
  31. #define _SAML11_EVSYS_COMPONENT_H_
  32. #define _SAML11_EVSYS_COMPONENT_ /**< \deprecated Backward compatibility for ASF */
  33. /** \addtogroup SAML_SAML11 Event System Interface
  34. * @{
  35. */
  36. /* ========================================================================== */
  37. /** SOFTWARE API DEFINITION FOR EVSYS */
  38. /* ========================================================================== */
  39. #define EVSYS_U2504 /**< (EVSYS) Module ID */
  40. #define REV_EVSYS 0x200 /**< (EVSYS) Module revision */
  41. /* -------- EVSYS_CHANNEL : (EVSYS Offset: 0x00) (R/W 32) Channel n Control -------- */
  42. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  43. typedef union {
  44. struct {
  45. uint32_t EVGEN:6; /**< bit: 0..5 Event Generator Selection */
  46. uint32_t :2; /**< bit: 6..7 Reserved */
  47. uint32_t PATH:2; /**< bit: 8..9 Path Selection */
  48. uint32_t EDGSEL:2; /**< bit: 10..11 Edge Detection Selection */
  49. uint32_t :2; /**< bit: 12..13 Reserved */
  50. uint32_t RUNSTDBY:1; /**< bit: 14 Run in standby */
  51. uint32_t ONDEMAND:1; /**< bit: 15 Generic Clock On Demand */
  52. uint32_t :16; /**< bit: 16..31 Reserved */
  53. } bit; /**< Structure used for bit access */
  54. uint32_t reg; /**< Type used for register access */
  55. } EVSYS_CHANNEL_Type;
  56. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  57. #define EVSYS_CHANNEL_OFFSET (0x00) /**< (EVSYS_CHANNEL) Channel n Control Offset */
  58. #define EVSYS_CHANNEL_RESETVALUE _U_(0x8000) /**< (EVSYS_CHANNEL) Channel n Control Reset Value */
  59. #define EVSYS_CHANNEL_EVGEN_Pos 0 /**< (EVSYS_CHANNEL) Event Generator Selection Position */
  60. #define EVSYS_CHANNEL_EVGEN_Msk (_U_(0x3F) << EVSYS_CHANNEL_EVGEN_Pos) /**< (EVSYS_CHANNEL) Event Generator Selection Mask */
  61. #define EVSYS_CHANNEL_EVGEN(value) (EVSYS_CHANNEL_EVGEN_Msk & ((value) << EVSYS_CHANNEL_EVGEN_Pos))
  62. #define EVSYS_CHANNEL_PATH_Pos 8 /**< (EVSYS_CHANNEL) Path Selection Position */
  63. #define EVSYS_CHANNEL_PATH_Msk (_U_(0x3) << EVSYS_CHANNEL_PATH_Pos) /**< (EVSYS_CHANNEL) Path Selection Mask */
  64. #define EVSYS_CHANNEL_PATH(value) (EVSYS_CHANNEL_PATH_Msk & ((value) << EVSYS_CHANNEL_PATH_Pos))
  65. #define EVSYS_CHANNEL_PATH_SYNCHRONOUS_Val _U_(0x0) /**< (EVSYS_CHANNEL) Synchronous path */
  66. #define EVSYS_CHANNEL_PATH_RESYNCHRONIZED_Val _U_(0x1) /**< (EVSYS_CHANNEL) Resynchronized path */
  67. #define EVSYS_CHANNEL_PATH_ASYNCHRONOUS_Val _U_(0x2) /**< (EVSYS_CHANNEL) Asynchronous path */
  68. #define EVSYS_CHANNEL_PATH_SYNCHRONOUS (EVSYS_CHANNEL_PATH_SYNCHRONOUS_Val << EVSYS_CHANNEL_PATH_Pos) /**< (EVSYS_CHANNEL) Synchronous path Position */
  69. #define EVSYS_CHANNEL_PATH_RESYNCHRONIZED (EVSYS_CHANNEL_PATH_RESYNCHRONIZED_Val << EVSYS_CHANNEL_PATH_Pos) /**< (EVSYS_CHANNEL) Resynchronized path Position */
  70. #define EVSYS_CHANNEL_PATH_ASYNCHRONOUS (EVSYS_CHANNEL_PATH_ASYNCHRONOUS_Val << EVSYS_CHANNEL_PATH_Pos) /**< (EVSYS_CHANNEL) Asynchronous path Position */
  71. #define EVSYS_CHANNEL_EDGSEL_Pos 10 /**< (EVSYS_CHANNEL) Edge Detection Selection Position */
  72. #define EVSYS_CHANNEL_EDGSEL_Msk (_U_(0x3) << EVSYS_CHANNEL_EDGSEL_Pos) /**< (EVSYS_CHANNEL) Edge Detection Selection Mask */
  73. #define EVSYS_CHANNEL_EDGSEL(value) (EVSYS_CHANNEL_EDGSEL_Msk & ((value) << EVSYS_CHANNEL_EDGSEL_Pos))
  74. #define EVSYS_CHANNEL_EDGSEL_NO_EVT_OUTPUT_Val _U_(0x0) /**< (EVSYS_CHANNEL) No event output when using the resynchronized or synchronous path */
  75. #define EVSYS_CHANNEL_EDGSEL_RISING_EDGE_Val _U_(0x1) /**< (EVSYS_CHANNEL) Event detection only on the rising edge of the signal from the event generator when using the resynchronized or synchronous path */
  76. #define EVSYS_CHANNEL_EDGSEL_FALLING_EDGE_Val _U_(0x2) /**< (EVSYS_CHANNEL) Event detection only on the falling edge of the signal from the event generator when using the resynchronized or synchronous path */
  77. #define EVSYS_CHANNEL_EDGSEL_BOTH_EDGES_Val _U_(0x3) /**< (EVSYS_CHANNEL) Event detection on rising and falling edges of the signal from the event generator when using the resynchronized or synchronous path */
  78. #define EVSYS_CHANNEL_EDGSEL_NO_EVT_OUTPUT (EVSYS_CHANNEL_EDGSEL_NO_EVT_OUTPUT_Val << EVSYS_CHANNEL_EDGSEL_Pos) /**< (EVSYS_CHANNEL) No event output when using the resynchronized or synchronous path Position */
  79. #define EVSYS_CHANNEL_EDGSEL_RISING_EDGE (EVSYS_CHANNEL_EDGSEL_RISING_EDGE_Val << EVSYS_CHANNEL_EDGSEL_Pos) /**< (EVSYS_CHANNEL) Event detection only on the rising edge of the signal from the event generator when using the resynchronized or synchronous path Position */
  80. #define EVSYS_CHANNEL_EDGSEL_FALLING_EDGE (EVSYS_CHANNEL_EDGSEL_FALLING_EDGE_Val << EVSYS_CHANNEL_EDGSEL_Pos) /**< (EVSYS_CHANNEL) Event detection only on the falling edge of the signal from the event generator when using the resynchronized or synchronous path Position */
  81. #define EVSYS_CHANNEL_EDGSEL_BOTH_EDGES (EVSYS_CHANNEL_EDGSEL_BOTH_EDGES_Val << EVSYS_CHANNEL_EDGSEL_Pos) /**< (EVSYS_CHANNEL) Event detection on rising and falling edges of the signal from the event generator when using the resynchronized or synchronous path Position */
  82. #define EVSYS_CHANNEL_RUNSTDBY_Pos 14 /**< (EVSYS_CHANNEL) Run in standby Position */
  83. #define EVSYS_CHANNEL_RUNSTDBY_Msk (_U_(0x1) << EVSYS_CHANNEL_RUNSTDBY_Pos) /**< (EVSYS_CHANNEL) Run in standby Mask */
  84. #define EVSYS_CHANNEL_RUNSTDBY EVSYS_CHANNEL_RUNSTDBY_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_CHANNEL_RUNSTDBY_Msk instead */
  85. #define EVSYS_CHANNEL_ONDEMAND_Pos 15 /**< (EVSYS_CHANNEL) Generic Clock On Demand Position */
  86. #define EVSYS_CHANNEL_ONDEMAND_Msk (_U_(0x1) << EVSYS_CHANNEL_ONDEMAND_Pos) /**< (EVSYS_CHANNEL) Generic Clock On Demand Mask */
  87. #define EVSYS_CHANNEL_ONDEMAND EVSYS_CHANNEL_ONDEMAND_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_CHANNEL_ONDEMAND_Msk instead */
  88. #define EVSYS_CHANNEL_MASK _U_(0xCF3F) /**< \deprecated (EVSYS_CHANNEL) Register MASK (Use EVSYS_CHANNEL_Msk instead) */
  89. #define EVSYS_CHANNEL_Msk _U_(0xCF3F) /**< (EVSYS_CHANNEL) Register Mask */
  90. /* -------- EVSYS_CHINTENCLR : (EVSYS Offset: 0x04) (R/W 8) Channel n Interrupt Enable Clear -------- */
  91. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  92. typedef union {
  93. struct {
  94. uint8_t OVR:1; /**< bit: 0 Channel Overrun Interrupt Disable */
  95. uint8_t EVD:1; /**< bit: 1 Channel Event Detected Interrupt Disable */
  96. uint8_t :6; /**< bit: 2..7 Reserved */
  97. } bit; /**< Structure used for bit access */
  98. uint8_t reg; /**< Type used for register access */
  99. } EVSYS_CHINTENCLR_Type;
  100. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  101. #define EVSYS_CHINTENCLR_OFFSET (0x04) /**< (EVSYS_CHINTENCLR) Channel n Interrupt Enable Clear Offset */
  102. #define EVSYS_CHINTENCLR_RESETVALUE _U_(0x00) /**< (EVSYS_CHINTENCLR) Channel n Interrupt Enable Clear Reset Value */
  103. #define EVSYS_CHINTENCLR_OVR_Pos 0 /**< (EVSYS_CHINTENCLR) Channel Overrun Interrupt Disable Position */
  104. #define EVSYS_CHINTENCLR_OVR_Msk (_U_(0x1) << EVSYS_CHINTENCLR_OVR_Pos) /**< (EVSYS_CHINTENCLR) Channel Overrun Interrupt Disable Mask */
  105. #define EVSYS_CHINTENCLR_OVR EVSYS_CHINTENCLR_OVR_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_CHINTENCLR_OVR_Msk instead */
  106. #define EVSYS_CHINTENCLR_EVD_Pos 1 /**< (EVSYS_CHINTENCLR) Channel Event Detected Interrupt Disable Position */
  107. #define EVSYS_CHINTENCLR_EVD_Msk (_U_(0x1) << EVSYS_CHINTENCLR_EVD_Pos) /**< (EVSYS_CHINTENCLR) Channel Event Detected Interrupt Disable Mask */
  108. #define EVSYS_CHINTENCLR_EVD EVSYS_CHINTENCLR_EVD_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_CHINTENCLR_EVD_Msk instead */
  109. #define EVSYS_CHINTENCLR_MASK _U_(0x03) /**< \deprecated (EVSYS_CHINTENCLR) Register MASK (Use EVSYS_CHINTENCLR_Msk instead) */
  110. #define EVSYS_CHINTENCLR_Msk _U_(0x03) /**< (EVSYS_CHINTENCLR) Register Mask */
  111. /* -------- EVSYS_CHINTENSET : (EVSYS Offset: 0x05) (R/W 8) Channel n Interrupt Enable Set -------- */
  112. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  113. typedef union {
  114. struct {
  115. uint8_t OVR:1; /**< bit: 0 Channel Overrun Interrupt Enable */
  116. uint8_t EVD:1; /**< bit: 1 Channel Event Detected Interrupt Enable */
  117. uint8_t :6; /**< bit: 2..7 Reserved */
  118. } bit; /**< Structure used for bit access */
  119. uint8_t reg; /**< Type used for register access */
  120. } EVSYS_CHINTENSET_Type;
  121. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  122. #define EVSYS_CHINTENSET_OFFSET (0x05) /**< (EVSYS_CHINTENSET) Channel n Interrupt Enable Set Offset */
  123. #define EVSYS_CHINTENSET_RESETVALUE _U_(0x00) /**< (EVSYS_CHINTENSET) Channel n Interrupt Enable Set Reset Value */
  124. #define EVSYS_CHINTENSET_OVR_Pos 0 /**< (EVSYS_CHINTENSET) Channel Overrun Interrupt Enable Position */
  125. #define EVSYS_CHINTENSET_OVR_Msk (_U_(0x1) << EVSYS_CHINTENSET_OVR_Pos) /**< (EVSYS_CHINTENSET) Channel Overrun Interrupt Enable Mask */
  126. #define EVSYS_CHINTENSET_OVR EVSYS_CHINTENSET_OVR_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_CHINTENSET_OVR_Msk instead */
  127. #define EVSYS_CHINTENSET_EVD_Pos 1 /**< (EVSYS_CHINTENSET) Channel Event Detected Interrupt Enable Position */
  128. #define EVSYS_CHINTENSET_EVD_Msk (_U_(0x1) << EVSYS_CHINTENSET_EVD_Pos) /**< (EVSYS_CHINTENSET) Channel Event Detected Interrupt Enable Mask */
  129. #define EVSYS_CHINTENSET_EVD EVSYS_CHINTENSET_EVD_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_CHINTENSET_EVD_Msk instead */
  130. #define EVSYS_CHINTENSET_MASK _U_(0x03) /**< \deprecated (EVSYS_CHINTENSET) Register MASK (Use EVSYS_CHINTENSET_Msk instead) */
  131. #define EVSYS_CHINTENSET_Msk _U_(0x03) /**< (EVSYS_CHINTENSET) Register Mask */
  132. /* -------- EVSYS_CHINTFLAG : (EVSYS Offset: 0x06) (R/W 8) Channel n Interrupt Flag Status and Clear -------- */
  133. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  134. typedef union { // __I to avoid read-modify-write on write-to-clear register
  135. struct {
  136. __I uint8_t OVR:1; /**< bit: 0 Channel Overrun */
  137. __I uint8_t EVD:1; /**< bit: 1 Channel Event Detected */
  138. __I uint8_t :6; /**< bit: 2..7 Reserved */
  139. } bit; /**< Structure used for bit access */
  140. uint8_t reg; /**< Type used for register access */
  141. } EVSYS_CHINTFLAG_Type;
  142. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  143. #define EVSYS_CHINTFLAG_OFFSET (0x06) /**< (EVSYS_CHINTFLAG) Channel n Interrupt Flag Status and Clear Offset */
  144. #define EVSYS_CHINTFLAG_RESETVALUE _U_(0x00) /**< (EVSYS_CHINTFLAG) Channel n Interrupt Flag Status and Clear Reset Value */
  145. #define EVSYS_CHINTFLAG_OVR_Pos 0 /**< (EVSYS_CHINTFLAG) Channel Overrun Position */
  146. #define EVSYS_CHINTFLAG_OVR_Msk (_U_(0x1) << EVSYS_CHINTFLAG_OVR_Pos) /**< (EVSYS_CHINTFLAG) Channel Overrun Mask */
  147. #define EVSYS_CHINTFLAG_OVR EVSYS_CHINTFLAG_OVR_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_CHINTFLAG_OVR_Msk instead */
  148. #define EVSYS_CHINTFLAG_EVD_Pos 1 /**< (EVSYS_CHINTFLAG) Channel Event Detected Position */
  149. #define EVSYS_CHINTFLAG_EVD_Msk (_U_(0x1) << EVSYS_CHINTFLAG_EVD_Pos) /**< (EVSYS_CHINTFLAG) Channel Event Detected Mask */
  150. #define EVSYS_CHINTFLAG_EVD EVSYS_CHINTFLAG_EVD_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_CHINTFLAG_EVD_Msk instead */
  151. #define EVSYS_CHINTFLAG_MASK _U_(0x03) /**< \deprecated (EVSYS_CHINTFLAG) Register MASK (Use EVSYS_CHINTFLAG_Msk instead) */
  152. #define EVSYS_CHINTFLAG_Msk _U_(0x03) /**< (EVSYS_CHINTFLAG) Register Mask */
  153. /* -------- EVSYS_CHSTATUS : (EVSYS Offset: 0x07) (R/ 8) Channel n Status -------- */
  154. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  155. typedef union {
  156. struct {
  157. uint8_t RDYUSR:1; /**< bit: 0 Ready User */
  158. uint8_t BUSYCH:1; /**< bit: 1 Busy Channel */
  159. uint8_t :6; /**< bit: 2..7 Reserved */
  160. } bit; /**< Structure used for bit access */
  161. uint8_t reg; /**< Type used for register access */
  162. } EVSYS_CHSTATUS_Type;
  163. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  164. #define EVSYS_CHSTATUS_OFFSET (0x07) /**< (EVSYS_CHSTATUS) Channel n Status Offset */
  165. #define EVSYS_CHSTATUS_RESETVALUE _U_(0x01) /**< (EVSYS_CHSTATUS) Channel n Status Reset Value */
  166. #define EVSYS_CHSTATUS_RDYUSR_Pos 0 /**< (EVSYS_CHSTATUS) Ready User Position */
  167. #define EVSYS_CHSTATUS_RDYUSR_Msk (_U_(0x1) << EVSYS_CHSTATUS_RDYUSR_Pos) /**< (EVSYS_CHSTATUS) Ready User Mask */
  168. #define EVSYS_CHSTATUS_RDYUSR EVSYS_CHSTATUS_RDYUSR_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_CHSTATUS_RDYUSR_Msk instead */
  169. #define EVSYS_CHSTATUS_BUSYCH_Pos 1 /**< (EVSYS_CHSTATUS) Busy Channel Position */
  170. #define EVSYS_CHSTATUS_BUSYCH_Msk (_U_(0x1) << EVSYS_CHSTATUS_BUSYCH_Pos) /**< (EVSYS_CHSTATUS) Busy Channel Mask */
  171. #define EVSYS_CHSTATUS_BUSYCH EVSYS_CHSTATUS_BUSYCH_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_CHSTATUS_BUSYCH_Msk instead */
  172. #define EVSYS_CHSTATUS_MASK _U_(0x03) /**< \deprecated (EVSYS_CHSTATUS) Register MASK (Use EVSYS_CHSTATUS_Msk instead) */
  173. #define EVSYS_CHSTATUS_Msk _U_(0x03) /**< (EVSYS_CHSTATUS) Register Mask */
  174. /* -------- EVSYS_CTRLA : (EVSYS Offset: 0x00) (/W 8) Control -------- */
  175. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  176. typedef union {
  177. struct {
  178. uint8_t SWRST:1; /**< bit: 0 Software Reset */
  179. uint8_t :7; /**< bit: 1..7 Reserved */
  180. } bit; /**< Structure used for bit access */
  181. uint8_t reg; /**< Type used for register access */
  182. } EVSYS_CTRLA_Type;
  183. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  184. #define EVSYS_CTRLA_OFFSET (0x00) /**< (EVSYS_CTRLA) Control Offset */
  185. #define EVSYS_CTRLA_RESETVALUE _U_(0x00) /**< (EVSYS_CTRLA) Control Reset Value */
  186. #define EVSYS_CTRLA_SWRST_Pos 0 /**< (EVSYS_CTRLA) Software Reset Position */
  187. #define EVSYS_CTRLA_SWRST_Msk (_U_(0x1) << EVSYS_CTRLA_SWRST_Pos) /**< (EVSYS_CTRLA) Software Reset Mask */
  188. #define EVSYS_CTRLA_SWRST EVSYS_CTRLA_SWRST_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_CTRLA_SWRST_Msk instead */
  189. #define EVSYS_CTRLA_MASK _U_(0x01) /**< \deprecated (EVSYS_CTRLA) Register MASK (Use EVSYS_CTRLA_Msk instead) */
  190. #define EVSYS_CTRLA_Msk _U_(0x01) /**< (EVSYS_CTRLA) Register Mask */
  191. /* -------- EVSYS_SWEVT : (EVSYS Offset: 0x04) (/W 32) Software Event -------- */
  192. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  193. typedef union {
  194. struct {
  195. uint32_t CHANNEL0:1; /**< bit: 0 Channel 0 Software Selection */
  196. uint32_t CHANNEL1:1; /**< bit: 1 Channel 1 Software Selection */
  197. uint32_t CHANNEL2:1; /**< bit: 2 Channel 2 Software Selection */
  198. uint32_t CHANNEL3:1; /**< bit: 3 Channel 3 Software Selection */
  199. uint32_t CHANNEL4:1; /**< bit: 4 Channel 4 Software Selection */
  200. uint32_t CHANNEL5:1; /**< bit: 5 Channel 5 Software Selection */
  201. uint32_t CHANNEL6:1; /**< bit: 6 Channel 6 Software Selection */
  202. uint32_t CHANNEL7:1; /**< bit: 7 Channel 7 Software Selection */
  203. uint32_t :24; /**< bit: 8..31 Reserved */
  204. } bit; /**< Structure used for bit access */
  205. struct {
  206. uint32_t CHANNEL:8; /**< bit: 0..7 Channel 7 Software Selection */
  207. uint32_t :24; /**< bit: 8..31 Reserved */
  208. } vec; /**< Structure used for vec access */
  209. uint32_t reg; /**< Type used for register access */
  210. } EVSYS_SWEVT_Type;
  211. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  212. #define EVSYS_SWEVT_OFFSET (0x04) /**< (EVSYS_SWEVT) Software Event Offset */
  213. #define EVSYS_SWEVT_RESETVALUE _U_(0x00) /**< (EVSYS_SWEVT) Software Event Reset Value */
  214. #define EVSYS_SWEVT_CHANNEL0_Pos 0 /**< (EVSYS_SWEVT) Channel 0 Software Selection Position */
  215. #define EVSYS_SWEVT_CHANNEL0_Msk (_U_(0x1) << EVSYS_SWEVT_CHANNEL0_Pos) /**< (EVSYS_SWEVT) Channel 0 Software Selection Mask */
  216. #define EVSYS_SWEVT_CHANNEL0 EVSYS_SWEVT_CHANNEL0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_SWEVT_CHANNEL0_Msk instead */
  217. #define EVSYS_SWEVT_CHANNEL1_Pos 1 /**< (EVSYS_SWEVT) Channel 1 Software Selection Position */
  218. #define EVSYS_SWEVT_CHANNEL1_Msk (_U_(0x1) << EVSYS_SWEVT_CHANNEL1_Pos) /**< (EVSYS_SWEVT) Channel 1 Software Selection Mask */
  219. #define EVSYS_SWEVT_CHANNEL1 EVSYS_SWEVT_CHANNEL1_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_SWEVT_CHANNEL1_Msk instead */
  220. #define EVSYS_SWEVT_CHANNEL2_Pos 2 /**< (EVSYS_SWEVT) Channel 2 Software Selection Position */
  221. #define EVSYS_SWEVT_CHANNEL2_Msk (_U_(0x1) << EVSYS_SWEVT_CHANNEL2_Pos) /**< (EVSYS_SWEVT) Channel 2 Software Selection Mask */
  222. #define EVSYS_SWEVT_CHANNEL2 EVSYS_SWEVT_CHANNEL2_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_SWEVT_CHANNEL2_Msk instead */
  223. #define EVSYS_SWEVT_CHANNEL3_Pos 3 /**< (EVSYS_SWEVT) Channel 3 Software Selection Position */
  224. #define EVSYS_SWEVT_CHANNEL3_Msk (_U_(0x1) << EVSYS_SWEVT_CHANNEL3_Pos) /**< (EVSYS_SWEVT) Channel 3 Software Selection Mask */
  225. #define EVSYS_SWEVT_CHANNEL3 EVSYS_SWEVT_CHANNEL3_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_SWEVT_CHANNEL3_Msk instead */
  226. #define EVSYS_SWEVT_CHANNEL4_Pos 4 /**< (EVSYS_SWEVT) Channel 4 Software Selection Position */
  227. #define EVSYS_SWEVT_CHANNEL4_Msk (_U_(0x1) << EVSYS_SWEVT_CHANNEL4_Pos) /**< (EVSYS_SWEVT) Channel 4 Software Selection Mask */
  228. #define EVSYS_SWEVT_CHANNEL4 EVSYS_SWEVT_CHANNEL4_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_SWEVT_CHANNEL4_Msk instead */
  229. #define EVSYS_SWEVT_CHANNEL5_Pos 5 /**< (EVSYS_SWEVT) Channel 5 Software Selection Position */
  230. #define EVSYS_SWEVT_CHANNEL5_Msk (_U_(0x1) << EVSYS_SWEVT_CHANNEL5_Pos) /**< (EVSYS_SWEVT) Channel 5 Software Selection Mask */
  231. #define EVSYS_SWEVT_CHANNEL5 EVSYS_SWEVT_CHANNEL5_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_SWEVT_CHANNEL5_Msk instead */
  232. #define EVSYS_SWEVT_CHANNEL6_Pos 6 /**< (EVSYS_SWEVT) Channel 6 Software Selection Position */
  233. #define EVSYS_SWEVT_CHANNEL6_Msk (_U_(0x1) << EVSYS_SWEVT_CHANNEL6_Pos) /**< (EVSYS_SWEVT) Channel 6 Software Selection Mask */
  234. #define EVSYS_SWEVT_CHANNEL6 EVSYS_SWEVT_CHANNEL6_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_SWEVT_CHANNEL6_Msk instead */
  235. #define EVSYS_SWEVT_CHANNEL7_Pos 7 /**< (EVSYS_SWEVT) Channel 7 Software Selection Position */
  236. #define EVSYS_SWEVT_CHANNEL7_Msk (_U_(0x1) << EVSYS_SWEVT_CHANNEL7_Pos) /**< (EVSYS_SWEVT) Channel 7 Software Selection Mask */
  237. #define EVSYS_SWEVT_CHANNEL7 EVSYS_SWEVT_CHANNEL7_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_SWEVT_CHANNEL7_Msk instead */
  238. #define EVSYS_SWEVT_MASK _U_(0xFF) /**< \deprecated (EVSYS_SWEVT) Register MASK (Use EVSYS_SWEVT_Msk instead) */
  239. #define EVSYS_SWEVT_Msk _U_(0xFF) /**< (EVSYS_SWEVT) Register Mask */
  240. #define EVSYS_SWEVT_CHANNEL_Pos 0 /**< (EVSYS_SWEVT Position) Channel 7 Software Selection */
  241. #define EVSYS_SWEVT_CHANNEL_Msk (_U_(0xFF) << EVSYS_SWEVT_CHANNEL_Pos) /**< (EVSYS_SWEVT Mask) CHANNEL */
  242. #define EVSYS_SWEVT_CHANNEL(value) (EVSYS_SWEVT_CHANNEL_Msk & ((value) << EVSYS_SWEVT_CHANNEL_Pos))
  243. /* -------- EVSYS_PRICTRL : (EVSYS Offset: 0x08) (R/W 8) Priority Control -------- */
  244. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  245. typedef union {
  246. struct {
  247. uint8_t PRI:2; /**< bit: 0..1 Channel Priority Number */
  248. uint8_t :5; /**< bit: 2..6 Reserved */
  249. uint8_t RREN:1; /**< bit: 7 Round-Robin Scheduling Enable */
  250. } bit; /**< Structure used for bit access */
  251. uint8_t reg; /**< Type used for register access */
  252. } EVSYS_PRICTRL_Type;
  253. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  254. #define EVSYS_PRICTRL_OFFSET (0x08) /**< (EVSYS_PRICTRL) Priority Control Offset */
  255. #define EVSYS_PRICTRL_RESETVALUE _U_(0x00) /**< (EVSYS_PRICTRL) Priority Control Reset Value */
  256. #define EVSYS_PRICTRL_PRI_Pos 0 /**< (EVSYS_PRICTRL) Channel Priority Number Position */
  257. #define EVSYS_PRICTRL_PRI_Msk (_U_(0x3) << EVSYS_PRICTRL_PRI_Pos) /**< (EVSYS_PRICTRL) Channel Priority Number Mask */
  258. #define EVSYS_PRICTRL_PRI(value) (EVSYS_PRICTRL_PRI_Msk & ((value) << EVSYS_PRICTRL_PRI_Pos))
  259. #define EVSYS_PRICTRL_RREN_Pos 7 /**< (EVSYS_PRICTRL) Round-Robin Scheduling Enable Position */
  260. #define EVSYS_PRICTRL_RREN_Msk (_U_(0x1) << EVSYS_PRICTRL_RREN_Pos) /**< (EVSYS_PRICTRL) Round-Robin Scheduling Enable Mask */
  261. #define EVSYS_PRICTRL_RREN EVSYS_PRICTRL_RREN_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_PRICTRL_RREN_Msk instead */
  262. #define EVSYS_PRICTRL_MASK _U_(0x83) /**< \deprecated (EVSYS_PRICTRL) Register MASK (Use EVSYS_PRICTRL_Msk instead) */
  263. #define EVSYS_PRICTRL_Msk _U_(0x83) /**< (EVSYS_PRICTRL) Register Mask */
  264. /* -------- EVSYS_INTPEND : (EVSYS Offset: 0x10) (R/W 16) Channel Pending Interrupt -------- */
  265. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  266. typedef union {
  267. struct {
  268. uint16_t ID:2; /**< bit: 0..1 Channel ID */
  269. uint16_t :6; /**< bit: 2..7 Reserved */
  270. uint16_t OVR:1; /**< bit: 8 Channel Overrun */
  271. uint16_t EVD:1; /**< bit: 9 Channel Event Detected */
  272. uint16_t :4; /**< bit: 10..13 Reserved */
  273. uint16_t READY:1; /**< bit: 14 Ready */
  274. uint16_t BUSY:1; /**< bit: 15 Busy */
  275. } bit; /**< Structure used for bit access */
  276. uint16_t reg; /**< Type used for register access */
  277. } EVSYS_INTPEND_Type;
  278. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  279. #define EVSYS_INTPEND_OFFSET (0x10) /**< (EVSYS_INTPEND) Channel Pending Interrupt Offset */
  280. #define EVSYS_INTPEND_RESETVALUE _U_(0x4000) /**< (EVSYS_INTPEND) Channel Pending Interrupt Reset Value */
  281. #define EVSYS_INTPEND_ID_Pos 0 /**< (EVSYS_INTPEND) Channel ID Position */
  282. #define EVSYS_INTPEND_ID_Msk (_U_(0x3) << EVSYS_INTPEND_ID_Pos) /**< (EVSYS_INTPEND) Channel ID Mask */
  283. #define EVSYS_INTPEND_ID(value) (EVSYS_INTPEND_ID_Msk & ((value) << EVSYS_INTPEND_ID_Pos))
  284. #define EVSYS_INTPEND_OVR_Pos 8 /**< (EVSYS_INTPEND) Channel Overrun Position */
  285. #define EVSYS_INTPEND_OVR_Msk (_U_(0x1) << EVSYS_INTPEND_OVR_Pos) /**< (EVSYS_INTPEND) Channel Overrun Mask */
  286. #define EVSYS_INTPEND_OVR EVSYS_INTPEND_OVR_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_INTPEND_OVR_Msk instead */
  287. #define EVSYS_INTPEND_EVD_Pos 9 /**< (EVSYS_INTPEND) Channel Event Detected Position */
  288. #define EVSYS_INTPEND_EVD_Msk (_U_(0x1) << EVSYS_INTPEND_EVD_Pos) /**< (EVSYS_INTPEND) Channel Event Detected Mask */
  289. #define EVSYS_INTPEND_EVD EVSYS_INTPEND_EVD_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_INTPEND_EVD_Msk instead */
  290. #define EVSYS_INTPEND_READY_Pos 14 /**< (EVSYS_INTPEND) Ready Position */
  291. #define EVSYS_INTPEND_READY_Msk (_U_(0x1) << EVSYS_INTPEND_READY_Pos) /**< (EVSYS_INTPEND) Ready Mask */
  292. #define EVSYS_INTPEND_READY EVSYS_INTPEND_READY_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_INTPEND_READY_Msk instead */
  293. #define EVSYS_INTPEND_BUSY_Pos 15 /**< (EVSYS_INTPEND) Busy Position */
  294. #define EVSYS_INTPEND_BUSY_Msk (_U_(0x1) << EVSYS_INTPEND_BUSY_Pos) /**< (EVSYS_INTPEND) Busy Mask */
  295. #define EVSYS_INTPEND_BUSY EVSYS_INTPEND_BUSY_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_INTPEND_BUSY_Msk instead */
  296. #define EVSYS_INTPEND_MASK _U_(0xC303) /**< \deprecated (EVSYS_INTPEND) Register MASK (Use EVSYS_INTPEND_Msk instead) */
  297. #define EVSYS_INTPEND_Msk _U_(0xC303) /**< (EVSYS_INTPEND) Register Mask */
  298. /* -------- EVSYS_INTSTATUS : (EVSYS Offset: 0x14) (R/ 32) Interrupt Status -------- */
  299. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  300. typedef union {
  301. struct {
  302. uint32_t CHINT0:1; /**< bit: 0 Channel 0 Pending Interrupt */
  303. uint32_t CHINT1:1; /**< bit: 1 Channel 1 Pending Interrupt */
  304. uint32_t CHINT2:1; /**< bit: 2 Channel 2 Pending Interrupt */
  305. uint32_t CHINT3:1; /**< bit: 3 Channel 3 Pending Interrupt */
  306. uint32_t :28; /**< bit: 4..31 Reserved */
  307. } bit; /**< Structure used for bit access */
  308. struct {
  309. uint32_t CHINT:4; /**< bit: 0..3 Channel 3 Pending Interrupt */
  310. uint32_t :28; /**< bit: 4..31 Reserved */
  311. } vec; /**< Structure used for vec access */
  312. uint32_t reg; /**< Type used for register access */
  313. } EVSYS_INTSTATUS_Type;
  314. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  315. #define EVSYS_INTSTATUS_OFFSET (0x14) /**< (EVSYS_INTSTATUS) Interrupt Status Offset */
  316. #define EVSYS_INTSTATUS_RESETVALUE _U_(0x00) /**< (EVSYS_INTSTATUS) Interrupt Status Reset Value */
  317. #define EVSYS_INTSTATUS_CHINT0_Pos 0 /**< (EVSYS_INTSTATUS) Channel 0 Pending Interrupt Position */
  318. #define EVSYS_INTSTATUS_CHINT0_Msk (_U_(0x1) << EVSYS_INTSTATUS_CHINT0_Pos) /**< (EVSYS_INTSTATUS) Channel 0 Pending Interrupt Mask */
  319. #define EVSYS_INTSTATUS_CHINT0 EVSYS_INTSTATUS_CHINT0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_INTSTATUS_CHINT0_Msk instead */
  320. #define EVSYS_INTSTATUS_CHINT1_Pos 1 /**< (EVSYS_INTSTATUS) Channel 1 Pending Interrupt Position */
  321. #define EVSYS_INTSTATUS_CHINT1_Msk (_U_(0x1) << EVSYS_INTSTATUS_CHINT1_Pos) /**< (EVSYS_INTSTATUS) Channel 1 Pending Interrupt Mask */
  322. #define EVSYS_INTSTATUS_CHINT1 EVSYS_INTSTATUS_CHINT1_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_INTSTATUS_CHINT1_Msk instead */
  323. #define EVSYS_INTSTATUS_CHINT2_Pos 2 /**< (EVSYS_INTSTATUS) Channel 2 Pending Interrupt Position */
  324. #define EVSYS_INTSTATUS_CHINT2_Msk (_U_(0x1) << EVSYS_INTSTATUS_CHINT2_Pos) /**< (EVSYS_INTSTATUS) Channel 2 Pending Interrupt Mask */
  325. #define EVSYS_INTSTATUS_CHINT2 EVSYS_INTSTATUS_CHINT2_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_INTSTATUS_CHINT2_Msk instead */
  326. #define EVSYS_INTSTATUS_CHINT3_Pos 3 /**< (EVSYS_INTSTATUS) Channel 3 Pending Interrupt Position */
  327. #define EVSYS_INTSTATUS_CHINT3_Msk (_U_(0x1) << EVSYS_INTSTATUS_CHINT3_Pos) /**< (EVSYS_INTSTATUS) Channel 3 Pending Interrupt Mask */
  328. #define EVSYS_INTSTATUS_CHINT3 EVSYS_INTSTATUS_CHINT3_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_INTSTATUS_CHINT3_Msk instead */
  329. #define EVSYS_INTSTATUS_MASK _U_(0x0F) /**< \deprecated (EVSYS_INTSTATUS) Register MASK (Use EVSYS_INTSTATUS_Msk instead) */
  330. #define EVSYS_INTSTATUS_Msk _U_(0x0F) /**< (EVSYS_INTSTATUS) Register Mask */
  331. #define EVSYS_INTSTATUS_CHINT_Pos 0 /**< (EVSYS_INTSTATUS Position) Channel 3 Pending Interrupt */
  332. #define EVSYS_INTSTATUS_CHINT_Msk (_U_(0xF) << EVSYS_INTSTATUS_CHINT_Pos) /**< (EVSYS_INTSTATUS Mask) CHINT */
  333. #define EVSYS_INTSTATUS_CHINT(value) (EVSYS_INTSTATUS_CHINT_Msk & ((value) << EVSYS_INTSTATUS_CHINT_Pos))
  334. /* -------- EVSYS_BUSYCH : (EVSYS Offset: 0x18) (R/ 32) Busy Channels -------- */
  335. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  336. typedef union {
  337. struct {
  338. uint32_t BUSYCH0:1; /**< bit: 0 Busy Channel 0 */
  339. uint32_t BUSYCH1:1; /**< bit: 1 Busy Channel 1 */
  340. uint32_t BUSYCH2:1; /**< bit: 2 Busy Channel 2 */
  341. uint32_t BUSYCH3:1; /**< bit: 3 Busy Channel 3 */
  342. uint32_t :28; /**< bit: 4..31 Reserved */
  343. } bit; /**< Structure used for bit access */
  344. struct {
  345. uint32_t BUSYCH:4; /**< bit: 0..3 Busy Channel 3 */
  346. uint32_t :28; /**< bit: 4..31 Reserved */
  347. } vec; /**< Structure used for vec access */
  348. uint32_t reg; /**< Type used for register access */
  349. } EVSYS_BUSYCH_Type;
  350. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  351. #define EVSYS_BUSYCH_OFFSET (0x18) /**< (EVSYS_BUSYCH) Busy Channels Offset */
  352. #define EVSYS_BUSYCH_RESETVALUE _U_(0x00) /**< (EVSYS_BUSYCH) Busy Channels Reset Value */
  353. #define EVSYS_BUSYCH_BUSYCH0_Pos 0 /**< (EVSYS_BUSYCH) Busy Channel 0 Position */
  354. #define EVSYS_BUSYCH_BUSYCH0_Msk (_U_(0x1) << EVSYS_BUSYCH_BUSYCH0_Pos) /**< (EVSYS_BUSYCH) Busy Channel 0 Mask */
  355. #define EVSYS_BUSYCH_BUSYCH0 EVSYS_BUSYCH_BUSYCH0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_BUSYCH_BUSYCH0_Msk instead */
  356. #define EVSYS_BUSYCH_BUSYCH1_Pos 1 /**< (EVSYS_BUSYCH) Busy Channel 1 Position */
  357. #define EVSYS_BUSYCH_BUSYCH1_Msk (_U_(0x1) << EVSYS_BUSYCH_BUSYCH1_Pos) /**< (EVSYS_BUSYCH) Busy Channel 1 Mask */
  358. #define EVSYS_BUSYCH_BUSYCH1 EVSYS_BUSYCH_BUSYCH1_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_BUSYCH_BUSYCH1_Msk instead */
  359. #define EVSYS_BUSYCH_BUSYCH2_Pos 2 /**< (EVSYS_BUSYCH) Busy Channel 2 Position */
  360. #define EVSYS_BUSYCH_BUSYCH2_Msk (_U_(0x1) << EVSYS_BUSYCH_BUSYCH2_Pos) /**< (EVSYS_BUSYCH) Busy Channel 2 Mask */
  361. #define EVSYS_BUSYCH_BUSYCH2 EVSYS_BUSYCH_BUSYCH2_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_BUSYCH_BUSYCH2_Msk instead */
  362. #define EVSYS_BUSYCH_BUSYCH3_Pos 3 /**< (EVSYS_BUSYCH) Busy Channel 3 Position */
  363. #define EVSYS_BUSYCH_BUSYCH3_Msk (_U_(0x1) << EVSYS_BUSYCH_BUSYCH3_Pos) /**< (EVSYS_BUSYCH) Busy Channel 3 Mask */
  364. #define EVSYS_BUSYCH_BUSYCH3 EVSYS_BUSYCH_BUSYCH3_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_BUSYCH_BUSYCH3_Msk instead */
  365. #define EVSYS_BUSYCH_MASK _U_(0x0F) /**< \deprecated (EVSYS_BUSYCH) Register MASK (Use EVSYS_BUSYCH_Msk instead) */
  366. #define EVSYS_BUSYCH_Msk _U_(0x0F) /**< (EVSYS_BUSYCH) Register Mask */
  367. #define EVSYS_BUSYCH_BUSYCH_Pos 0 /**< (EVSYS_BUSYCH Position) Busy Channel 3 */
  368. #define EVSYS_BUSYCH_BUSYCH_Msk (_U_(0xF) << EVSYS_BUSYCH_BUSYCH_Pos) /**< (EVSYS_BUSYCH Mask) BUSYCH */
  369. #define EVSYS_BUSYCH_BUSYCH(value) (EVSYS_BUSYCH_BUSYCH_Msk & ((value) << EVSYS_BUSYCH_BUSYCH_Pos))
  370. /* -------- EVSYS_READYUSR : (EVSYS Offset: 0x1c) (R/ 32) Ready Users -------- */
  371. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  372. typedef union {
  373. struct {
  374. uint32_t READYUSR0:1; /**< bit: 0 Ready User for Channel 0 */
  375. uint32_t READYUSR1:1; /**< bit: 1 Ready User for Channel 1 */
  376. uint32_t READYUSR2:1; /**< bit: 2 Ready User for Channel 2 */
  377. uint32_t READYUSR3:1; /**< bit: 3 Ready User for Channel 3 */
  378. uint32_t :28; /**< bit: 4..31 Reserved */
  379. } bit; /**< Structure used for bit access */
  380. struct {
  381. uint32_t READYUSR:4; /**< bit: 0..3 Ready User for Channel 3 */
  382. uint32_t :28; /**< bit: 4..31 Reserved */
  383. } vec; /**< Structure used for vec access */
  384. uint32_t reg; /**< Type used for register access */
  385. } EVSYS_READYUSR_Type;
  386. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  387. #define EVSYS_READYUSR_OFFSET (0x1C) /**< (EVSYS_READYUSR) Ready Users Offset */
  388. #define EVSYS_READYUSR_RESETVALUE _U_(0xFFFFFFFF) /**< (EVSYS_READYUSR) Ready Users Reset Value */
  389. #define EVSYS_READYUSR_READYUSR0_Pos 0 /**< (EVSYS_READYUSR) Ready User for Channel 0 Position */
  390. #define EVSYS_READYUSR_READYUSR0_Msk (_U_(0x1) << EVSYS_READYUSR_READYUSR0_Pos) /**< (EVSYS_READYUSR) Ready User for Channel 0 Mask */
  391. #define EVSYS_READYUSR_READYUSR0 EVSYS_READYUSR_READYUSR0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_READYUSR_READYUSR0_Msk instead */
  392. #define EVSYS_READYUSR_READYUSR1_Pos 1 /**< (EVSYS_READYUSR) Ready User for Channel 1 Position */
  393. #define EVSYS_READYUSR_READYUSR1_Msk (_U_(0x1) << EVSYS_READYUSR_READYUSR1_Pos) /**< (EVSYS_READYUSR) Ready User for Channel 1 Mask */
  394. #define EVSYS_READYUSR_READYUSR1 EVSYS_READYUSR_READYUSR1_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_READYUSR_READYUSR1_Msk instead */
  395. #define EVSYS_READYUSR_READYUSR2_Pos 2 /**< (EVSYS_READYUSR) Ready User for Channel 2 Position */
  396. #define EVSYS_READYUSR_READYUSR2_Msk (_U_(0x1) << EVSYS_READYUSR_READYUSR2_Pos) /**< (EVSYS_READYUSR) Ready User for Channel 2 Mask */
  397. #define EVSYS_READYUSR_READYUSR2 EVSYS_READYUSR_READYUSR2_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_READYUSR_READYUSR2_Msk instead */
  398. #define EVSYS_READYUSR_READYUSR3_Pos 3 /**< (EVSYS_READYUSR) Ready User for Channel 3 Position */
  399. #define EVSYS_READYUSR_READYUSR3_Msk (_U_(0x1) << EVSYS_READYUSR_READYUSR3_Pos) /**< (EVSYS_READYUSR) Ready User for Channel 3 Mask */
  400. #define EVSYS_READYUSR_READYUSR3 EVSYS_READYUSR_READYUSR3_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_READYUSR_READYUSR3_Msk instead */
  401. #define EVSYS_READYUSR_MASK _U_(0x0F) /**< \deprecated (EVSYS_READYUSR) Register MASK (Use EVSYS_READYUSR_Msk instead) */
  402. #define EVSYS_READYUSR_Msk _U_(0x0F) /**< (EVSYS_READYUSR) Register Mask */
  403. #define EVSYS_READYUSR_READYUSR_Pos 0 /**< (EVSYS_READYUSR Position) Ready User for Channel 3 */
  404. #define EVSYS_READYUSR_READYUSR_Msk (_U_(0xF) << EVSYS_READYUSR_READYUSR_Pos) /**< (EVSYS_READYUSR Mask) READYUSR */
  405. #define EVSYS_READYUSR_READYUSR(value) (EVSYS_READYUSR_READYUSR_Msk & ((value) << EVSYS_READYUSR_READYUSR_Pos))
  406. /* -------- EVSYS_USER : (EVSYS Offset: 0x120) (R/W 8) User Multiplexer n -------- */
  407. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  408. typedef union {
  409. struct {
  410. uint8_t CHANNEL:4; /**< bit: 0..3 Channel Event Selection */
  411. uint8_t :4; /**< bit: 4..7 Reserved */
  412. } bit; /**< Structure used for bit access */
  413. uint8_t reg; /**< Type used for register access */
  414. } EVSYS_USER_Type;
  415. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  416. #define EVSYS_USER_OFFSET (0x120) /**< (EVSYS_USER) User Multiplexer n Offset */
  417. #define EVSYS_USER_RESETVALUE _U_(0x00) /**< (EVSYS_USER) User Multiplexer n Reset Value */
  418. #define EVSYS_USER_CHANNEL_Pos 0 /**< (EVSYS_USER) Channel Event Selection Position */
  419. #define EVSYS_USER_CHANNEL_Msk (_U_(0xF) << EVSYS_USER_CHANNEL_Pos) /**< (EVSYS_USER) Channel Event Selection Mask */
  420. #define EVSYS_USER_CHANNEL(value) (EVSYS_USER_CHANNEL_Msk & ((value) << EVSYS_USER_CHANNEL_Pos))
  421. #define EVSYS_USER_MASK _U_(0x0F) /**< \deprecated (EVSYS_USER) Register MASK (Use EVSYS_USER_Msk instead) */
  422. #define EVSYS_USER_Msk _U_(0x0F) /**< (EVSYS_USER) Register Mask */
  423. /* -------- EVSYS_INTENCLR : (EVSYS Offset: 0x1d4) (R/W 8) Interrupt Enable Clear -------- */
  424. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  425. typedef union {
  426. struct {
  427. uint8_t NSCHK:1; /**< bit: 0 Non-Secure Check Interrupt Enable */
  428. uint8_t :7; /**< bit: 1..7 Reserved */
  429. } bit; /**< Structure used for bit access */
  430. uint8_t reg; /**< Type used for register access */
  431. } EVSYS_INTENCLR_Type;
  432. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  433. #define EVSYS_INTENCLR_OFFSET (0x1D4) /**< (EVSYS_INTENCLR) Interrupt Enable Clear Offset */
  434. #define EVSYS_INTENCLR_RESETVALUE _U_(0x00) /**< (EVSYS_INTENCLR) Interrupt Enable Clear Reset Value */
  435. #define EVSYS_INTENCLR_NSCHK_Pos 0 /**< (EVSYS_INTENCLR) Non-Secure Check Interrupt Enable Position */
  436. #define EVSYS_INTENCLR_NSCHK_Msk (_U_(0x1) << EVSYS_INTENCLR_NSCHK_Pos) /**< (EVSYS_INTENCLR) Non-Secure Check Interrupt Enable Mask */
  437. #define EVSYS_INTENCLR_NSCHK EVSYS_INTENCLR_NSCHK_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_INTENCLR_NSCHK_Msk instead */
  438. #define EVSYS_INTENCLR_MASK _U_(0x01) /**< \deprecated (EVSYS_INTENCLR) Register MASK (Use EVSYS_INTENCLR_Msk instead) */
  439. #define EVSYS_INTENCLR_Msk _U_(0x01) /**< (EVSYS_INTENCLR) Register Mask */
  440. /* -------- EVSYS_INTENSET : (EVSYS Offset: 0x1d5) (R/W 8) Interrupt Enable Set -------- */
  441. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  442. typedef union {
  443. struct {
  444. uint8_t NSCHK:1; /**< bit: 0 Non-Secure Check Interrupt Enable */
  445. uint8_t :7; /**< bit: 1..7 Reserved */
  446. } bit; /**< Structure used for bit access */
  447. uint8_t reg; /**< Type used for register access */
  448. } EVSYS_INTENSET_Type;
  449. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  450. #define EVSYS_INTENSET_OFFSET (0x1D5) /**< (EVSYS_INTENSET) Interrupt Enable Set Offset */
  451. #define EVSYS_INTENSET_RESETVALUE _U_(0x00) /**< (EVSYS_INTENSET) Interrupt Enable Set Reset Value */
  452. #define EVSYS_INTENSET_NSCHK_Pos 0 /**< (EVSYS_INTENSET) Non-Secure Check Interrupt Enable Position */
  453. #define EVSYS_INTENSET_NSCHK_Msk (_U_(0x1) << EVSYS_INTENSET_NSCHK_Pos) /**< (EVSYS_INTENSET) Non-Secure Check Interrupt Enable Mask */
  454. #define EVSYS_INTENSET_NSCHK EVSYS_INTENSET_NSCHK_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_INTENSET_NSCHK_Msk instead */
  455. #define EVSYS_INTENSET_MASK _U_(0x01) /**< \deprecated (EVSYS_INTENSET) Register MASK (Use EVSYS_INTENSET_Msk instead) */
  456. #define EVSYS_INTENSET_Msk _U_(0x01) /**< (EVSYS_INTENSET) Register Mask */
  457. /* -------- EVSYS_INTFLAG : (EVSYS Offset: 0x1d6) (R/W 8) Interrupt Flag Status and Clear -------- */
  458. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  459. typedef union { // __I to avoid read-modify-write on write-to-clear register
  460. struct {
  461. __I uint8_t NSCHK:1; /**< bit: 0 Non-Secure Check */
  462. __I uint8_t :7; /**< bit: 1..7 Reserved */
  463. } bit; /**< Structure used for bit access */
  464. uint8_t reg; /**< Type used for register access */
  465. } EVSYS_INTFLAG_Type;
  466. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  467. #define EVSYS_INTFLAG_OFFSET (0x1D6) /**< (EVSYS_INTFLAG) Interrupt Flag Status and Clear Offset */
  468. #define EVSYS_INTFLAG_RESETVALUE _U_(0x00) /**< (EVSYS_INTFLAG) Interrupt Flag Status and Clear Reset Value */
  469. #define EVSYS_INTFLAG_NSCHK_Pos 0 /**< (EVSYS_INTFLAG) Non-Secure Check Position */
  470. #define EVSYS_INTFLAG_NSCHK_Msk (_U_(0x1) << EVSYS_INTFLAG_NSCHK_Pos) /**< (EVSYS_INTFLAG) Non-Secure Check Mask */
  471. #define EVSYS_INTFLAG_NSCHK EVSYS_INTFLAG_NSCHK_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_INTFLAG_NSCHK_Msk instead */
  472. #define EVSYS_INTFLAG_MASK _U_(0x01) /**< \deprecated (EVSYS_INTFLAG) Register MASK (Use EVSYS_INTFLAG_Msk instead) */
  473. #define EVSYS_INTFLAG_Msk _U_(0x01) /**< (EVSYS_INTFLAG) Register Mask */
  474. /* -------- EVSYS_NONSECCHAN : (EVSYS Offset: 0x1d8) (R/W 32) Channels Security Attribution -------- */
  475. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  476. typedef union {
  477. struct {
  478. uint32_t CHANNEL0:1; /**< bit: 0 Non-Secure for Channel 0 */
  479. uint32_t CHANNEL1:1; /**< bit: 1 Non-Secure for Channel 1 */
  480. uint32_t CHANNEL2:1; /**< bit: 2 Non-Secure for Channel 2 */
  481. uint32_t CHANNEL3:1; /**< bit: 3 Non-Secure for Channel 3 */
  482. uint32_t CHANNEL4:1; /**< bit: 4 Non-Secure for Channel 4 */
  483. uint32_t CHANNEL5:1; /**< bit: 5 Non-Secure for Channel 5 */
  484. uint32_t CHANNEL6:1; /**< bit: 6 Non-Secure for Channel 6 */
  485. uint32_t CHANNEL7:1; /**< bit: 7 Non-Secure for Channel 7 */
  486. uint32_t :24; /**< bit: 8..31 Reserved */
  487. } bit; /**< Structure used for bit access */
  488. struct {
  489. uint32_t CHANNEL:8; /**< bit: 0..7 Non-Secure for Channel 7 */
  490. uint32_t :24; /**< bit: 8..31 Reserved */
  491. } vec; /**< Structure used for vec access */
  492. uint32_t reg; /**< Type used for register access */
  493. } EVSYS_NONSECCHAN_Type;
  494. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  495. #define EVSYS_NONSECCHAN_OFFSET (0x1D8) /**< (EVSYS_NONSECCHAN) Channels Security Attribution Offset */
  496. #define EVSYS_NONSECCHAN_RESETVALUE _U_(0x00) /**< (EVSYS_NONSECCHAN) Channels Security Attribution Reset Value */
  497. #define EVSYS_NONSECCHAN_CHANNEL0_Pos 0 /**< (EVSYS_NONSECCHAN) Non-Secure for Channel 0 Position */
  498. #define EVSYS_NONSECCHAN_CHANNEL0_Msk (_U_(0x1) << EVSYS_NONSECCHAN_CHANNEL0_Pos) /**< (EVSYS_NONSECCHAN) Non-Secure for Channel 0 Mask */
  499. #define EVSYS_NONSECCHAN_CHANNEL0 EVSYS_NONSECCHAN_CHANNEL0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECCHAN_CHANNEL0_Msk instead */
  500. #define EVSYS_NONSECCHAN_CHANNEL1_Pos 1 /**< (EVSYS_NONSECCHAN) Non-Secure for Channel 1 Position */
  501. #define EVSYS_NONSECCHAN_CHANNEL1_Msk (_U_(0x1) << EVSYS_NONSECCHAN_CHANNEL1_Pos) /**< (EVSYS_NONSECCHAN) Non-Secure for Channel 1 Mask */
  502. #define EVSYS_NONSECCHAN_CHANNEL1 EVSYS_NONSECCHAN_CHANNEL1_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECCHAN_CHANNEL1_Msk instead */
  503. #define EVSYS_NONSECCHAN_CHANNEL2_Pos 2 /**< (EVSYS_NONSECCHAN) Non-Secure for Channel 2 Position */
  504. #define EVSYS_NONSECCHAN_CHANNEL2_Msk (_U_(0x1) << EVSYS_NONSECCHAN_CHANNEL2_Pos) /**< (EVSYS_NONSECCHAN) Non-Secure for Channel 2 Mask */
  505. #define EVSYS_NONSECCHAN_CHANNEL2 EVSYS_NONSECCHAN_CHANNEL2_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECCHAN_CHANNEL2_Msk instead */
  506. #define EVSYS_NONSECCHAN_CHANNEL3_Pos 3 /**< (EVSYS_NONSECCHAN) Non-Secure for Channel 3 Position */
  507. #define EVSYS_NONSECCHAN_CHANNEL3_Msk (_U_(0x1) << EVSYS_NONSECCHAN_CHANNEL3_Pos) /**< (EVSYS_NONSECCHAN) Non-Secure for Channel 3 Mask */
  508. #define EVSYS_NONSECCHAN_CHANNEL3 EVSYS_NONSECCHAN_CHANNEL3_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECCHAN_CHANNEL3_Msk instead */
  509. #define EVSYS_NONSECCHAN_CHANNEL4_Pos 4 /**< (EVSYS_NONSECCHAN) Non-Secure for Channel 4 Position */
  510. #define EVSYS_NONSECCHAN_CHANNEL4_Msk (_U_(0x1) << EVSYS_NONSECCHAN_CHANNEL4_Pos) /**< (EVSYS_NONSECCHAN) Non-Secure for Channel 4 Mask */
  511. #define EVSYS_NONSECCHAN_CHANNEL4 EVSYS_NONSECCHAN_CHANNEL4_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECCHAN_CHANNEL4_Msk instead */
  512. #define EVSYS_NONSECCHAN_CHANNEL5_Pos 5 /**< (EVSYS_NONSECCHAN) Non-Secure for Channel 5 Position */
  513. #define EVSYS_NONSECCHAN_CHANNEL5_Msk (_U_(0x1) << EVSYS_NONSECCHAN_CHANNEL5_Pos) /**< (EVSYS_NONSECCHAN) Non-Secure for Channel 5 Mask */
  514. #define EVSYS_NONSECCHAN_CHANNEL5 EVSYS_NONSECCHAN_CHANNEL5_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECCHAN_CHANNEL5_Msk instead */
  515. #define EVSYS_NONSECCHAN_CHANNEL6_Pos 6 /**< (EVSYS_NONSECCHAN) Non-Secure for Channel 6 Position */
  516. #define EVSYS_NONSECCHAN_CHANNEL6_Msk (_U_(0x1) << EVSYS_NONSECCHAN_CHANNEL6_Pos) /**< (EVSYS_NONSECCHAN) Non-Secure for Channel 6 Mask */
  517. #define EVSYS_NONSECCHAN_CHANNEL6 EVSYS_NONSECCHAN_CHANNEL6_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECCHAN_CHANNEL6_Msk instead */
  518. #define EVSYS_NONSECCHAN_CHANNEL7_Pos 7 /**< (EVSYS_NONSECCHAN) Non-Secure for Channel 7 Position */
  519. #define EVSYS_NONSECCHAN_CHANNEL7_Msk (_U_(0x1) << EVSYS_NONSECCHAN_CHANNEL7_Pos) /**< (EVSYS_NONSECCHAN) Non-Secure for Channel 7 Mask */
  520. #define EVSYS_NONSECCHAN_CHANNEL7 EVSYS_NONSECCHAN_CHANNEL7_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECCHAN_CHANNEL7_Msk instead */
  521. #define EVSYS_NONSECCHAN_MASK _U_(0xFF) /**< \deprecated (EVSYS_NONSECCHAN) Register MASK (Use EVSYS_NONSECCHAN_Msk instead) */
  522. #define EVSYS_NONSECCHAN_Msk _U_(0xFF) /**< (EVSYS_NONSECCHAN) Register Mask */
  523. #define EVSYS_NONSECCHAN_CHANNEL_Pos 0 /**< (EVSYS_NONSECCHAN Position) Non-Secure for Channel 7 */
  524. #define EVSYS_NONSECCHAN_CHANNEL_Msk (_U_(0xFF) << EVSYS_NONSECCHAN_CHANNEL_Pos) /**< (EVSYS_NONSECCHAN Mask) CHANNEL */
  525. #define EVSYS_NONSECCHAN_CHANNEL(value) (EVSYS_NONSECCHAN_CHANNEL_Msk & ((value) << EVSYS_NONSECCHAN_CHANNEL_Pos))
  526. /* -------- EVSYS_NSCHKCHAN : (EVSYS Offset: 0x1dc) (R/W 32) Non-Secure Channels Check -------- */
  527. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  528. typedef union {
  529. struct {
  530. uint32_t CHANNEL0:1; /**< bit: 0 Channel 0 to be checked as non-secured */
  531. uint32_t CHANNEL1:1; /**< bit: 1 Channel 1 to be checked as non-secured */
  532. uint32_t CHANNEL2:1; /**< bit: 2 Channel 2 to be checked as non-secured */
  533. uint32_t CHANNEL3:1; /**< bit: 3 Channel 3 to be checked as non-secured */
  534. uint32_t CHANNEL4:1; /**< bit: 4 Channel 4 to be checked as non-secured */
  535. uint32_t CHANNEL5:1; /**< bit: 5 Channel 5 to be checked as non-secured */
  536. uint32_t CHANNEL6:1; /**< bit: 6 Channel 6 to be checked as non-secured */
  537. uint32_t CHANNEL7:1; /**< bit: 7 Channel 7 to be checked as non-secured */
  538. uint32_t :24; /**< bit: 8..31 Reserved */
  539. } bit; /**< Structure used for bit access */
  540. struct {
  541. uint32_t CHANNEL:8; /**< bit: 0..7 Channel 7 to be checked as non-secured */
  542. uint32_t :24; /**< bit: 8..31 Reserved */
  543. } vec; /**< Structure used for vec access */
  544. uint32_t reg; /**< Type used for register access */
  545. } EVSYS_NSCHKCHAN_Type;
  546. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  547. #define EVSYS_NSCHKCHAN_OFFSET (0x1DC) /**< (EVSYS_NSCHKCHAN) Non-Secure Channels Check Offset */
  548. #define EVSYS_NSCHKCHAN_RESETVALUE _U_(0x00) /**< (EVSYS_NSCHKCHAN) Non-Secure Channels Check Reset Value */
  549. #define EVSYS_NSCHKCHAN_CHANNEL0_Pos 0 /**< (EVSYS_NSCHKCHAN) Channel 0 to be checked as non-secured Position */
  550. #define EVSYS_NSCHKCHAN_CHANNEL0_Msk (_U_(0x1) << EVSYS_NSCHKCHAN_CHANNEL0_Pos) /**< (EVSYS_NSCHKCHAN) Channel 0 to be checked as non-secured Mask */
  551. #define EVSYS_NSCHKCHAN_CHANNEL0 EVSYS_NSCHKCHAN_CHANNEL0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKCHAN_CHANNEL0_Msk instead */
  552. #define EVSYS_NSCHKCHAN_CHANNEL1_Pos 1 /**< (EVSYS_NSCHKCHAN) Channel 1 to be checked as non-secured Position */
  553. #define EVSYS_NSCHKCHAN_CHANNEL1_Msk (_U_(0x1) << EVSYS_NSCHKCHAN_CHANNEL1_Pos) /**< (EVSYS_NSCHKCHAN) Channel 1 to be checked as non-secured Mask */
  554. #define EVSYS_NSCHKCHAN_CHANNEL1 EVSYS_NSCHKCHAN_CHANNEL1_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKCHAN_CHANNEL1_Msk instead */
  555. #define EVSYS_NSCHKCHAN_CHANNEL2_Pos 2 /**< (EVSYS_NSCHKCHAN) Channel 2 to be checked as non-secured Position */
  556. #define EVSYS_NSCHKCHAN_CHANNEL2_Msk (_U_(0x1) << EVSYS_NSCHKCHAN_CHANNEL2_Pos) /**< (EVSYS_NSCHKCHAN) Channel 2 to be checked as non-secured Mask */
  557. #define EVSYS_NSCHKCHAN_CHANNEL2 EVSYS_NSCHKCHAN_CHANNEL2_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKCHAN_CHANNEL2_Msk instead */
  558. #define EVSYS_NSCHKCHAN_CHANNEL3_Pos 3 /**< (EVSYS_NSCHKCHAN) Channel 3 to be checked as non-secured Position */
  559. #define EVSYS_NSCHKCHAN_CHANNEL3_Msk (_U_(0x1) << EVSYS_NSCHKCHAN_CHANNEL3_Pos) /**< (EVSYS_NSCHKCHAN) Channel 3 to be checked as non-secured Mask */
  560. #define EVSYS_NSCHKCHAN_CHANNEL3 EVSYS_NSCHKCHAN_CHANNEL3_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKCHAN_CHANNEL3_Msk instead */
  561. #define EVSYS_NSCHKCHAN_CHANNEL4_Pos 4 /**< (EVSYS_NSCHKCHAN) Channel 4 to be checked as non-secured Position */
  562. #define EVSYS_NSCHKCHAN_CHANNEL4_Msk (_U_(0x1) << EVSYS_NSCHKCHAN_CHANNEL4_Pos) /**< (EVSYS_NSCHKCHAN) Channel 4 to be checked as non-secured Mask */
  563. #define EVSYS_NSCHKCHAN_CHANNEL4 EVSYS_NSCHKCHAN_CHANNEL4_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKCHAN_CHANNEL4_Msk instead */
  564. #define EVSYS_NSCHKCHAN_CHANNEL5_Pos 5 /**< (EVSYS_NSCHKCHAN) Channel 5 to be checked as non-secured Position */
  565. #define EVSYS_NSCHKCHAN_CHANNEL5_Msk (_U_(0x1) << EVSYS_NSCHKCHAN_CHANNEL5_Pos) /**< (EVSYS_NSCHKCHAN) Channel 5 to be checked as non-secured Mask */
  566. #define EVSYS_NSCHKCHAN_CHANNEL5 EVSYS_NSCHKCHAN_CHANNEL5_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKCHAN_CHANNEL5_Msk instead */
  567. #define EVSYS_NSCHKCHAN_CHANNEL6_Pos 6 /**< (EVSYS_NSCHKCHAN) Channel 6 to be checked as non-secured Position */
  568. #define EVSYS_NSCHKCHAN_CHANNEL6_Msk (_U_(0x1) << EVSYS_NSCHKCHAN_CHANNEL6_Pos) /**< (EVSYS_NSCHKCHAN) Channel 6 to be checked as non-secured Mask */
  569. #define EVSYS_NSCHKCHAN_CHANNEL6 EVSYS_NSCHKCHAN_CHANNEL6_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKCHAN_CHANNEL6_Msk instead */
  570. #define EVSYS_NSCHKCHAN_CHANNEL7_Pos 7 /**< (EVSYS_NSCHKCHAN) Channel 7 to be checked as non-secured Position */
  571. #define EVSYS_NSCHKCHAN_CHANNEL7_Msk (_U_(0x1) << EVSYS_NSCHKCHAN_CHANNEL7_Pos) /**< (EVSYS_NSCHKCHAN) Channel 7 to be checked as non-secured Mask */
  572. #define EVSYS_NSCHKCHAN_CHANNEL7 EVSYS_NSCHKCHAN_CHANNEL7_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKCHAN_CHANNEL7_Msk instead */
  573. #define EVSYS_NSCHKCHAN_MASK _U_(0xFF) /**< \deprecated (EVSYS_NSCHKCHAN) Register MASK (Use EVSYS_NSCHKCHAN_Msk instead) */
  574. #define EVSYS_NSCHKCHAN_Msk _U_(0xFF) /**< (EVSYS_NSCHKCHAN) Register Mask */
  575. #define EVSYS_NSCHKCHAN_CHANNEL_Pos 0 /**< (EVSYS_NSCHKCHAN Position) Channel 7 to be checked as non-secured */
  576. #define EVSYS_NSCHKCHAN_CHANNEL_Msk (_U_(0xFF) << EVSYS_NSCHKCHAN_CHANNEL_Pos) /**< (EVSYS_NSCHKCHAN Mask) CHANNEL */
  577. #define EVSYS_NSCHKCHAN_CHANNEL(value) (EVSYS_NSCHKCHAN_CHANNEL_Msk & ((value) << EVSYS_NSCHKCHAN_CHANNEL_Pos))
  578. /* -------- EVSYS_NONSECUSER : (EVSYS Offset: 0x1e0) (R/W 32) Users Security Attribution -------- */
  579. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  580. typedef union {
  581. struct {
  582. uint32_t USER0:1; /**< bit: 0 Non-Secure for User 0 */
  583. uint32_t USER1:1; /**< bit: 1 Non-Secure for User 1 */
  584. uint32_t USER2:1; /**< bit: 2 Non-Secure for User 2 */
  585. uint32_t USER3:1; /**< bit: 3 Non-Secure for User 3 */
  586. uint32_t USER4:1; /**< bit: 4 Non-Secure for User 4 */
  587. uint32_t USER5:1; /**< bit: 5 Non-Secure for User 5 */
  588. uint32_t USER6:1; /**< bit: 6 Non-Secure for User 6 */
  589. uint32_t USER7:1; /**< bit: 7 Non-Secure for User 7 */
  590. uint32_t USER8:1; /**< bit: 8 Non-Secure for User 8 */
  591. uint32_t USER9:1; /**< bit: 9 Non-Secure for User 9 */
  592. uint32_t USER10:1; /**< bit: 10 Non-Secure for User 10 */
  593. uint32_t USER11:1; /**< bit: 11 Non-Secure for User 11 */
  594. uint32_t USER12:1; /**< bit: 12 Non-Secure for User 12 */
  595. uint32_t USER13:1; /**< bit: 13 Non-Secure for User 13 */
  596. uint32_t USER14:1; /**< bit: 14 Non-Secure for User 14 */
  597. uint32_t USER15:1; /**< bit: 15 Non-Secure for User 15 */
  598. uint32_t USER16:1; /**< bit: 16 Non-Secure for User 16 */
  599. uint32_t USER17:1; /**< bit: 17 Non-Secure for User 17 */
  600. uint32_t USER18:1; /**< bit: 18 Non-Secure for User 18 */
  601. uint32_t USER19:1; /**< bit: 19 Non-Secure for User 19 */
  602. uint32_t USER20:1; /**< bit: 20 Non-Secure for User 20 */
  603. uint32_t USER21:1; /**< bit: 21 Non-Secure for User 21 */
  604. uint32_t USER22:1; /**< bit: 22 Non-Secure for User 22 */
  605. uint32_t :9; /**< bit: 23..31 Reserved */
  606. } bit; /**< Structure used for bit access */
  607. struct {
  608. uint32_t USER:23; /**< bit: 0..22 Non-Secure for User 22 */
  609. uint32_t :9; /**< bit: 23..31 Reserved */
  610. } vec; /**< Structure used for vec access */
  611. uint32_t reg; /**< Type used for register access */
  612. } EVSYS_NONSECUSER_Type;
  613. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  614. #define EVSYS_NONSECUSER_OFFSET (0x1E0) /**< (EVSYS_NONSECUSER) Users Security Attribution Offset */
  615. #define EVSYS_NONSECUSER_RESETVALUE _U_(0x00) /**< (EVSYS_NONSECUSER) Users Security Attribution Reset Value */
  616. #define EVSYS_NONSECUSER_USER0_Pos 0 /**< (EVSYS_NONSECUSER) Non-Secure for User 0 Position */
  617. #define EVSYS_NONSECUSER_USER0_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER0_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 0 Mask */
  618. #define EVSYS_NONSECUSER_USER0 EVSYS_NONSECUSER_USER0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER0_Msk instead */
  619. #define EVSYS_NONSECUSER_USER1_Pos 1 /**< (EVSYS_NONSECUSER) Non-Secure for User 1 Position */
  620. #define EVSYS_NONSECUSER_USER1_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER1_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 1 Mask */
  621. #define EVSYS_NONSECUSER_USER1 EVSYS_NONSECUSER_USER1_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER1_Msk instead */
  622. #define EVSYS_NONSECUSER_USER2_Pos 2 /**< (EVSYS_NONSECUSER) Non-Secure for User 2 Position */
  623. #define EVSYS_NONSECUSER_USER2_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER2_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 2 Mask */
  624. #define EVSYS_NONSECUSER_USER2 EVSYS_NONSECUSER_USER2_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER2_Msk instead */
  625. #define EVSYS_NONSECUSER_USER3_Pos 3 /**< (EVSYS_NONSECUSER) Non-Secure for User 3 Position */
  626. #define EVSYS_NONSECUSER_USER3_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER3_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 3 Mask */
  627. #define EVSYS_NONSECUSER_USER3 EVSYS_NONSECUSER_USER3_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER3_Msk instead */
  628. #define EVSYS_NONSECUSER_USER4_Pos 4 /**< (EVSYS_NONSECUSER) Non-Secure for User 4 Position */
  629. #define EVSYS_NONSECUSER_USER4_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER4_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 4 Mask */
  630. #define EVSYS_NONSECUSER_USER4 EVSYS_NONSECUSER_USER4_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER4_Msk instead */
  631. #define EVSYS_NONSECUSER_USER5_Pos 5 /**< (EVSYS_NONSECUSER) Non-Secure for User 5 Position */
  632. #define EVSYS_NONSECUSER_USER5_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER5_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 5 Mask */
  633. #define EVSYS_NONSECUSER_USER5 EVSYS_NONSECUSER_USER5_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER5_Msk instead */
  634. #define EVSYS_NONSECUSER_USER6_Pos 6 /**< (EVSYS_NONSECUSER) Non-Secure for User 6 Position */
  635. #define EVSYS_NONSECUSER_USER6_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER6_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 6 Mask */
  636. #define EVSYS_NONSECUSER_USER6 EVSYS_NONSECUSER_USER6_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER6_Msk instead */
  637. #define EVSYS_NONSECUSER_USER7_Pos 7 /**< (EVSYS_NONSECUSER) Non-Secure for User 7 Position */
  638. #define EVSYS_NONSECUSER_USER7_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER7_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 7 Mask */
  639. #define EVSYS_NONSECUSER_USER7 EVSYS_NONSECUSER_USER7_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER7_Msk instead */
  640. #define EVSYS_NONSECUSER_USER8_Pos 8 /**< (EVSYS_NONSECUSER) Non-Secure for User 8 Position */
  641. #define EVSYS_NONSECUSER_USER8_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER8_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 8 Mask */
  642. #define EVSYS_NONSECUSER_USER8 EVSYS_NONSECUSER_USER8_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER8_Msk instead */
  643. #define EVSYS_NONSECUSER_USER9_Pos 9 /**< (EVSYS_NONSECUSER) Non-Secure for User 9 Position */
  644. #define EVSYS_NONSECUSER_USER9_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER9_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 9 Mask */
  645. #define EVSYS_NONSECUSER_USER9 EVSYS_NONSECUSER_USER9_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER9_Msk instead */
  646. #define EVSYS_NONSECUSER_USER10_Pos 10 /**< (EVSYS_NONSECUSER) Non-Secure for User 10 Position */
  647. #define EVSYS_NONSECUSER_USER10_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER10_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 10 Mask */
  648. #define EVSYS_NONSECUSER_USER10 EVSYS_NONSECUSER_USER10_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER10_Msk instead */
  649. #define EVSYS_NONSECUSER_USER11_Pos 11 /**< (EVSYS_NONSECUSER) Non-Secure for User 11 Position */
  650. #define EVSYS_NONSECUSER_USER11_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER11_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 11 Mask */
  651. #define EVSYS_NONSECUSER_USER11 EVSYS_NONSECUSER_USER11_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER11_Msk instead */
  652. #define EVSYS_NONSECUSER_USER12_Pos 12 /**< (EVSYS_NONSECUSER) Non-Secure for User 12 Position */
  653. #define EVSYS_NONSECUSER_USER12_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER12_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 12 Mask */
  654. #define EVSYS_NONSECUSER_USER12 EVSYS_NONSECUSER_USER12_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER12_Msk instead */
  655. #define EVSYS_NONSECUSER_USER13_Pos 13 /**< (EVSYS_NONSECUSER) Non-Secure for User 13 Position */
  656. #define EVSYS_NONSECUSER_USER13_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER13_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 13 Mask */
  657. #define EVSYS_NONSECUSER_USER13 EVSYS_NONSECUSER_USER13_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER13_Msk instead */
  658. #define EVSYS_NONSECUSER_USER14_Pos 14 /**< (EVSYS_NONSECUSER) Non-Secure for User 14 Position */
  659. #define EVSYS_NONSECUSER_USER14_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER14_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 14 Mask */
  660. #define EVSYS_NONSECUSER_USER14 EVSYS_NONSECUSER_USER14_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER14_Msk instead */
  661. #define EVSYS_NONSECUSER_USER15_Pos 15 /**< (EVSYS_NONSECUSER) Non-Secure for User 15 Position */
  662. #define EVSYS_NONSECUSER_USER15_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER15_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 15 Mask */
  663. #define EVSYS_NONSECUSER_USER15 EVSYS_NONSECUSER_USER15_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER15_Msk instead */
  664. #define EVSYS_NONSECUSER_USER16_Pos 16 /**< (EVSYS_NONSECUSER) Non-Secure for User 16 Position */
  665. #define EVSYS_NONSECUSER_USER16_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER16_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 16 Mask */
  666. #define EVSYS_NONSECUSER_USER16 EVSYS_NONSECUSER_USER16_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER16_Msk instead */
  667. #define EVSYS_NONSECUSER_USER17_Pos 17 /**< (EVSYS_NONSECUSER) Non-Secure for User 17 Position */
  668. #define EVSYS_NONSECUSER_USER17_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER17_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 17 Mask */
  669. #define EVSYS_NONSECUSER_USER17 EVSYS_NONSECUSER_USER17_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER17_Msk instead */
  670. #define EVSYS_NONSECUSER_USER18_Pos 18 /**< (EVSYS_NONSECUSER) Non-Secure for User 18 Position */
  671. #define EVSYS_NONSECUSER_USER18_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER18_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 18 Mask */
  672. #define EVSYS_NONSECUSER_USER18 EVSYS_NONSECUSER_USER18_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER18_Msk instead */
  673. #define EVSYS_NONSECUSER_USER19_Pos 19 /**< (EVSYS_NONSECUSER) Non-Secure for User 19 Position */
  674. #define EVSYS_NONSECUSER_USER19_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER19_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 19 Mask */
  675. #define EVSYS_NONSECUSER_USER19 EVSYS_NONSECUSER_USER19_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER19_Msk instead */
  676. #define EVSYS_NONSECUSER_USER20_Pos 20 /**< (EVSYS_NONSECUSER) Non-Secure for User 20 Position */
  677. #define EVSYS_NONSECUSER_USER20_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER20_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 20 Mask */
  678. #define EVSYS_NONSECUSER_USER20 EVSYS_NONSECUSER_USER20_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER20_Msk instead */
  679. #define EVSYS_NONSECUSER_USER21_Pos 21 /**< (EVSYS_NONSECUSER) Non-Secure for User 21 Position */
  680. #define EVSYS_NONSECUSER_USER21_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER21_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 21 Mask */
  681. #define EVSYS_NONSECUSER_USER21 EVSYS_NONSECUSER_USER21_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER21_Msk instead */
  682. #define EVSYS_NONSECUSER_USER22_Pos 22 /**< (EVSYS_NONSECUSER) Non-Secure for User 22 Position */
  683. #define EVSYS_NONSECUSER_USER22_Msk (_U_(0x1) << EVSYS_NONSECUSER_USER22_Pos) /**< (EVSYS_NONSECUSER) Non-Secure for User 22 Mask */
  684. #define EVSYS_NONSECUSER_USER22 EVSYS_NONSECUSER_USER22_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NONSECUSER_USER22_Msk instead */
  685. #define EVSYS_NONSECUSER_MASK _U_(0x7FFFFF) /**< \deprecated (EVSYS_NONSECUSER) Register MASK (Use EVSYS_NONSECUSER_Msk instead) */
  686. #define EVSYS_NONSECUSER_Msk _U_(0x7FFFFF) /**< (EVSYS_NONSECUSER) Register Mask */
  687. #define EVSYS_NONSECUSER_USER_Pos 0 /**< (EVSYS_NONSECUSER Position) Non-Secure for User 22 */
  688. #define EVSYS_NONSECUSER_USER_Msk (_U_(0x7FFFFF) << EVSYS_NONSECUSER_USER_Pos) /**< (EVSYS_NONSECUSER Mask) USER */
  689. #define EVSYS_NONSECUSER_USER(value) (EVSYS_NONSECUSER_USER_Msk & ((value) << EVSYS_NONSECUSER_USER_Pos))
  690. /* -------- EVSYS_NSCHKUSER : (EVSYS Offset: 0x1f0) (R/W 32) Non-Secure Users Check -------- */
  691. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  692. typedef union {
  693. struct {
  694. uint32_t USER0:1; /**< bit: 0 User 0 to be checked as non-secured */
  695. uint32_t USER1:1; /**< bit: 1 User 1 to be checked as non-secured */
  696. uint32_t USER2:1; /**< bit: 2 User 2 to be checked as non-secured */
  697. uint32_t USER3:1; /**< bit: 3 User 3 to be checked as non-secured */
  698. uint32_t USER4:1; /**< bit: 4 User 4 to be checked as non-secured */
  699. uint32_t USER5:1; /**< bit: 5 User 5 to be checked as non-secured */
  700. uint32_t USER6:1; /**< bit: 6 User 6 to be checked as non-secured */
  701. uint32_t USER7:1; /**< bit: 7 User 7 to be checked as non-secured */
  702. uint32_t USER8:1; /**< bit: 8 User 8 to be checked as non-secured */
  703. uint32_t USER9:1; /**< bit: 9 User 9 to be checked as non-secured */
  704. uint32_t USER10:1; /**< bit: 10 User 10 to be checked as non-secured */
  705. uint32_t USER11:1; /**< bit: 11 User 11 to be checked as non-secured */
  706. uint32_t USER12:1; /**< bit: 12 User 12 to be checked as non-secured */
  707. uint32_t USER13:1; /**< bit: 13 User 13 to be checked as non-secured */
  708. uint32_t USER14:1; /**< bit: 14 User 14 to be checked as non-secured */
  709. uint32_t USER15:1; /**< bit: 15 User 15 to be checked as non-secured */
  710. uint32_t USER16:1; /**< bit: 16 User 16 to be checked as non-secured */
  711. uint32_t USER17:1; /**< bit: 17 User 17 to be checked as non-secured */
  712. uint32_t USER18:1; /**< bit: 18 User 18 to be checked as non-secured */
  713. uint32_t USER19:1; /**< bit: 19 User 19 to be checked as non-secured */
  714. uint32_t USER20:1; /**< bit: 20 User 20 to be checked as non-secured */
  715. uint32_t USER21:1; /**< bit: 21 User 21 to be checked as non-secured */
  716. uint32_t USER22:1; /**< bit: 22 User 22 to be checked as non-secured */
  717. uint32_t :9; /**< bit: 23..31 Reserved */
  718. } bit; /**< Structure used for bit access */
  719. struct {
  720. uint32_t USER:23; /**< bit: 0..22 User 22 to be checked as non-secured */
  721. uint32_t :9; /**< bit: 23..31 Reserved */
  722. } vec; /**< Structure used for vec access */
  723. uint32_t reg; /**< Type used for register access */
  724. } EVSYS_NSCHKUSER_Type;
  725. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  726. #define EVSYS_NSCHKUSER_OFFSET (0x1F0) /**< (EVSYS_NSCHKUSER) Non-Secure Users Check Offset */
  727. #define EVSYS_NSCHKUSER_RESETVALUE _U_(0x00) /**< (EVSYS_NSCHKUSER) Non-Secure Users Check Reset Value */
  728. #define EVSYS_NSCHKUSER_USER0_Pos 0 /**< (EVSYS_NSCHKUSER) User 0 to be checked as non-secured Position */
  729. #define EVSYS_NSCHKUSER_USER0_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER0_Pos) /**< (EVSYS_NSCHKUSER) User 0 to be checked as non-secured Mask */
  730. #define EVSYS_NSCHKUSER_USER0 EVSYS_NSCHKUSER_USER0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER0_Msk instead */
  731. #define EVSYS_NSCHKUSER_USER1_Pos 1 /**< (EVSYS_NSCHKUSER) User 1 to be checked as non-secured Position */
  732. #define EVSYS_NSCHKUSER_USER1_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER1_Pos) /**< (EVSYS_NSCHKUSER) User 1 to be checked as non-secured Mask */
  733. #define EVSYS_NSCHKUSER_USER1 EVSYS_NSCHKUSER_USER1_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER1_Msk instead */
  734. #define EVSYS_NSCHKUSER_USER2_Pos 2 /**< (EVSYS_NSCHKUSER) User 2 to be checked as non-secured Position */
  735. #define EVSYS_NSCHKUSER_USER2_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER2_Pos) /**< (EVSYS_NSCHKUSER) User 2 to be checked as non-secured Mask */
  736. #define EVSYS_NSCHKUSER_USER2 EVSYS_NSCHKUSER_USER2_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER2_Msk instead */
  737. #define EVSYS_NSCHKUSER_USER3_Pos 3 /**< (EVSYS_NSCHKUSER) User 3 to be checked as non-secured Position */
  738. #define EVSYS_NSCHKUSER_USER3_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER3_Pos) /**< (EVSYS_NSCHKUSER) User 3 to be checked as non-secured Mask */
  739. #define EVSYS_NSCHKUSER_USER3 EVSYS_NSCHKUSER_USER3_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER3_Msk instead */
  740. #define EVSYS_NSCHKUSER_USER4_Pos 4 /**< (EVSYS_NSCHKUSER) User 4 to be checked as non-secured Position */
  741. #define EVSYS_NSCHKUSER_USER4_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER4_Pos) /**< (EVSYS_NSCHKUSER) User 4 to be checked as non-secured Mask */
  742. #define EVSYS_NSCHKUSER_USER4 EVSYS_NSCHKUSER_USER4_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER4_Msk instead */
  743. #define EVSYS_NSCHKUSER_USER5_Pos 5 /**< (EVSYS_NSCHKUSER) User 5 to be checked as non-secured Position */
  744. #define EVSYS_NSCHKUSER_USER5_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER5_Pos) /**< (EVSYS_NSCHKUSER) User 5 to be checked as non-secured Mask */
  745. #define EVSYS_NSCHKUSER_USER5 EVSYS_NSCHKUSER_USER5_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER5_Msk instead */
  746. #define EVSYS_NSCHKUSER_USER6_Pos 6 /**< (EVSYS_NSCHKUSER) User 6 to be checked as non-secured Position */
  747. #define EVSYS_NSCHKUSER_USER6_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER6_Pos) /**< (EVSYS_NSCHKUSER) User 6 to be checked as non-secured Mask */
  748. #define EVSYS_NSCHKUSER_USER6 EVSYS_NSCHKUSER_USER6_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER6_Msk instead */
  749. #define EVSYS_NSCHKUSER_USER7_Pos 7 /**< (EVSYS_NSCHKUSER) User 7 to be checked as non-secured Position */
  750. #define EVSYS_NSCHKUSER_USER7_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER7_Pos) /**< (EVSYS_NSCHKUSER) User 7 to be checked as non-secured Mask */
  751. #define EVSYS_NSCHKUSER_USER7 EVSYS_NSCHKUSER_USER7_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER7_Msk instead */
  752. #define EVSYS_NSCHKUSER_USER8_Pos 8 /**< (EVSYS_NSCHKUSER) User 8 to be checked as non-secured Position */
  753. #define EVSYS_NSCHKUSER_USER8_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER8_Pos) /**< (EVSYS_NSCHKUSER) User 8 to be checked as non-secured Mask */
  754. #define EVSYS_NSCHKUSER_USER8 EVSYS_NSCHKUSER_USER8_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER8_Msk instead */
  755. #define EVSYS_NSCHKUSER_USER9_Pos 9 /**< (EVSYS_NSCHKUSER) User 9 to be checked as non-secured Position */
  756. #define EVSYS_NSCHKUSER_USER9_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER9_Pos) /**< (EVSYS_NSCHKUSER) User 9 to be checked as non-secured Mask */
  757. #define EVSYS_NSCHKUSER_USER9 EVSYS_NSCHKUSER_USER9_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER9_Msk instead */
  758. #define EVSYS_NSCHKUSER_USER10_Pos 10 /**< (EVSYS_NSCHKUSER) User 10 to be checked as non-secured Position */
  759. #define EVSYS_NSCHKUSER_USER10_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER10_Pos) /**< (EVSYS_NSCHKUSER) User 10 to be checked as non-secured Mask */
  760. #define EVSYS_NSCHKUSER_USER10 EVSYS_NSCHKUSER_USER10_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER10_Msk instead */
  761. #define EVSYS_NSCHKUSER_USER11_Pos 11 /**< (EVSYS_NSCHKUSER) User 11 to be checked as non-secured Position */
  762. #define EVSYS_NSCHKUSER_USER11_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER11_Pos) /**< (EVSYS_NSCHKUSER) User 11 to be checked as non-secured Mask */
  763. #define EVSYS_NSCHKUSER_USER11 EVSYS_NSCHKUSER_USER11_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER11_Msk instead */
  764. #define EVSYS_NSCHKUSER_USER12_Pos 12 /**< (EVSYS_NSCHKUSER) User 12 to be checked as non-secured Position */
  765. #define EVSYS_NSCHKUSER_USER12_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER12_Pos) /**< (EVSYS_NSCHKUSER) User 12 to be checked as non-secured Mask */
  766. #define EVSYS_NSCHKUSER_USER12 EVSYS_NSCHKUSER_USER12_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER12_Msk instead */
  767. #define EVSYS_NSCHKUSER_USER13_Pos 13 /**< (EVSYS_NSCHKUSER) User 13 to be checked as non-secured Position */
  768. #define EVSYS_NSCHKUSER_USER13_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER13_Pos) /**< (EVSYS_NSCHKUSER) User 13 to be checked as non-secured Mask */
  769. #define EVSYS_NSCHKUSER_USER13 EVSYS_NSCHKUSER_USER13_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER13_Msk instead */
  770. #define EVSYS_NSCHKUSER_USER14_Pos 14 /**< (EVSYS_NSCHKUSER) User 14 to be checked as non-secured Position */
  771. #define EVSYS_NSCHKUSER_USER14_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER14_Pos) /**< (EVSYS_NSCHKUSER) User 14 to be checked as non-secured Mask */
  772. #define EVSYS_NSCHKUSER_USER14 EVSYS_NSCHKUSER_USER14_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER14_Msk instead */
  773. #define EVSYS_NSCHKUSER_USER15_Pos 15 /**< (EVSYS_NSCHKUSER) User 15 to be checked as non-secured Position */
  774. #define EVSYS_NSCHKUSER_USER15_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER15_Pos) /**< (EVSYS_NSCHKUSER) User 15 to be checked as non-secured Mask */
  775. #define EVSYS_NSCHKUSER_USER15 EVSYS_NSCHKUSER_USER15_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER15_Msk instead */
  776. #define EVSYS_NSCHKUSER_USER16_Pos 16 /**< (EVSYS_NSCHKUSER) User 16 to be checked as non-secured Position */
  777. #define EVSYS_NSCHKUSER_USER16_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER16_Pos) /**< (EVSYS_NSCHKUSER) User 16 to be checked as non-secured Mask */
  778. #define EVSYS_NSCHKUSER_USER16 EVSYS_NSCHKUSER_USER16_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER16_Msk instead */
  779. #define EVSYS_NSCHKUSER_USER17_Pos 17 /**< (EVSYS_NSCHKUSER) User 17 to be checked as non-secured Position */
  780. #define EVSYS_NSCHKUSER_USER17_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER17_Pos) /**< (EVSYS_NSCHKUSER) User 17 to be checked as non-secured Mask */
  781. #define EVSYS_NSCHKUSER_USER17 EVSYS_NSCHKUSER_USER17_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER17_Msk instead */
  782. #define EVSYS_NSCHKUSER_USER18_Pos 18 /**< (EVSYS_NSCHKUSER) User 18 to be checked as non-secured Position */
  783. #define EVSYS_NSCHKUSER_USER18_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER18_Pos) /**< (EVSYS_NSCHKUSER) User 18 to be checked as non-secured Mask */
  784. #define EVSYS_NSCHKUSER_USER18 EVSYS_NSCHKUSER_USER18_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER18_Msk instead */
  785. #define EVSYS_NSCHKUSER_USER19_Pos 19 /**< (EVSYS_NSCHKUSER) User 19 to be checked as non-secured Position */
  786. #define EVSYS_NSCHKUSER_USER19_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER19_Pos) /**< (EVSYS_NSCHKUSER) User 19 to be checked as non-secured Mask */
  787. #define EVSYS_NSCHKUSER_USER19 EVSYS_NSCHKUSER_USER19_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER19_Msk instead */
  788. #define EVSYS_NSCHKUSER_USER20_Pos 20 /**< (EVSYS_NSCHKUSER) User 20 to be checked as non-secured Position */
  789. #define EVSYS_NSCHKUSER_USER20_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER20_Pos) /**< (EVSYS_NSCHKUSER) User 20 to be checked as non-secured Mask */
  790. #define EVSYS_NSCHKUSER_USER20 EVSYS_NSCHKUSER_USER20_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER20_Msk instead */
  791. #define EVSYS_NSCHKUSER_USER21_Pos 21 /**< (EVSYS_NSCHKUSER) User 21 to be checked as non-secured Position */
  792. #define EVSYS_NSCHKUSER_USER21_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER21_Pos) /**< (EVSYS_NSCHKUSER) User 21 to be checked as non-secured Mask */
  793. #define EVSYS_NSCHKUSER_USER21 EVSYS_NSCHKUSER_USER21_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER21_Msk instead */
  794. #define EVSYS_NSCHKUSER_USER22_Pos 22 /**< (EVSYS_NSCHKUSER) User 22 to be checked as non-secured Position */
  795. #define EVSYS_NSCHKUSER_USER22_Msk (_U_(0x1) << EVSYS_NSCHKUSER_USER22_Pos) /**< (EVSYS_NSCHKUSER) User 22 to be checked as non-secured Mask */
  796. #define EVSYS_NSCHKUSER_USER22 EVSYS_NSCHKUSER_USER22_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use EVSYS_NSCHKUSER_USER22_Msk instead */
  797. #define EVSYS_NSCHKUSER_MASK _U_(0x7FFFFF) /**< \deprecated (EVSYS_NSCHKUSER) Register MASK (Use EVSYS_NSCHKUSER_Msk instead) */
  798. #define EVSYS_NSCHKUSER_Msk _U_(0x7FFFFF) /**< (EVSYS_NSCHKUSER) Register Mask */
  799. #define EVSYS_NSCHKUSER_USER_Pos 0 /**< (EVSYS_NSCHKUSER Position) User 22 to be checked as non-secured */
  800. #define EVSYS_NSCHKUSER_USER_Msk (_U_(0x7FFFFF) << EVSYS_NSCHKUSER_USER_Pos) /**< (EVSYS_NSCHKUSER Mask) USER */
  801. #define EVSYS_NSCHKUSER_USER(value) (EVSYS_NSCHKUSER_USER_Msk & ((value) << EVSYS_NSCHKUSER_USER_Pos))
  802. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  803. /** \brief CHANNEL hardware registers */
  804. typedef struct {
  805. __IO EVSYS_CHANNEL_Type CHANNEL; /**< Offset: 0x00 (R/W 32) Channel n Control */
  806. __IO EVSYS_CHINTENCLR_Type CHINTENCLR; /**< Offset: 0x04 (R/W 8) Channel n Interrupt Enable Clear */
  807. __IO EVSYS_CHINTENSET_Type CHINTENSET; /**< Offset: 0x05 (R/W 8) Channel n Interrupt Enable Set */
  808. __IO EVSYS_CHINTFLAG_Type CHINTFLAG; /**< Offset: 0x06 (R/W 8) Channel n Interrupt Flag Status and Clear */
  809. __I EVSYS_CHSTATUS_Type CHSTATUS; /**< Offset: 0x07 (R/ 8) Channel n Status */
  810. } EvsysChannel;
  811. /** \brief EVSYS hardware registers */
  812. typedef struct { /* Event System Interface */
  813. __O EVSYS_CTRLA_Type CTRLA; /**< Offset: 0x00 ( /W 8) Control */
  814. __I uint8_t Reserved1[3];
  815. __O EVSYS_SWEVT_Type SWEVT; /**< Offset: 0x04 ( /W 32) Software Event */
  816. __IO EVSYS_PRICTRL_Type PRICTRL; /**< Offset: 0x08 (R/W 8) Priority Control */
  817. __I uint8_t Reserved2[7];
  818. __IO EVSYS_INTPEND_Type INTPEND; /**< Offset: 0x10 (R/W 16) Channel Pending Interrupt */
  819. __I uint8_t Reserved3[2];
  820. __I EVSYS_INTSTATUS_Type INTSTATUS; /**< Offset: 0x14 (R/ 32) Interrupt Status */
  821. __I EVSYS_BUSYCH_Type BUSYCH; /**< Offset: 0x18 (R/ 32) Busy Channels */
  822. __I EVSYS_READYUSR_Type READYUSR; /**< Offset: 0x1C (R/ 32) Ready Users */
  823. EvsysChannel Channel[8]; /**< Offset: 0x20 */
  824. __I uint8_t Reserved4[192];
  825. __IO EVSYS_USER_Type USER[23]; /**< Offset: 0x120 (R/W 8) User Multiplexer n */
  826. __I uint8_t Reserved5[157];
  827. __IO EVSYS_INTENCLR_Type INTENCLR; /**< Offset: 0x1D4 (R/W 8) Interrupt Enable Clear */
  828. __IO EVSYS_INTENSET_Type INTENSET; /**< Offset: 0x1D5 (R/W 8) Interrupt Enable Set */
  829. __IO EVSYS_INTFLAG_Type INTFLAG; /**< Offset: 0x1D6 (R/W 8) Interrupt Flag Status and Clear */
  830. __I uint8_t Reserved6[1];
  831. __IO EVSYS_NONSECCHAN_Type NONSECCHAN; /**< Offset: 0x1D8 (R/W 32) Channels Security Attribution */
  832. __IO EVSYS_NSCHKCHAN_Type NSCHKCHAN; /**< Offset: 0x1DC (R/W 32) Non-Secure Channels Check */
  833. __IO EVSYS_NONSECUSER_Type NONSECUSER[1]; /**< Offset: 0x1E0 (R/W 32) Users Security Attribution */
  834. __I uint8_t Reserved7[12];
  835. __IO EVSYS_NSCHKUSER_Type NSCHKUSER[1]; /**< Offset: 0x1F0 (R/W 32) Non-Secure Users Check */
  836. } Evsys;
  837. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  838. /** @} end of Event System Interface */
  839. #endif /* _SAML11_EVSYS_COMPONENT_H_ */