MPC5676R_hal.c 10 KB

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  1. /*
  2. This file is part of the ChipWhisperer Example Targets
  3. Copyright (C) 2019-2020 NewAE Technology Inc.
  4. This program is free software: you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation, either version 3 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program. If not, see <http://www.gnu.org/licenses/>.
  14. */
  15. #include "nxp/config/Cpu.h"
  16. #include "nxp/config/canCom1.h"
  17. #include "nxp/config/pin_mux.h"
  18. #include "nxp/config/uart_pal1.h"
  19. #include "nxp/drivers/inc/uart_esci_callback.h"
  20. #include "MPC5676R_hal.h"
  21. #define TIMEOUT (200U)
  22. #include <stdint.h>
  23. #include <stdbool.h>
  24. #include <string.h>
  25. #if 0
  26. #include "board.h"
  27. #include "fsl_dcp.h"
  28. #include "fsl_lpuart.h"
  29. #include "fsl_snvs_lp.h"
  30. #include "pin_mux.h"
  31. #include "system_MPC5676R.h"
  32. #include "clock_config.h"
  33. #endif
  34. #define LED_PORT PTD
  35. #define LED0 0U
  36. #define LED1 1U
  37. #define BTN_PORT PTE
  38. #define BTN0_PIN 6U
  39. #define BTN1_PIN 7U
  40. #define BTN0_EIRQ 8U
  41. #define BTN1_EIRQ 9U
  42. #define FLASH_REG FLASH_A.BIUCR.R
  43. #define FLASH_DATA 0x00016B35
  44. #define FLASH_REG2 FLASH_A.BIUCR3.R
  45. #define FLASH_DATA2 0x00020015
  46. /* This function is defined in some other functions too */
  47. __attribute__ ((weak)) void uart_puts(char * s){
  48. while(*s){
  49. putch(*(s++));
  50. }
  51. }
  52. void init_uart(void)
  53. {
  54. UART_Init(&uart_pal1_instance, &uart_pal1_Config0);
  55. }
  56. void putch(char c)
  57. {
  58. /* Ensure all the data in the transmit buffer are sent out to bus. */
  59. char local = c;
  60. uint8_t* mssg = &local;
  61. // UART_SendData(&uart_pal1_instance, (uint8_t *)mssg, 1);
  62. ESCI_HW_SendCharacter(0, c);
  63. // while (!ESCI_HW_GetSendReadyFlag(0));
  64. // ESCI_HW_ClearSendReadyFlag(0);
  65. }
  66. char getch(void)
  67. {
  68. char mssg;
  69. while (!ESCI_HW_GetReceiveReadyFlag(0));
  70. ESCI_HW_ClearReceiveReadyFlag(0);
  71. UART_ReceiveDataBlocking(&uart_pal1_instance, &mssg, 1,TIMEOUT);
  72. return mssg;
  73. }
  74. void trigger_setup(void)
  75. {
  76. //Setup is done in pin_mux file
  77. ;
  78. }
  79. void trigger_high(void)
  80. {
  81. // PINS_DRV_WritePin(SIU, 160, 1);
  82. pin_settings_config_t trig_config = {
  83. .base = SIU,
  84. .pinPortIdx = 160u,
  85. .mux = PORT_MUX_AS_GPIO,
  86. .outputBuffer = PORT_OUTPUT_BUFFER_ENABLED,
  87. .slewRateCtrl = HALF_STRENGTH_WITH_SLEWRATE_CONTROL,
  88. .openDrain = PORT_OPEN_DRAIN_DISABLED,
  89. .hysteresis = PORT_HYSTERESYS_DISABLED,
  90. .driveSelect = PORT_MINIMUM_DRIVE_STRENGTH,
  91. .inputBuffer = PORT_INPUT_BUFFER_DISABLED,
  92. .pullConfig = PORT_INTERNAL_PULL_NOT_ENABLED,
  93. .initValue = 1u,
  94. };
  95. PINS_DRV_Init(1, &trig_config);
  96. ;
  97. }
  98. void trigger_low(void)
  99. {
  100. pin_settings_config_t trig_config = {
  101. .base = SIU,
  102. .pinPortIdx = 160u,
  103. .mux = PORT_MUX_AS_GPIO,
  104. .outputBuffer = PORT_OUTPUT_BUFFER_ENABLED,
  105. .slewRateCtrl = HALF_STRENGTH_WITH_SLEWRATE_CONTROL,
  106. .openDrain = PORT_OPEN_DRAIN_DISABLED,
  107. .hysteresis = PORT_HYSTERESYS_DISABLED,
  108. .driveSelect = PORT_MINIMUM_DRIVE_STRENGTH,
  109. .inputBuffer = PORT_INPUT_BUFFER_DISABLED,
  110. .pullConfig = PORT_INTERNAL_PULL_NOT_ENABLED,
  111. .initValue = 0u,
  112. };
  113. // PINS_DRV_WritePin(SIU, 160, 0);
  114. PINS_DRV_Init(1, &trig_config);
  115. ;
  116. }
  117. /*******************************************************************************
  118. * Definitions
  119. ******************************************************************************/
  120. #define EXAMPLE_LED_GPIO BOARD_USER_LED_GPIO
  121. #define EXAMPLE_LED_GPIO_PIN BOARD_USER_LED_PIN
  122. /*******************************************************************************
  123. * Prototypes
  124. ******************************************************************************/
  125. /*******************************************************************************
  126. Function Name : Flash_Init
  127. Engineer : b55689
  128. Date : Jan-12-2018
  129. Parameters :
  130. Modifies :
  131. Returns :
  132. Notes : necessary for correct functionality of core 1
  133. Issues :
  134. *******************************************************************************/
  135. static void FlashInit(void)
  136. {
  137. unsigned int mem_write_code [] =
  138. {
  139. /*for processors which support VLE only or for 'VLE on' option*/
  140. 0xD0344400, /* stw r3,(0)r4 machine code: writes r3 contents to addr in r4 then se_nop*/
  141. 0x7C0006AC, /* mbar machine code: ensure prior store completed */
  142. 0x44000004 /* blr machine code: branches to return address in link register */
  143. };
  144. typedef void (*mem_write_code_ptr_t)(unsigned int, unsigned int);
  145. #if defined(FLASH_REG)
  146. #if FLASH_DATA > 0
  147. (*((mem_write_code_ptr_t)mem_write_code)) /* cast mem_write_code as func ptr*/
  148. /* * de-references func ptr, i.e. converts to func*/
  149. (FLASH_DATA, /* which passes integer (in r3) */
  150. (unsigned int)&FLASH_REG);
  151. #endif
  152. #endif
  153. #if defined(FLASH_REG2)
  154. (*((mem_write_code_ptr_t)mem_write_code)) /* cast mem_write_code as func ptr*/
  155. /* * de-references func ptr, i.e. converts to func*/
  156. (FLASH_DATA2, /* which passes integer (in r3) */
  157. (unsigned int)&FLASH_REG2);
  158. #endif
  159. }
  160. /*******************************************************************************
  161. Function Name : XBAR_Init
  162. Engineer : b55689
  163. Date : Jan-12-2018
  164. Parameters :
  165. Modifies :
  166. Returns :
  167. Notes :
  168. Issues :
  169. *******************************************************************************/
  170. static void XbarInit(void)
  171. {
  172. /* set round robin for all slaves */
  173. XBAR.SGPCR0.B.ARB = 1;
  174. XBAR.SGPCR1.B.ARB = 1;
  175. XBAR.SGPCR2.B.ARB = 1;
  176. XBAR.SGPCR3.B.ARB = 1;
  177. XBAR.SGPCR6.B.ARB = 1;
  178. XBAR.SGPCR7.B.ARB = 1;
  179. }
  180. /*******************************************************************************
  181. Function Name : PIT3_Init
  182. Engineer : b05111
  183. Date : Mar-04-2012
  184. Parameters :
  185. Modifies :
  186. Returns :
  187. Notes : expecting fsys = 180MHz, Init PIT for 1 second period
  188. Issues :
  189. *******************************************************************************/
  190. static void PIT3Init(void)
  191. {
  192. /* 30: MDIS = 0 to enable clock for PITs. */
  193. /* 31: FRZ = 1 for Timers stopped in debug mode */
  194. PIT->MCR = 0x00000001;
  195. PIT->TIMER[3].LDVAL = 18000000 - 1;
  196. /* clear the TIF flag */
  197. PIT->TIMER[3].TFLG = 0x00000001;
  198. /* 30: TIE = 1 for interrupt request enabled */
  199. // 31: TEN = 1 for timer active */
  200. PIT->TIMER[3].TCTRL = 0x00000003;
  201. }
  202. /*
  203. * @brief : Initialize clocks, pins and power modes
  204. */
  205. void BoardInit(void)
  206. {
  207. PINS_DRV_Init(NUM_OF_CONFIGURED_PINS, g_pin_mux_InitConfigArr);
  208. // FMPLL.ESYNCR1.B.CLKCFG = 7; /* Normal mode with crystal osc */
  209. // FMPLL.ESYNCR1.B.CLKCFG = 0; /* Normal mode with crystal osc */
  210. /* Programming PLL to 60 MHz */
  211. /* Fpll = (10Mhz* (EMFD+16)) / ((ERFD+1) * (EPREDIV+1) * DIV2) */
  212. /* Fpll = (10 * 54 / 9) = 60MHz */
  213. // FMPLL.ESYNCR2.R = 0x00000002; /* Output divide ratio: 2+1=3 */
  214. // FMPLL.ESYNCR1.B.EPREDIV = 5; /* Input divide ratio: 5+1=6 */
  215. // FMPLL.ESYNCR1.B.EMFD = 38; /* Feedback divide ratio: 38+16=54 */
  216. // while(!FMPLL.SYNSR.B.LOCK) {;} /* Wait for FMPLL to lock */
  217. // VERY IMPORTANT:
  218. // The endianness of the datasheet is opposite
  219. // To the C representation
  220. // So bit 0 on the datasheet is bit 31 here
  221. // Probably powerpc bs
  222. if (SIU->SYSDIV & (1 << 31)) {
  223. SIU->SYSDIV &= ~(1 << 31);
  224. }
  225. uint32_t sysdiv = SIU->SYSDIV;
  226. //sysclock = xosc
  227. sysdiv &= ~(0b11 << 12);
  228. sysdiv |= 0b01 << 12; //10 for ext oscillator
  229. // turn off bypass
  230. // sysdiv &= ~(0b1 << 4);
  231. sysdiv &= ~(0b11 << 2); // sysclock/2 for m_clk
  232. SIU->SYSDIV = sysdiv;
  233. pin_settings_config_t clkokconfig = {
  234. .base = SIU,
  235. .pinPortIdx = 199,
  236. .mux = PORT_MUX_AS_GPIO,
  237. .outputBuffer = PORT_OUTPUT_BUFFER_ENABLED,
  238. .slewRateCtrl = HALF_STRENGTH_WITH_SLEWRATE_CONTROL,
  239. .openDrain = PORT_OPEN_DRAIN_DISABLED,
  240. .hysteresis = PORT_HYSTERESYS_DISABLED,
  241. .driveSelect = PORT_MINIMUM_DRIVE_STRENGTH,
  242. .inputBuffer = PORT_INPUT_BUFFER_DISABLED,
  243. .pullConfig = PORT_INTERNAL_PULL_NOT_ENABLED,
  244. .initValue = 1u,
  245. };
  246. // PINS_DRV_WritePin(SIU, 160, 0);
  247. PINS_DRV_Init(1, &clkokconfig);
  248. // SIU_SYSDIV_BYPASS_MASK
  249. // SIU->SYSDIV = (SIU->SYSDIV & ~SIU_SYSDIV_BYPASS_MASK) | SIU_SYSDIV_BYPASS(1U);
  250. //SIU->SYSDIV = (SIU->SYSDIV & ~SIU_SYSDIV_SYSCLKSEL_MASK) | SIU_SYSDIV_SYSCLKSEL(2U);
  251. }
  252. /*******************************************************************************
  253. * Variables
  254. ******************************************************************************/
  255. volatile uint32_t g_systickCounter;
  256. /* The PIN status */
  257. volatile bool g_pinSet = false;
  258. /*******************************************************************************
  259. * Code
  260. ******************************************************************************/
  261. void SysTick_Handler(void)
  262. {
  263. if (g_systickCounter != 0U)
  264. {
  265. g_systickCounter--;
  266. }
  267. }
  268. void SysTick_DelayTicks(uint32_t n)
  269. {
  270. g_systickCounter = n;
  271. while (g_systickCounter != 0U)
  272. {
  273. }
  274. }
  275. void platform_init(void)
  276. {
  277. //FlashInit();
  278. //XbarInit();
  279. BoardInit();
  280. /*
  281. * Initialize FlexCAN driver
  282. * - 8 byte payload size
  283. * - FD disabled
  284. * - Oscillator clock as peripheral engine clock
  285. */
  286. FLEXCAN_DRV_Init(INST_CANCOM1, &canCom1_State, &canCom1_InitConfig0);
  287. }
  288. // const uint32_t __attribute__((section (".rchw")))user_rchw[] = {
  289. // 0x005A0000,
  290. // 0x1000
  291. // };
  292. #define MPC56xx_ID 0x005A0000 /* RCHW boot ID for MPC56xx devices */
  293. #define VLE_ENABLE 0x01000000 /* VLE is enabled */
  294. extern void _start(void);
  295. #define ENTRY_POINT _start
  296. #define RCHW_VAL (VLE_ENABLE | MPC56xx_ID)
  297. const uint32_t __attribute__ ((section(".rchw"))) RCHW[] = {RCHW_VAL, (uint32_t)ENTRY_POINT};