ac.h 63 KB

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  1. /**
  2. * \file
  3. *
  4. * \brief Component description for AC
  5. *
  6. * Copyright (c) 2018 Microchip Technology Inc.
  7. *
  8. * \license_start
  9. *
  10. * \page License
  11. *
  12. * SPDX-License-Identifier: Apache-2.0
  13. *
  14. * Licensed under the Apache License, Version 2.0 (the "License");
  15. * you may not use this file except in compliance with the License.
  16. * You may obtain a copy of the License at
  17. *
  18. * http://www.apache.org/licenses/LICENSE-2.0
  19. *
  20. * Unless required by applicable law or agreed to in writing, software
  21. * distributed under the License is distributed on an "AS IS" BASIS,
  22. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  23. * See the License for the specific language governing permissions and
  24. * limitations under the License.
  25. *
  26. * \license_stop
  27. *
  28. */
  29. /* file generated from device description version 2018-05-30T11:07:17Z */
  30. #ifndef _SAML11_AC_COMPONENT_H_
  31. #define _SAML11_AC_COMPONENT_H_
  32. #define _SAML11_AC_COMPONENT_ /**< \deprecated Backward compatibility for ASF */
  33. /** \addtogroup SAML_SAML11 Analog Comparators
  34. * @{
  35. */
  36. /* ========================================================================== */
  37. /** SOFTWARE API DEFINITION FOR AC */
  38. /* ========================================================================== */
  39. #define AC_U2245 /**< (AC) Module ID */
  40. #define REV_AC 0x102 /**< (AC) Module revision */
  41. /* -------- AC_CTRLA : (AC Offset: 0x00) (R/W 8) Control A -------- */
  42. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  43. typedef union {
  44. struct {
  45. uint8_t SWRST:1; /**< bit: 0 Software Reset */
  46. uint8_t ENABLE:1; /**< bit: 1 Enable */
  47. uint8_t :6; /**< bit: 2..7 Reserved */
  48. } bit; /**< Structure used for bit access */
  49. uint8_t reg; /**< Type used for register access */
  50. } AC_CTRLA_Type;
  51. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  52. #define AC_CTRLA_OFFSET (0x00) /**< (AC_CTRLA) Control A Offset */
  53. #define AC_CTRLA_RESETVALUE _U_(0x00) /**< (AC_CTRLA) Control A Reset Value */
  54. #define AC_CTRLA_SWRST_Pos 0 /**< (AC_CTRLA) Software Reset Position */
  55. #define AC_CTRLA_SWRST_Msk (_U_(0x1) << AC_CTRLA_SWRST_Pos) /**< (AC_CTRLA) Software Reset Mask */
  56. #define AC_CTRLA_SWRST AC_CTRLA_SWRST_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_CTRLA_SWRST_Msk instead */
  57. #define AC_CTRLA_ENABLE_Pos 1 /**< (AC_CTRLA) Enable Position */
  58. #define AC_CTRLA_ENABLE_Msk (_U_(0x1) << AC_CTRLA_ENABLE_Pos) /**< (AC_CTRLA) Enable Mask */
  59. #define AC_CTRLA_ENABLE AC_CTRLA_ENABLE_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_CTRLA_ENABLE_Msk instead */
  60. #define AC_CTRLA_MASK _U_(0x03) /**< \deprecated (AC_CTRLA) Register MASK (Use AC_CTRLA_Msk instead) */
  61. #define AC_CTRLA_Msk _U_(0x03) /**< (AC_CTRLA) Register Mask */
  62. /* -------- AC_CTRLB : (AC Offset: 0x01) (/W 8) Control B -------- */
  63. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  64. typedef union {
  65. struct {
  66. uint8_t START0:1; /**< bit: 0 Comparator 0 Start Comparison */
  67. uint8_t START1:1; /**< bit: 1 Comparator 1 Start Comparison */
  68. uint8_t :6; /**< bit: 2..7 Reserved */
  69. } bit; /**< Structure used for bit access */
  70. struct {
  71. uint8_t START:2; /**< bit: 0..1 Comparator x Start Comparison */
  72. uint8_t :6; /**< bit: 2..7 Reserved */
  73. } vec; /**< Structure used for vec access */
  74. uint8_t reg; /**< Type used for register access */
  75. } AC_CTRLB_Type;
  76. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  77. #define AC_CTRLB_OFFSET (0x01) /**< (AC_CTRLB) Control B Offset */
  78. #define AC_CTRLB_RESETVALUE _U_(0x00) /**< (AC_CTRLB) Control B Reset Value */
  79. #define AC_CTRLB_START0_Pos 0 /**< (AC_CTRLB) Comparator 0 Start Comparison Position */
  80. #define AC_CTRLB_START0_Msk (_U_(0x1) << AC_CTRLB_START0_Pos) /**< (AC_CTRLB) Comparator 0 Start Comparison Mask */
  81. #define AC_CTRLB_START0 AC_CTRLB_START0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_CTRLB_START0_Msk instead */
  82. #define AC_CTRLB_START1_Pos 1 /**< (AC_CTRLB) Comparator 1 Start Comparison Position */
  83. #define AC_CTRLB_START1_Msk (_U_(0x1) << AC_CTRLB_START1_Pos) /**< (AC_CTRLB) Comparator 1 Start Comparison Mask */
  84. #define AC_CTRLB_START1 AC_CTRLB_START1_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_CTRLB_START1_Msk instead */
  85. #define AC_CTRLB_MASK _U_(0x03) /**< \deprecated (AC_CTRLB) Register MASK (Use AC_CTRLB_Msk instead) */
  86. #define AC_CTRLB_Msk _U_(0x03) /**< (AC_CTRLB) Register Mask */
  87. #define AC_CTRLB_START_Pos 0 /**< (AC_CTRLB Position) Comparator x Start Comparison */
  88. #define AC_CTRLB_START_Msk (_U_(0x3) << AC_CTRLB_START_Pos) /**< (AC_CTRLB Mask) START */
  89. #define AC_CTRLB_START(value) (AC_CTRLB_START_Msk & ((value) << AC_CTRLB_START_Pos))
  90. /* -------- AC_EVCTRL : (AC Offset: 0x02) (R/W 16) Event Control -------- */
  91. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  92. typedef union {
  93. struct {
  94. uint16_t COMPEO0:1; /**< bit: 0 Comparator 0 Event Output Enable */
  95. uint16_t COMPEO1:1; /**< bit: 1 Comparator 1 Event Output Enable */
  96. uint16_t :2; /**< bit: 2..3 Reserved */
  97. uint16_t WINEO0:1; /**< bit: 4 Window 0 Event Output Enable */
  98. uint16_t :3; /**< bit: 5..7 Reserved */
  99. uint16_t COMPEI0:1; /**< bit: 8 Comparator 0 Event Input Enable */
  100. uint16_t COMPEI1:1; /**< bit: 9 Comparator 1 Event Input Enable */
  101. uint16_t :2; /**< bit: 10..11 Reserved */
  102. uint16_t INVEI0:1; /**< bit: 12 Comparator 0 Input Event Invert Enable */
  103. uint16_t INVEI1:1; /**< bit: 13 Comparator 1 Input Event Invert Enable */
  104. uint16_t :2; /**< bit: 14..15 Reserved */
  105. } bit; /**< Structure used for bit access */
  106. struct {
  107. uint16_t COMPEO:2; /**< bit: 0..1 Comparator x Event Output Enable */
  108. uint16_t :2; /**< bit: 2..3 Reserved */
  109. uint16_t WINEO:1; /**< bit: 4 Window x Event Output Enable */
  110. uint16_t :3; /**< bit: 5..7 Reserved */
  111. uint16_t COMPEI:2; /**< bit: 8..9 Comparator x Event Input Enable */
  112. uint16_t :2; /**< bit: 10..11 Reserved */
  113. uint16_t INVEI:2; /**< bit: 12..13 Comparator x Input Event Invert Enable */
  114. uint16_t :2; /**< bit: 14..15 Reserved */
  115. } vec; /**< Structure used for vec access */
  116. uint16_t reg; /**< Type used for register access */
  117. } AC_EVCTRL_Type;
  118. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  119. #define AC_EVCTRL_OFFSET (0x02) /**< (AC_EVCTRL) Event Control Offset */
  120. #define AC_EVCTRL_RESETVALUE _U_(0x00) /**< (AC_EVCTRL) Event Control Reset Value */
  121. #define AC_EVCTRL_COMPEO0_Pos 0 /**< (AC_EVCTRL) Comparator 0 Event Output Enable Position */
  122. #define AC_EVCTRL_COMPEO0_Msk (_U_(0x1) << AC_EVCTRL_COMPEO0_Pos) /**< (AC_EVCTRL) Comparator 0 Event Output Enable Mask */
  123. #define AC_EVCTRL_COMPEO0 AC_EVCTRL_COMPEO0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_EVCTRL_COMPEO0_Msk instead */
  124. #define AC_EVCTRL_COMPEO1_Pos 1 /**< (AC_EVCTRL) Comparator 1 Event Output Enable Position */
  125. #define AC_EVCTRL_COMPEO1_Msk (_U_(0x1) << AC_EVCTRL_COMPEO1_Pos) /**< (AC_EVCTRL) Comparator 1 Event Output Enable Mask */
  126. #define AC_EVCTRL_COMPEO1 AC_EVCTRL_COMPEO1_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_EVCTRL_COMPEO1_Msk instead */
  127. #define AC_EVCTRL_WINEO0_Pos 4 /**< (AC_EVCTRL) Window 0 Event Output Enable Position */
  128. #define AC_EVCTRL_WINEO0_Msk (_U_(0x1) << AC_EVCTRL_WINEO0_Pos) /**< (AC_EVCTRL) Window 0 Event Output Enable Mask */
  129. #define AC_EVCTRL_WINEO0 AC_EVCTRL_WINEO0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_EVCTRL_WINEO0_Msk instead */
  130. #define AC_EVCTRL_COMPEI0_Pos 8 /**< (AC_EVCTRL) Comparator 0 Event Input Enable Position */
  131. #define AC_EVCTRL_COMPEI0_Msk (_U_(0x1) << AC_EVCTRL_COMPEI0_Pos) /**< (AC_EVCTRL) Comparator 0 Event Input Enable Mask */
  132. #define AC_EVCTRL_COMPEI0 AC_EVCTRL_COMPEI0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_EVCTRL_COMPEI0_Msk instead */
  133. #define AC_EVCTRL_COMPEI1_Pos 9 /**< (AC_EVCTRL) Comparator 1 Event Input Enable Position */
  134. #define AC_EVCTRL_COMPEI1_Msk (_U_(0x1) << AC_EVCTRL_COMPEI1_Pos) /**< (AC_EVCTRL) Comparator 1 Event Input Enable Mask */
  135. #define AC_EVCTRL_COMPEI1 AC_EVCTRL_COMPEI1_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_EVCTRL_COMPEI1_Msk instead */
  136. #define AC_EVCTRL_INVEI0_Pos 12 /**< (AC_EVCTRL) Comparator 0 Input Event Invert Enable Position */
  137. #define AC_EVCTRL_INVEI0_Msk (_U_(0x1) << AC_EVCTRL_INVEI0_Pos) /**< (AC_EVCTRL) Comparator 0 Input Event Invert Enable Mask */
  138. #define AC_EVCTRL_INVEI0 AC_EVCTRL_INVEI0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_EVCTRL_INVEI0_Msk instead */
  139. #define AC_EVCTRL_INVEI1_Pos 13 /**< (AC_EVCTRL) Comparator 1 Input Event Invert Enable Position */
  140. #define AC_EVCTRL_INVEI1_Msk (_U_(0x1) << AC_EVCTRL_INVEI1_Pos) /**< (AC_EVCTRL) Comparator 1 Input Event Invert Enable Mask */
  141. #define AC_EVCTRL_INVEI1 AC_EVCTRL_INVEI1_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_EVCTRL_INVEI1_Msk instead */
  142. #define AC_EVCTRL_MASK _U_(0x3313) /**< \deprecated (AC_EVCTRL) Register MASK (Use AC_EVCTRL_Msk instead) */
  143. #define AC_EVCTRL_Msk _U_(0x3313) /**< (AC_EVCTRL) Register Mask */
  144. #define AC_EVCTRL_COMPEO_Pos 0 /**< (AC_EVCTRL Position) Comparator x Event Output Enable */
  145. #define AC_EVCTRL_COMPEO_Msk (_U_(0x3) << AC_EVCTRL_COMPEO_Pos) /**< (AC_EVCTRL Mask) COMPEO */
  146. #define AC_EVCTRL_COMPEO(value) (AC_EVCTRL_COMPEO_Msk & ((value) << AC_EVCTRL_COMPEO_Pos))
  147. #define AC_EVCTRL_WINEO_Pos 4 /**< (AC_EVCTRL Position) Window x Event Output Enable */
  148. #define AC_EVCTRL_WINEO_Msk (_U_(0x1) << AC_EVCTRL_WINEO_Pos) /**< (AC_EVCTRL Mask) WINEO */
  149. #define AC_EVCTRL_WINEO(value) (AC_EVCTRL_WINEO_Msk & ((value) << AC_EVCTRL_WINEO_Pos))
  150. #define AC_EVCTRL_COMPEI_Pos 8 /**< (AC_EVCTRL Position) Comparator x Event Input Enable */
  151. #define AC_EVCTRL_COMPEI_Msk (_U_(0x3) << AC_EVCTRL_COMPEI_Pos) /**< (AC_EVCTRL Mask) COMPEI */
  152. #define AC_EVCTRL_COMPEI(value) (AC_EVCTRL_COMPEI_Msk & ((value) << AC_EVCTRL_COMPEI_Pos))
  153. #define AC_EVCTRL_INVEI_Pos 12 /**< (AC_EVCTRL Position) Comparator x Input Event Invert Enable */
  154. #define AC_EVCTRL_INVEI_Msk (_U_(0x3) << AC_EVCTRL_INVEI_Pos) /**< (AC_EVCTRL Mask) INVEI */
  155. #define AC_EVCTRL_INVEI(value) (AC_EVCTRL_INVEI_Msk & ((value) << AC_EVCTRL_INVEI_Pos))
  156. /* -------- AC_INTENCLR : (AC Offset: 0x04) (R/W 8) Interrupt Enable Clear -------- */
  157. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  158. typedef union {
  159. struct {
  160. uint8_t COMP0:1; /**< bit: 0 Comparator 0 Interrupt Enable */
  161. uint8_t COMP1:1; /**< bit: 1 Comparator 1 Interrupt Enable */
  162. uint8_t :2; /**< bit: 2..3 Reserved */
  163. uint8_t WIN0:1; /**< bit: 4 Window 0 Interrupt Enable */
  164. uint8_t :3; /**< bit: 5..7 Reserved */
  165. } bit; /**< Structure used for bit access */
  166. struct {
  167. uint8_t COMP:2; /**< bit: 0..1 Comparator x Interrupt Enable */
  168. uint8_t :2; /**< bit: 2..3 Reserved */
  169. uint8_t WIN:1; /**< bit: 4 Window x Interrupt Enable */
  170. uint8_t :3; /**< bit: 5..7 Reserved */
  171. } vec; /**< Structure used for vec access */
  172. uint8_t reg; /**< Type used for register access */
  173. } AC_INTENCLR_Type;
  174. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  175. #define AC_INTENCLR_OFFSET (0x04) /**< (AC_INTENCLR) Interrupt Enable Clear Offset */
  176. #define AC_INTENCLR_RESETVALUE _U_(0x00) /**< (AC_INTENCLR) Interrupt Enable Clear Reset Value */
  177. #define AC_INTENCLR_COMP0_Pos 0 /**< (AC_INTENCLR) Comparator 0 Interrupt Enable Position */
  178. #define AC_INTENCLR_COMP0_Msk (_U_(0x1) << AC_INTENCLR_COMP0_Pos) /**< (AC_INTENCLR) Comparator 0 Interrupt Enable Mask */
  179. #define AC_INTENCLR_COMP0 AC_INTENCLR_COMP0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_INTENCLR_COMP0_Msk instead */
  180. #define AC_INTENCLR_COMP1_Pos 1 /**< (AC_INTENCLR) Comparator 1 Interrupt Enable Position */
  181. #define AC_INTENCLR_COMP1_Msk (_U_(0x1) << AC_INTENCLR_COMP1_Pos) /**< (AC_INTENCLR) Comparator 1 Interrupt Enable Mask */
  182. #define AC_INTENCLR_COMP1 AC_INTENCLR_COMP1_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_INTENCLR_COMP1_Msk instead */
  183. #define AC_INTENCLR_WIN0_Pos 4 /**< (AC_INTENCLR) Window 0 Interrupt Enable Position */
  184. #define AC_INTENCLR_WIN0_Msk (_U_(0x1) << AC_INTENCLR_WIN0_Pos) /**< (AC_INTENCLR) Window 0 Interrupt Enable Mask */
  185. #define AC_INTENCLR_WIN0 AC_INTENCLR_WIN0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_INTENCLR_WIN0_Msk instead */
  186. #define AC_INTENCLR_MASK _U_(0x13) /**< \deprecated (AC_INTENCLR) Register MASK (Use AC_INTENCLR_Msk instead) */
  187. #define AC_INTENCLR_Msk _U_(0x13) /**< (AC_INTENCLR) Register Mask */
  188. #define AC_INTENCLR_COMP_Pos 0 /**< (AC_INTENCLR Position) Comparator x Interrupt Enable */
  189. #define AC_INTENCLR_COMP_Msk (_U_(0x3) << AC_INTENCLR_COMP_Pos) /**< (AC_INTENCLR Mask) COMP */
  190. #define AC_INTENCLR_COMP(value) (AC_INTENCLR_COMP_Msk & ((value) << AC_INTENCLR_COMP_Pos))
  191. #define AC_INTENCLR_WIN_Pos 4 /**< (AC_INTENCLR Position) Window x Interrupt Enable */
  192. #define AC_INTENCLR_WIN_Msk (_U_(0x1) << AC_INTENCLR_WIN_Pos) /**< (AC_INTENCLR Mask) WIN */
  193. #define AC_INTENCLR_WIN(value) (AC_INTENCLR_WIN_Msk & ((value) << AC_INTENCLR_WIN_Pos))
  194. /* -------- AC_INTENSET : (AC Offset: 0x05) (R/W 8) Interrupt Enable Set -------- */
  195. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  196. typedef union {
  197. struct {
  198. uint8_t COMP0:1; /**< bit: 0 Comparator 0 Interrupt Enable */
  199. uint8_t COMP1:1; /**< bit: 1 Comparator 1 Interrupt Enable */
  200. uint8_t :2; /**< bit: 2..3 Reserved */
  201. uint8_t WIN0:1; /**< bit: 4 Window 0 Interrupt Enable */
  202. uint8_t :3; /**< bit: 5..7 Reserved */
  203. } bit; /**< Structure used for bit access */
  204. struct {
  205. uint8_t COMP:2; /**< bit: 0..1 Comparator x Interrupt Enable */
  206. uint8_t :2; /**< bit: 2..3 Reserved */
  207. uint8_t WIN:1; /**< bit: 4 Window x Interrupt Enable */
  208. uint8_t :3; /**< bit: 5..7 Reserved */
  209. } vec; /**< Structure used for vec access */
  210. uint8_t reg; /**< Type used for register access */
  211. } AC_INTENSET_Type;
  212. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  213. #define AC_INTENSET_OFFSET (0x05) /**< (AC_INTENSET) Interrupt Enable Set Offset */
  214. #define AC_INTENSET_RESETVALUE _U_(0x00) /**< (AC_INTENSET) Interrupt Enable Set Reset Value */
  215. #define AC_INTENSET_COMP0_Pos 0 /**< (AC_INTENSET) Comparator 0 Interrupt Enable Position */
  216. #define AC_INTENSET_COMP0_Msk (_U_(0x1) << AC_INTENSET_COMP0_Pos) /**< (AC_INTENSET) Comparator 0 Interrupt Enable Mask */
  217. #define AC_INTENSET_COMP0 AC_INTENSET_COMP0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_INTENSET_COMP0_Msk instead */
  218. #define AC_INTENSET_COMP1_Pos 1 /**< (AC_INTENSET) Comparator 1 Interrupt Enable Position */
  219. #define AC_INTENSET_COMP1_Msk (_U_(0x1) << AC_INTENSET_COMP1_Pos) /**< (AC_INTENSET) Comparator 1 Interrupt Enable Mask */
  220. #define AC_INTENSET_COMP1 AC_INTENSET_COMP1_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_INTENSET_COMP1_Msk instead */
  221. #define AC_INTENSET_WIN0_Pos 4 /**< (AC_INTENSET) Window 0 Interrupt Enable Position */
  222. #define AC_INTENSET_WIN0_Msk (_U_(0x1) << AC_INTENSET_WIN0_Pos) /**< (AC_INTENSET) Window 0 Interrupt Enable Mask */
  223. #define AC_INTENSET_WIN0 AC_INTENSET_WIN0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_INTENSET_WIN0_Msk instead */
  224. #define AC_INTENSET_MASK _U_(0x13) /**< \deprecated (AC_INTENSET) Register MASK (Use AC_INTENSET_Msk instead) */
  225. #define AC_INTENSET_Msk _U_(0x13) /**< (AC_INTENSET) Register Mask */
  226. #define AC_INTENSET_COMP_Pos 0 /**< (AC_INTENSET Position) Comparator x Interrupt Enable */
  227. #define AC_INTENSET_COMP_Msk (_U_(0x3) << AC_INTENSET_COMP_Pos) /**< (AC_INTENSET Mask) COMP */
  228. #define AC_INTENSET_COMP(value) (AC_INTENSET_COMP_Msk & ((value) << AC_INTENSET_COMP_Pos))
  229. #define AC_INTENSET_WIN_Pos 4 /**< (AC_INTENSET Position) Window x Interrupt Enable */
  230. #define AC_INTENSET_WIN_Msk (_U_(0x1) << AC_INTENSET_WIN_Pos) /**< (AC_INTENSET Mask) WIN */
  231. #define AC_INTENSET_WIN(value) (AC_INTENSET_WIN_Msk & ((value) << AC_INTENSET_WIN_Pos))
  232. /* -------- AC_INTFLAG : (AC Offset: 0x06) (R/W 8) Interrupt Flag Status and Clear -------- */
  233. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  234. typedef union { // __I to avoid read-modify-write on write-to-clear register
  235. struct {
  236. __I uint8_t COMP0:1; /**< bit: 0 Comparator 0 */
  237. __I uint8_t COMP1:1; /**< bit: 1 Comparator 1 */
  238. __I uint8_t :2; /**< bit: 2..3 Reserved */
  239. __I uint8_t WIN0:1; /**< bit: 4 Window 0 */
  240. __I uint8_t :3; /**< bit: 5..7 Reserved */
  241. } bit; /**< Structure used for bit access */
  242. struct {
  243. __I uint8_t COMP:2; /**< bit: 0..1 Comparator x */
  244. __I uint8_t :2; /**< bit: 2..3 Reserved */
  245. __I uint8_t WIN:1; /**< bit: 4 Window x */
  246. __I uint8_t :3; /**< bit: 5..7 Reserved */
  247. } vec; /**< Structure used for vec access */
  248. uint8_t reg; /**< Type used for register access */
  249. } AC_INTFLAG_Type;
  250. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  251. #define AC_INTFLAG_OFFSET (0x06) /**< (AC_INTFLAG) Interrupt Flag Status and Clear Offset */
  252. #define AC_INTFLAG_RESETVALUE _U_(0x00) /**< (AC_INTFLAG) Interrupt Flag Status and Clear Reset Value */
  253. #define AC_INTFLAG_COMP0_Pos 0 /**< (AC_INTFLAG) Comparator 0 Position */
  254. #define AC_INTFLAG_COMP0_Msk (_U_(0x1) << AC_INTFLAG_COMP0_Pos) /**< (AC_INTFLAG) Comparator 0 Mask */
  255. #define AC_INTFLAG_COMP0 AC_INTFLAG_COMP0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_INTFLAG_COMP0_Msk instead */
  256. #define AC_INTFLAG_COMP1_Pos 1 /**< (AC_INTFLAG) Comparator 1 Position */
  257. #define AC_INTFLAG_COMP1_Msk (_U_(0x1) << AC_INTFLAG_COMP1_Pos) /**< (AC_INTFLAG) Comparator 1 Mask */
  258. #define AC_INTFLAG_COMP1 AC_INTFLAG_COMP1_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_INTFLAG_COMP1_Msk instead */
  259. #define AC_INTFLAG_WIN0_Pos 4 /**< (AC_INTFLAG) Window 0 Position */
  260. #define AC_INTFLAG_WIN0_Msk (_U_(0x1) << AC_INTFLAG_WIN0_Pos) /**< (AC_INTFLAG) Window 0 Mask */
  261. #define AC_INTFLAG_WIN0 AC_INTFLAG_WIN0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_INTFLAG_WIN0_Msk instead */
  262. #define AC_INTFLAG_MASK _U_(0x13) /**< \deprecated (AC_INTFLAG) Register MASK (Use AC_INTFLAG_Msk instead) */
  263. #define AC_INTFLAG_Msk _U_(0x13) /**< (AC_INTFLAG) Register Mask */
  264. #define AC_INTFLAG_COMP_Pos 0 /**< (AC_INTFLAG Position) Comparator x */
  265. #define AC_INTFLAG_COMP_Msk (_U_(0x3) << AC_INTFLAG_COMP_Pos) /**< (AC_INTFLAG Mask) COMP */
  266. #define AC_INTFLAG_COMP(value) (AC_INTFLAG_COMP_Msk & ((value) << AC_INTFLAG_COMP_Pos))
  267. #define AC_INTFLAG_WIN_Pos 4 /**< (AC_INTFLAG Position) Window x */
  268. #define AC_INTFLAG_WIN_Msk (_U_(0x1) << AC_INTFLAG_WIN_Pos) /**< (AC_INTFLAG Mask) WIN */
  269. #define AC_INTFLAG_WIN(value) (AC_INTFLAG_WIN_Msk & ((value) << AC_INTFLAG_WIN_Pos))
  270. /* -------- AC_STATUSA : (AC Offset: 0x07) (R/ 8) Status A -------- */
  271. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  272. typedef union {
  273. struct {
  274. uint8_t STATE0:1; /**< bit: 0 Comparator 0 Current State */
  275. uint8_t STATE1:1; /**< bit: 1 Comparator 1 Current State */
  276. uint8_t :2; /**< bit: 2..3 Reserved */
  277. uint8_t WSTATE0:2; /**< bit: 4..5 Window 0 Current State */
  278. uint8_t :2; /**< bit: 6..7 Reserved */
  279. } bit; /**< Structure used for bit access */
  280. struct {
  281. uint8_t STATE:2; /**< bit: 0..1 Comparator x Current State */
  282. uint8_t :6; /**< bit: 2..7 Reserved */
  283. } vec; /**< Structure used for vec access */
  284. uint8_t reg; /**< Type used for register access */
  285. } AC_STATUSA_Type;
  286. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  287. #define AC_STATUSA_OFFSET (0x07) /**< (AC_STATUSA) Status A Offset */
  288. #define AC_STATUSA_RESETVALUE _U_(0x00) /**< (AC_STATUSA) Status A Reset Value */
  289. #define AC_STATUSA_STATE0_Pos 0 /**< (AC_STATUSA) Comparator 0 Current State Position */
  290. #define AC_STATUSA_STATE0_Msk (_U_(0x1) << AC_STATUSA_STATE0_Pos) /**< (AC_STATUSA) Comparator 0 Current State Mask */
  291. #define AC_STATUSA_STATE0 AC_STATUSA_STATE0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_STATUSA_STATE0_Msk instead */
  292. #define AC_STATUSA_STATE1_Pos 1 /**< (AC_STATUSA) Comparator 1 Current State Position */
  293. #define AC_STATUSA_STATE1_Msk (_U_(0x1) << AC_STATUSA_STATE1_Pos) /**< (AC_STATUSA) Comparator 1 Current State Mask */
  294. #define AC_STATUSA_STATE1 AC_STATUSA_STATE1_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_STATUSA_STATE1_Msk instead */
  295. #define AC_STATUSA_WSTATE0_Pos 4 /**< (AC_STATUSA) Window 0 Current State Position */
  296. #define AC_STATUSA_WSTATE0_Msk (_U_(0x3) << AC_STATUSA_WSTATE0_Pos) /**< (AC_STATUSA) Window 0 Current State Mask */
  297. #define AC_STATUSA_WSTATE0(value) (AC_STATUSA_WSTATE0_Msk & ((value) << AC_STATUSA_WSTATE0_Pos))
  298. #define AC_STATUSA_WSTATE0_ABOVE_Val _U_(0x0) /**< (AC_STATUSA) Signal is above window */
  299. #define AC_STATUSA_WSTATE0_INSIDE_Val _U_(0x1) /**< (AC_STATUSA) Signal is inside window */
  300. #define AC_STATUSA_WSTATE0_BELOW_Val _U_(0x2) /**< (AC_STATUSA) Signal is below window */
  301. #define AC_STATUSA_WSTATE0_ABOVE (AC_STATUSA_WSTATE0_ABOVE_Val << AC_STATUSA_WSTATE0_Pos) /**< (AC_STATUSA) Signal is above window Position */
  302. #define AC_STATUSA_WSTATE0_INSIDE (AC_STATUSA_WSTATE0_INSIDE_Val << AC_STATUSA_WSTATE0_Pos) /**< (AC_STATUSA) Signal is inside window Position */
  303. #define AC_STATUSA_WSTATE0_BELOW (AC_STATUSA_WSTATE0_BELOW_Val << AC_STATUSA_WSTATE0_Pos) /**< (AC_STATUSA) Signal is below window Position */
  304. #define AC_STATUSA_MASK _U_(0x33) /**< \deprecated (AC_STATUSA) Register MASK (Use AC_STATUSA_Msk instead) */
  305. #define AC_STATUSA_Msk _U_(0x33) /**< (AC_STATUSA) Register Mask */
  306. #define AC_STATUSA_STATE_Pos 0 /**< (AC_STATUSA Position) Comparator x Current State */
  307. #define AC_STATUSA_STATE_Msk (_U_(0x3) << AC_STATUSA_STATE_Pos) /**< (AC_STATUSA Mask) STATE */
  308. #define AC_STATUSA_STATE(value) (AC_STATUSA_STATE_Msk & ((value) << AC_STATUSA_STATE_Pos))
  309. /* -------- AC_STATUSB : (AC Offset: 0x08) (R/ 8) Status B -------- */
  310. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  311. typedef union {
  312. struct {
  313. uint8_t READY0:1; /**< bit: 0 Comparator 0 Ready */
  314. uint8_t READY1:1; /**< bit: 1 Comparator 1 Ready */
  315. uint8_t :6; /**< bit: 2..7 Reserved */
  316. } bit; /**< Structure used for bit access */
  317. struct {
  318. uint8_t READY:2; /**< bit: 0..1 Comparator x Ready */
  319. uint8_t :6; /**< bit: 2..7 Reserved */
  320. } vec; /**< Structure used for vec access */
  321. uint8_t reg; /**< Type used for register access */
  322. } AC_STATUSB_Type;
  323. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  324. #define AC_STATUSB_OFFSET (0x08) /**< (AC_STATUSB) Status B Offset */
  325. #define AC_STATUSB_RESETVALUE _U_(0x00) /**< (AC_STATUSB) Status B Reset Value */
  326. #define AC_STATUSB_READY0_Pos 0 /**< (AC_STATUSB) Comparator 0 Ready Position */
  327. #define AC_STATUSB_READY0_Msk (_U_(0x1) << AC_STATUSB_READY0_Pos) /**< (AC_STATUSB) Comparator 0 Ready Mask */
  328. #define AC_STATUSB_READY0 AC_STATUSB_READY0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_STATUSB_READY0_Msk instead */
  329. #define AC_STATUSB_READY1_Pos 1 /**< (AC_STATUSB) Comparator 1 Ready Position */
  330. #define AC_STATUSB_READY1_Msk (_U_(0x1) << AC_STATUSB_READY1_Pos) /**< (AC_STATUSB) Comparator 1 Ready Mask */
  331. #define AC_STATUSB_READY1 AC_STATUSB_READY1_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_STATUSB_READY1_Msk instead */
  332. #define AC_STATUSB_MASK _U_(0x03) /**< \deprecated (AC_STATUSB) Register MASK (Use AC_STATUSB_Msk instead) */
  333. #define AC_STATUSB_Msk _U_(0x03) /**< (AC_STATUSB) Register Mask */
  334. #define AC_STATUSB_READY_Pos 0 /**< (AC_STATUSB Position) Comparator x Ready */
  335. #define AC_STATUSB_READY_Msk (_U_(0x3) << AC_STATUSB_READY_Pos) /**< (AC_STATUSB Mask) READY */
  336. #define AC_STATUSB_READY(value) (AC_STATUSB_READY_Msk & ((value) << AC_STATUSB_READY_Pos))
  337. /* -------- AC_DBGCTRL : (AC Offset: 0x09) (R/W 8) Debug Control -------- */
  338. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  339. typedef union {
  340. struct {
  341. uint8_t DBGRUN:1; /**< bit: 0 Debug Run */
  342. uint8_t :7; /**< bit: 1..7 Reserved */
  343. } bit; /**< Structure used for bit access */
  344. uint8_t reg; /**< Type used for register access */
  345. } AC_DBGCTRL_Type;
  346. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  347. #define AC_DBGCTRL_OFFSET (0x09) /**< (AC_DBGCTRL) Debug Control Offset */
  348. #define AC_DBGCTRL_RESETVALUE _U_(0x00) /**< (AC_DBGCTRL) Debug Control Reset Value */
  349. #define AC_DBGCTRL_DBGRUN_Pos 0 /**< (AC_DBGCTRL) Debug Run Position */
  350. #define AC_DBGCTRL_DBGRUN_Msk (_U_(0x1) << AC_DBGCTRL_DBGRUN_Pos) /**< (AC_DBGCTRL) Debug Run Mask */
  351. #define AC_DBGCTRL_DBGRUN AC_DBGCTRL_DBGRUN_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_DBGCTRL_DBGRUN_Msk instead */
  352. #define AC_DBGCTRL_MASK _U_(0x01) /**< \deprecated (AC_DBGCTRL) Register MASK (Use AC_DBGCTRL_Msk instead) */
  353. #define AC_DBGCTRL_Msk _U_(0x01) /**< (AC_DBGCTRL) Register Mask */
  354. /* -------- AC_WINCTRL : (AC Offset: 0x0a) (R/W 8) Window Control -------- */
  355. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  356. typedef union {
  357. struct {
  358. uint8_t WEN0:1; /**< bit: 0 Window 0 Mode Enable */
  359. uint8_t WINTSEL0:2; /**< bit: 1..2 Window 0 Interrupt Selection */
  360. uint8_t :5; /**< bit: 3..7 Reserved */
  361. } bit; /**< Structure used for bit access */
  362. struct {
  363. uint8_t WEN:1; /**< bit: 0 Window x Mode Enable */
  364. uint8_t :7; /**< bit: 1..7 Reserved */
  365. } vec; /**< Structure used for vec access */
  366. uint8_t reg; /**< Type used for register access */
  367. } AC_WINCTRL_Type;
  368. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  369. #define AC_WINCTRL_OFFSET (0x0A) /**< (AC_WINCTRL) Window Control Offset */
  370. #define AC_WINCTRL_RESETVALUE _U_(0x00) /**< (AC_WINCTRL) Window Control Reset Value */
  371. #define AC_WINCTRL_WEN0_Pos 0 /**< (AC_WINCTRL) Window 0 Mode Enable Position */
  372. #define AC_WINCTRL_WEN0_Msk (_U_(0x1) << AC_WINCTRL_WEN0_Pos) /**< (AC_WINCTRL) Window 0 Mode Enable Mask */
  373. #define AC_WINCTRL_WEN0 AC_WINCTRL_WEN0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_WINCTRL_WEN0_Msk instead */
  374. #define AC_WINCTRL_WINTSEL0_Pos 1 /**< (AC_WINCTRL) Window 0 Interrupt Selection Position */
  375. #define AC_WINCTRL_WINTSEL0_Msk (_U_(0x3) << AC_WINCTRL_WINTSEL0_Pos) /**< (AC_WINCTRL) Window 0 Interrupt Selection Mask */
  376. #define AC_WINCTRL_WINTSEL0(value) (AC_WINCTRL_WINTSEL0_Msk & ((value) << AC_WINCTRL_WINTSEL0_Pos))
  377. #define AC_WINCTRL_WINTSEL0_ABOVE_Val _U_(0x0) /**< (AC_WINCTRL) Interrupt on signal above window */
  378. #define AC_WINCTRL_WINTSEL0_INSIDE_Val _U_(0x1) /**< (AC_WINCTRL) Interrupt on signal inside window */
  379. #define AC_WINCTRL_WINTSEL0_BELOW_Val _U_(0x2) /**< (AC_WINCTRL) Interrupt on signal below window */
  380. #define AC_WINCTRL_WINTSEL0_OUTSIDE_Val _U_(0x3) /**< (AC_WINCTRL) Interrupt on signal outside window */
  381. #define AC_WINCTRL_WINTSEL0_ABOVE (AC_WINCTRL_WINTSEL0_ABOVE_Val << AC_WINCTRL_WINTSEL0_Pos) /**< (AC_WINCTRL) Interrupt on signal above window Position */
  382. #define AC_WINCTRL_WINTSEL0_INSIDE (AC_WINCTRL_WINTSEL0_INSIDE_Val << AC_WINCTRL_WINTSEL0_Pos) /**< (AC_WINCTRL) Interrupt on signal inside window Position */
  383. #define AC_WINCTRL_WINTSEL0_BELOW (AC_WINCTRL_WINTSEL0_BELOW_Val << AC_WINCTRL_WINTSEL0_Pos) /**< (AC_WINCTRL) Interrupt on signal below window Position */
  384. #define AC_WINCTRL_WINTSEL0_OUTSIDE (AC_WINCTRL_WINTSEL0_OUTSIDE_Val << AC_WINCTRL_WINTSEL0_Pos) /**< (AC_WINCTRL) Interrupt on signal outside window Position */
  385. #define AC_WINCTRL_MASK _U_(0x07) /**< \deprecated (AC_WINCTRL) Register MASK (Use AC_WINCTRL_Msk instead) */
  386. #define AC_WINCTRL_Msk _U_(0x07) /**< (AC_WINCTRL) Register Mask */
  387. #define AC_WINCTRL_WEN_Pos 0 /**< (AC_WINCTRL Position) Window x Mode Enable */
  388. #define AC_WINCTRL_WEN_Msk (_U_(0x1) << AC_WINCTRL_WEN_Pos) /**< (AC_WINCTRL Mask) WEN */
  389. #define AC_WINCTRL_WEN(value) (AC_WINCTRL_WEN_Msk & ((value) << AC_WINCTRL_WEN_Pos))
  390. /* -------- AC_SCALER : (AC Offset: 0x0c) (R/W 8) Scaler n -------- */
  391. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  392. typedef union {
  393. struct {
  394. uint8_t VALUE:6; /**< bit: 0..5 Scaler Value */
  395. uint8_t :2; /**< bit: 6..7 Reserved */
  396. } bit; /**< Structure used for bit access */
  397. uint8_t reg; /**< Type used for register access */
  398. } AC_SCALER_Type;
  399. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  400. #define AC_SCALER_OFFSET (0x0C) /**< (AC_SCALER) Scaler n Offset */
  401. #define AC_SCALER_RESETVALUE _U_(0x00) /**< (AC_SCALER) Scaler n Reset Value */
  402. #define AC_SCALER_VALUE_Pos 0 /**< (AC_SCALER) Scaler Value Position */
  403. #define AC_SCALER_VALUE_Msk (_U_(0x3F) << AC_SCALER_VALUE_Pos) /**< (AC_SCALER) Scaler Value Mask */
  404. #define AC_SCALER_VALUE(value) (AC_SCALER_VALUE_Msk & ((value) << AC_SCALER_VALUE_Pos))
  405. #define AC_SCALER_MASK _U_(0x3F) /**< \deprecated (AC_SCALER) Register MASK (Use AC_SCALER_Msk instead) */
  406. #define AC_SCALER_Msk _U_(0x3F) /**< (AC_SCALER) Register Mask */
  407. /* -------- AC_COMPCTRL : (AC Offset: 0x10) (R/W 32) Comparator Control n -------- */
  408. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  409. typedef union {
  410. struct {
  411. uint32_t :1; /**< bit: 0 Reserved */
  412. uint32_t ENABLE:1; /**< bit: 1 Enable */
  413. uint32_t SINGLE:1; /**< bit: 2 Single-Shot Mode */
  414. uint32_t INTSEL:2; /**< bit: 3..4 Interrupt Selection */
  415. uint32_t :1; /**< bit: 5 Reserved */
  416. uint32_t RUNSTDBY:1; /**< bit: 6 Run in Standby */
  417. uint32_t :1; /**< bit: 7 Reserved */
  418. uint32_t MUXNEG:3; /**< bit: 8..10 Negative Input Mux Selection */
  419. uint32_t :1; /**< bit: 11 Reserved */
  420. uint32_t MUXPOS:3; /**< bit: 12..14 Positive Input Mux Selection */
  421. uint32_t SWAP:1; /**< bit: 15 Swap Inputs and Invert */
  422. uint32_t SPEED:2; /**< bit: 16..17 Speed Selection */
  423. uint32_t :1; /**< bit: 18 Reserved */
  424. uint32_t HYSTEN:1; /**< bit: 19 Hysteresis Enable */
  425. uint32_t HYST:2; /**< bit: 20..21 Hysteresis Level */
  426. uint32_t :2; /**< bit: 22..23 Reserved */
  427. uint32_t FLEN:3; /**< bit: 24..26 Filter Length */
  428. uint32_t :1; /**< bit: 27 Reserved */
  429. uint32_t OUT:2; /**< bit: 28..29 Output */
  430. uint32_t :2; /**< bit: 30..31 Reserved */
  431. } bit; /**< Structure used for bit access */
  432. uint32_t reg; /**< Type used for register access */
  433. } AC_COMPCTRL_Type;
  434. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  435. #define AC_COMPCTRL_OFFSET (0x10) /**< (AC_COMPCTRL) Comparator Control n Offset */
  436. #define AC_COMPCTRL_RESETVALUE _U_(0x00) /**< (AC_COMPCTRL) Comparator Control n Reset Value */
  437. #define AC_COMPCTRL_ENABLE_Pos 1 /**< (AC_COMPCTRL) Enable Position */
  438. #define AC_COMPCTRL_ENABLE_Msk (_U_(0x1) << AC_COMPCTRL_ENABLE_Pos) /**< (AC_COMPCTRL) Enable Mask */
  439. #define AC_COMPCTRL_ENABLE AC_COMPCTRL_ENABLE_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_COMPCTRL_ENABLE_Msk instead */
  440. #define AC_COMPCTRL_SINGLE_Pos 2 /**< (AC_COMPCTRL) Single-Shot Mode Position */
  441. #define AC_COMPCTRL_SINGLE_Msk (_U_(0x1) << AC_COMPCTRL_SINGLE_Pos) /**< (AC_COMPCTRL) Single-Shot Mode Mask */
  442. #define AC_COMPCTRL_SINGLE AC_COMPCTRL_SINGLE_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_COMPCTRL_SINGLE_Msk instead */
  443. #define AC_COMPCTRL_INTSEL_Pos 3 /**< (AC_COMPCTRL) Interrupt Selection Position */
  444. #define AC_COMPCTRL_INTSEL_Msk (_U_(0x3) << AC_COMPCTRL_INTSEL_Pos) /**< (AC_COMPCTRL) Interrupt Selection Mask */
  445. #define AC_COMPCTRL_INTSEL(value) (AC_COMPCTRL_INTSEL_Msk & ((value) << AC_COMPCTRL_INTSEL_Pos))
  446. #define AC_COMPCTRL_INTSEL_TOGGLE_Val _U_(0x0) /**< (AC_COMPCTRL) Interrupt on comparator output toggle */
  447. #define AC_COMPCTRL_INTSEL_RISING_Val _U_(0x1) /**< (AC_COMPCTRL) Interrupt on comparator output rising */
  448. #define AC_COMPCTRL_INTSEL_FALLING_Val _U_(0x2) /**< (AC_COMPCTRL) Interrupt on comparator output falling */
  449. #define AC_COMPCTRL_INTSEL_EOC_Val _U_(0x3) /**< (AC_COMPCTRL) Interrupt on end of comparison (single-shot mode only) */
  450. #define AC_COMPCTRL_INTSEL_TOGGLE (AC_COMPCTRL_INTSEL_TOGGLE_Val << AC_COMPCTRL_INTSEL_Pos) /**< (AC_COMPCTRL) Interrupt on comparator output toggle Position */
  451. #define AC_COMPCTRL_INTSEL_RISING (AC_COMPCTRL_INTSEL_RISING_Val << AC_COMPCTRL_INTSEL_Pos) /**< (AC_COMPCTRL) Interrupt on comparator output rising Position */
  452. #define AC_COMPCTRL_INTSEL_FALLING (AC_COMPCTRL_INTSEL_FALLING_Val << AC_COMPCTRL_INTSEL_Pos) /**< (AC_COMPCTRL) Interrupt on comparator output falling Position */
  453. #define AC_COMPCTRL_INTSEL_EOC (AC_COMPCTRL_INTSEL_EOC_Val << AC_COMPCTRL_INTSEL_Pos) /**< (AC_COMPCTRL) Interrupt on end of comparison (single-shot mode only) Position */
  454. #define AC_COMPCTRL_RUNSTDBY_Pos 6 /**< (AC_COMPCTRL) Run in Standby Position */
  455. #define AC_COMPCTRL_RUNSTDBY_Msk (_U_(0x1) << AC_COMPCTRL_RUNSTDBY_Pos) /**< (AC_COMPCTRL) Run in Standby Mask */
  456. #define AC_COMPCTRL_RUNSTDBY AC_COMPCTRL_RUNSTDBY_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_COMPCTRL_RUNSTDBY_Msk instead */
  457. #define AC_COMPCTRL_MUXNEG_Pos 8 /**< (AC_COMPCTRL) Negative Input Mux Selection Position */
  458. #define AC_COMPCTRL_MUXNEG_Msk (_U_(0x7) << AC_COMPCTRL_MUXNEG_Pos) /**< (AC_COMPCTRL) Negative Input Mux Selection Mask */
  459. #define AC_COMPCTRL_MUXNEG(value) (AC_COMPCTRL_MUXNEG_Msk & ((value) << AC_COMPCTRL_MUXNEG_Pos))
  460. #define AC_COMPCTRL_MUXNEG_PIN0_Val _U_(0x0) /**< (AC_COMPCTRL) I/O pin 0 */
  461. #define AC_COMPCTRL_MUXNEG_PIN1_Val _U_(0x1) /**< (AC_COMPCTRL) I/O pin 1 */
  462. #define AC_COMPCTRL_MUXNEG_PIN2_Val _U_(0x2) /**< (AC_COMPCTRL) I/O pin 2 */
  463. #define AC_COMPCTRL_MUXNEG_PIN3_Val _U_(0x3) /**< (AC_COMPCTRL) I/O pin 3 */
  464. #define AC_COMPCTRL_MUXNEG_GND_Val _U_(0x4) /**< (AC_COMPCTRL) Ground */
  465. #define AC_COMPCTRL_MUXNEG_VSCALE_Val _U_(0x5) /**< (AC_COMPCTRL) VDD scaler */
  466. #define AC_COMPCTRL_MUXNEG_BANDGAP_Val _U_(0x6) /**< (AC_COMPCTRL) Internal bandgap voltage */
  467. #define AC_COMPCTRL_MUXNEG_OPAMP_Val _U_(0x7) /**< (AC_COMPCTRL) OPAMP output (on AC1) */
  468. #define AC_COMPCTRL_MUXNEG_DAC_Val _U_(0x7) /**< (AC_COMPCTRL) DAC output (on AC0) */
  469. #define AC_COMPCTRL_MUXNEG_PIN0 (AC_COMPCTRL_MUXNEG_PIN0_Val << AC_COMPCTRL_MUXNEG_Pos) /**< (AC_COMPCTRL) I/O pin 0 Position */
  470. #define AC_COMPCTRL_MUXNEG_PIN1 (AC_COMPCTRL_MUXNEG_PIN1_Val << AC_COMPCTRL_MUXNEG_Pos) /**< (AC_COMPCTRL) I/O pin 1 Position */
  471. #define AC_COMPCTRL_MUXNEG_PIN2 (AC_COMPCTRL_MUXNEG_PIN2_Val << AC_COMPCTRL_MUXNEG_Pos) /**< (AC_COMPCTRL) I/O pin 2 Position */
  472. #define AC_COMPCTRL_MUXNEG_PIN3 (AC_COMPCTRL_MUXNEG_PIN3_Val << AC_COMPCTRL_MUXNEG_Pos) /**< (AC_COMPCTRL) I/O pin 3 Position */
  473. #define AC_COMPCTRL_MUXNEG_GND (AC_COMPCTRL_MUXNEG_GND_Val << AC_COMPCTRL_MUXNEG_Pos) /**< (AC_COMPCTRL) Ground Position */
  474. #define AC_COMPCTRL_MUXNEG_VSCALE (AC_COMPCTRL_MUXNEG_VSCALE_Val << AC_COMPCTRL_MUXNEG_Pos) /**< (AC_COMPCTRL) VDD scaler Position */
  475. #define AC_COMPCTRL_MUXNEG_BANDGAP (AC_COMPCTRL_MUXNEG_BANDGAP_Val << AC_COMPCTRL_MUXNEG_Pos) /**< (AC_COMPCTRL) Internal bandgap voltage Position */
  476. #define AC_COMPCTRL_MUXNEG_OPAMP (AC_COMPCTRL_MUXNEG_OPAMP_Val << AC_COMPCTRL_MUXNEG_Pos) /**< (AC_COMPCTRL) OPAMP output (on AC1) Position */
  477. #define AC_COMPCTRL_MUXNEG_DAC (AC_COMPCTRL_MUXNEG_DAC_Val << AC_COMPCTRL_MUXNEG_Pos) /**< (AC_COMPCTRL) DAC output (on AC0) Position */
  478. #define AC_COMPCTRL_MUXPOS_Pos 12 /**< (AC_COMPCTRL) Positive Input Mux Selection Position */
  479. #define AC_COMPCTRL_MUXPOS_Msk (_U_(0x7) << AC_COMPCTRL_MUXPOS_Pos) /**< (AC_COMPCTRL) Positive Input Mux Selection Mask */
  480. #define AC_COMPCTRL_MUXPOS(value) (AC_COMPCTRL_MUXPOS_Msk & ((value) << AC_COMPCTRL_MUXPOS_Pos))
  481. #define AC_COMPCTRL_MUXPOS_PIN0_Val _U_(0x0) /**< (AC_COMPCTRL) I/O pin 0 */
  482. #define AC_COMPCTRL_MUXPOS_PIN1_Val _U_(0x1) /**< (AC_COMPCTRL) I/O pin 1 */
  483. #define AC_COMPCTRL_MUXPOS_PIN2_Val _U_(0x2) /**< (AC_COMPCTRL) I/O pin 2 */
  484. #define AC_COMPCTRL_MUXPOS_PIN3_Val _U_(0x3) /**< (AC_COMPCTRL) I/O pin 3 */
  485. #define AC_COMPCTRL_MUXPOS_VSCALE_Val _U_(0x4) /**< (AC_COMPCTRL) VDD Scaler */
  486. #define AC_COMPCTRL_MUXPOS_PIN0 (AC_COMPCTRL_MUXPOS_PIN0_Val << AC_COMPCTRL_MUXPOS_Pos) /**< (AC_COMPCTRL) I/O pin 0 Position */
  487. #define AC_COMPCTRL_MUXPOS_PIN1 (AC_COMPCTRL_MUXPOS_PIN1_Val << AC_COMPCTRL_MUXPOS_Pos) /**< (AC_COMPCTRL) I/O pin 1 Position */
  488. #define AC_COMPCTRL_MUXPOS_PIN2 (AC_COMPCTRL_MUXPOS_PIN2_Val << AC_COMPCTRL_MUXPOS_Pos) /**< (AC_COMPCTRL) I/O pin 2 Position */
  489. #define AC_COMPCTRL_MUXPOS_PIN3 (AC_COMPCTRL_MUXPOS_PIN3_Val << AC_COMPCTRL_MUXPOS_Pos) /**< (AC_COMPCTRL) I/O pin 3 Position */
  490. #define AC_COMPCTRL_MUXPOS_VSCALE (AC_COMPCTRL_MUXPOS_VSCALE_Val << AC_COMPCTRL_MUXPOS_Pos) /**< (AC_COMPCTRL) VDD Scaler Position */
  491. #define AC_COMPCTRL_SWAP_Pos 15 /**< (AC_COMPCTRL) Swap Inputs and Invert Position */
  492. #define AC_COMPCTRL_SWAP_Msk (_U_(0x1) << AC_COMPCTRL_SWAP_Pos) /**< (AC_COMPCTRL) Swap Inputs and Invert Mask */
  493. #define AC_COMPCTRL_SWAP AC_COMPCTRL_SWAP_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_COMPCTRL_SWAP_Msk instead */
  494. #define AC_COMPCTRL_SPEED_Pos 16 /**< (AC_COMPCTRL) Speed Selection Position */
  495. #define AC_COMPCTRL_SPEED_Msk (_U_(0x3) << AC_COMPCTRL_SPEED_Pos) /**< (AC_COMPCTRL) Speed Selection Mask */
  496. #define AC_COMPCTRL_SPEED(value) (AC_COMPCTRL_SPEED_Msk & ((value) << AC_COMPCTRL_SPEED_Pos))
  497. #define AC_COMPCTRL_SPEED_LOW_Val _U_(0x0) /**< (AC_COMPCTRL) Low speed */
  498. #define AC_COMPCTRL_SPEED_MEDLOW_Val _U_(0x1) /**< (AC_COMPCTRL) Medium low speed */
  499. #define AC_COMPCTRL_SPEED_MEDHIGH_Val _U_(0x2) /**< (AC_COMPCTRL) Medium high speed */
  500. #define AC_COMPCTRL_SPEED_HIGH_Val _U_(0x3) /**< (AC_COMPCTRL) High speed */
  501. #define AC_COMPCTRL_SPEED_LOW (AC_COMPCTRL_SPEED_LOW_Val << AC_COMPCTRL_SPEED_Pos) /**< (AC_COMPCTRL) Low speed Position */
  502. #define AC_COMPCTRL_SPEED_MEDLOW (AC_COMPCTRL_SPEED_MEDLOW_Val << AC_COMPCTRL_SPEED_Pos) /**< (AC_COMPCTRL) Medium low speed Position */
  503. #define AC_COMPCTRL_SPEED_MEDHIGH (AC_COMPCTRL_SPEED_MEDHIGH_Val << AC_COMPCTRL_SPEED_Pos) /**< (AC_COMPCTRL) Medium high speed Position */
  504. #define AC_COMPCTRL_SPEED_HIGH (AC_COMPCTRL_SPEED_HIGH_Val << AC_COMPCTRL_SPEED_Pos) /**< (AC_COMPCTRL) High speed Position */
  505. #define AC_COMPCTRL_HYSTEN_Pos 19 /**< (AC_COMPCTRL) Hysteresis Enable Position */
  506. #define AC_COMPCTRL_HYSTEN_Msk (_U_(0x1) << AC_COMPCTRL_HYSTEN_Pos) /**< (AC_COMPCTRL) Hysteresis Enable Mask */
  507. #define AC_COMPCTRL_HYSTEN AC_COMPCTRL_HYSTEN_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_COMPCTRL_HYSTEN_Msk instead */
  508. #define AC_COMPCTRL_HYST_Pos 20 /**< (AC_COMPCTRL) Hysteresis Level Position */
  509. #define AC_COMPCTRL_HYST_Msk (_U_(0x3) << AC_COMPCTRL_HYST_Pos) /**< (AC_COMPCTRL) Hysteresis Level Mask */
  510. #define AC_COMPCTRL_HYST(value) (AC_COMPCTRL_HYST_Msk & ((value) << AC_COMPCTRL_HYST_Pos))
  511. #define AC_COMPCTRL_HYST_HYST50_Val _U_(0x0) /**< (AC_COMPCTRL) 50mV */
  512. #define AC_COMPCTRL_HYST_HYST70_Val _U_(0x1) /**< (AC_COMPCTRL) 70mV */
  513. #define AC_COMPCTRL_HYST_HYST90_Val _U_(0x2) /**< (AC_COMPCTRL) 90mV */
  514. #define AC_COMPCTRL_HYST_HYST110_Val _U_(0x3) /**< (AC_COMPCTRL) 110mV */
  515. #define AC_COMPCTRL_HYST_HYST50 (AC_COMPCTRL_HYST_HYST50_Val << AC_COMPCTRL_HYST_Pos) /**< (AC_COMPCTRL) 50mV Position */
  516. #define AC_COMPCTRL_HYST_HYST70 (AC_COMPCTRL_HYST_HYST70_Val << AC_COMPCTRL_HYST_Pos) /**< (AC_COMPCTRL) 70mV Position */
  517. #define AC_COMPCTRL_HYST_HYST90 (AC_COMPCTRL_HYST_HYST90_Val << AC_COMPCTRL_HYST_Pos) /**< (AC_COMPCTRL) 90mV Position */
  518. #define AC_COMPCTRL_HYST_HYST110 (AC_COMPCTRL_HYST_HYST110_Val << AC_COMPCTRL_HYST_Pos) /**< (AC_COMPCTRL) 110mV Position */
  519. #define AC_COMPCTRL_FLEN_Pos 24 /**< (AC_COMPCTRL) Filter Length Position */
  520. #define AC_COMPCTRL_FLEN_Msk (_U_(0x7) << AC_COMPCTRL_FLEN_Pos) /**< (AC_COMPCTRL) Filter Length Mask */
  521. #define AC_COMPCTRL_FLEN(value) (AC_COMPCTRL_FLEN_Msk & ((value) << AC_COMPCTRL_FLEN_Pos))
  522. #define AC_COMPCTRL_FLEN_OFF_Val _U_(0x0) /**< (AC_COMPCTRL) No filtering */
  523. #define AC_COMPCTRL_FLEN_MAJ3_Val _U_(0x1) /**< (AC_COMPCTRL) 3-bit majority function (2 of 3) */
  524. #define AC_COMPCTRL_FLEN_MAJ5_Val _U_(0x2) /**< (AC_COMPCTRL) 5-bit majority function (3 of 5) */
  525. #define AC_COMPCTRL_FLEN_OFF (AC_COMPCTRL_FLEN_OFF_Val << AC_COMPCTRL_FLEN_Pos) /**< (AC_COMPCTRL) No filtering Position */
  526. #define AC_COMPCTRL_FLEN_MAJ3 (AC_COMPCTRL_FLEN_MAJ3_Val << AC_COMPCTRL_FLEN_Pos) /**< (AC_COMPCTRL) 3-bit majority function (2 of 3) Position */
  527. #define AC_COMPCTRL_FLEN_MAJ5 (AC_COMPCTRL_FLEN_MAJ5_Val << AC_COMPCTRL_FLEN_Pos) /**< (AC_COMPCTRL) 5-bit majority function (3 of 5) Position */
  528. #define AC_COMPCTRL_OUT_Pos 28 /**< (AC_COMPCTRL) Output Position */
  529. #define AC_COMPCTRL_OUT_Msk (_U_(0x3) << AC_COMPCTRL_OUT_Pos) /**< (AC_COMPCTRL) Output Mask */
  530. #define AC_COMPCTRL_OUT(value) (AC_COMPCTRL_OUT_Msk & ((value) << AC_COMPCTRL_OUT_Pos))
  531. #define AC_COMPCTRL_OUT_OFF_Val _U_(0x0) /**< (AC_COMPCTRL) The output of COMPn is not routed to the COMPn I/O port */
  532. #define AC_COMPCTRL_OUT_ASYNC_Val _U_(0x1) /**< (AC_COMPCTRL) The asynchronous output of COMPn is routed to the COMPn I/O port */
  533. #define AC_COMPCTRL_OUT_SYNC_Val _U_(0x2) /**< (AC_COMPCTRL) The synchronous output (including filtering) of COMPn is routed to the COMPn I/O port */
  534. #define AC_COMPCTRL_OUT_OFF (AC_COMPCTRL_OUT_OFF_Val << AC_COMPCTRL_OUT_Pos) /**< (AC_COMPCTRL) The output of COMPn is not routed to the COMPn I/O port Position */
  535. #define AC_COMPCTRL_OUT_ASYNC (AC_COMPCTRL_OUT_ASYNC_Val << AC_COMPCTRL_OUT_Pos) /**< (AC_COMPCTRL) The asynchronous output of COMPn is routed to the COMPn I/O port Position */
  536. #define AC_COMPCTRL_OUT_SYNC (AC_COMPCTRL_OUT_SYNC_Val << AC_COMPCTRL_OUT_Pos) /**< (AC_COMPCTRL) The synchronous output (including filtering) of COMPn is routed to the COMPn I/O port Position */
  537. #define AC_COMPCTRL_MASK _U_(0x373BF75E) /**< \deprecated (AC_COMPCTRL) Register MASK (Use AC_COMPCTRL_Msk instead) */
  538. #define AC_COMPCTRL_Msk _U_(0x373BF75E) /**< (AC_COMPCTRL) Register Mask */
  539. /* -------- AC_SYNCBUSY : (AC Offset: 0x20) (R/ 32) Synchronization Busy -------- */
  540. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  541. typedef union {
  542. struct {
  543. uint32_t SWRST:1; /**< bit: 0 Software Reset Synchronization Busy */
  544. uint32_t ENABLE:1; /**< bit: 1 Enable Synchronization Busy */
  545. uint32_t WINCTRL:1; /**< bit: 2 WINCTRL Synchronization Busy */
  546. uint32_t COMPCTRL0:1; /**< bit: 3 COMPCTRL 0 Synchronization Busy */
  547. uint32_t COMPCTRL1:1; /**< bit: 4 COMPCTRL 1 Synchronization Busy */
  548. uint32_t :27; /**< bit: 5..31 Reserved */
  549. } bit; /**< Structure used for bit access */
  550. struct {
  551. uint32_t :3; /**< bit: 0..2 Reserved */
  552. uint32_t COMPCTRL:2; /**< bit: 3..4 COMPCTRL x Synchronization Busy */
  553. uint32_t :27; /**< bit: 5..31 Reserved */
  554. } vec; /**< Structure used for vec access */
  555. uint32_t reg; /**< Type used for register access */
  556. } AC_SYNCBUSY_Type;
  557. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  558. #define AC_SYNCBUSY_OFFSET (0x20) /**< (AC_SYNCBUSY) Synchronization Busy Offset */
  559. #define AC_SYNCBUSY_RESETVALUE _U_(0x00) /**< (AC_SYNCBUSY) Synchronization Busy Reset Value */
  560. #define AC_SYNCBUSY_SWRST_Pos 0 /**< (AC_SYNCBUSY) Software Reset Synchronization Busy Position */
  561. #define AC_SYNCBUSY_SWRST_Msk (_U_(0x1) << AC_SYNCBUSY_SWRST_Pos) /**< (AC_SYNCBUSY) Software Reset Synchronization Busy Mask */
  562. #define AC_SYNCBUSY_SWRST AC_SYNCBUSY_SWRST_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_SYNCBUSY_SWRST_Msk instead */
  563. #define AC_SYNCBUSY_ENABLE_Pos 1 /**< (AC_SYNCBUSY) Enable Synchronization Busy Position */
  564. #define AC_SYNCBUSY_ENABLE_Msk (_U_(0x1) << AC_SYNCBUSY_ENABLE_Pos) /**< (AC_SYNCBUSY) Enable Synchronization Busy Mask */
  565. #define AC_SYNCBUSY_ENABLE AC_SYNCBUSY_ENABLE_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_SYNCBUSY_ENABLE_Msk instead */
  566. #define AC_SYNCBUSY_WINCTRL_Pos 2 /**< (AC_SYNCBUSY) WINCTRL Synchronization Busy Position */
  567. #define AC_SYNCBUSY_WINCTRL_Msk (_U_(0x1) << AC_SYNCBUSY_WINCTRL_Pos) /**< (AC_SYNCBUSY) WINCTRL Synchronization Busy Mask */
  568. #define AC_SYNCBUSY_WINCTRL AC_SYNCBUSY_WINCTRL_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_SYNCBUSY_WINCTRL_Msk instead */
  569. #define AC_SYNCBUSY_COMPCTRL0_Pos 3 /**< (AC_SYNCBUSY) COMPCTRL 0 Synchronization Busy Position */
  570. #define AC_SYNCBUSY_COMPCTRL0_Msk (_U_(0x1) << AC_SYNCBUSY_COMPCTRL0_Pos) /**< (AC_SYNCBUSY) COMPCTRL 0 Synchronization Busy Mask */
  571. #define AC_SYNCBUSY_COMPCTRL0 AC_SYNCBUSY_COMPCTRL0_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_SYNCBUSY_COMPCTRL0_Msk instead */
  572. #define AC_SYNCBUSY_COMPCTRL1_Pos 4 /**< (AC_SYNCBUSY) COMPCTRL 1 Synchronization Busy Position */
  573. #define AC_SYNCBUSY_COMPCTRL1_Msk (_U_(0x1) << AC_SYNCBUSY_COMPCTRL1_Pos) /**< (AC_SYNCBUSY) COMPCTRL 1 Synchronization Busy Mask */
  574. #define AC_SYNCBUSY_COMPCTRL1 AC_SYNCBUSY_COMPCTRL1_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use AC_SYNCBUSY_COMPCTRL1_Msk instead */
  575. #define AC_SYNCBUSY_MASK _U_(0x1F) /**< \deprecated (AC_SYNCBUSY) Register MASK (Use AC_SYNCBUSY_Msk instead) */
  576. #define AC_SYNCBUSY_Msk _U_(0x1F) /**< (AC_SYNCBUSY) Register Mask */
  577. #define AC_SYNCBUSY_COMPCTRL_Pos 3 /**< (AC_SYNCBUSY Position) COMPCTRL x Synchronization Busy */
  578. #define AC_SYNCBUSY_COMPCTRL_Msk (_U_(0x3) << AC_SYNCBUSY_COMPCTRL_Pos) /**< (AC_SYNCBUSY Mask) COMPCTRL */
  579. #define AC_SYNCBUSY_COMPCTRL(value) (AC_SYNCBUSY_COMPCTRL_Msk & ((value) << AC_SYNCBUSY_COMPCTRL_Pos))
  580. #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  581. /** \brief AC hardware registers */
  582. typedef struct { /* Analog Comparators */
  583. __IO AC_CTRLA_Type CTRLA; /**< Offset: 0x00 (R/W 8) Control A */
  584. __O AC_CTRLB_Type CTRLB; /**< Offset: 0x01 ( /W 8) Control B */
  585. __IO AC_EVCTRL_Type EVCTRL; /**< Offset: 0x02 (R/W 16) Event Control */
  586. __IO AC_INTENCLR_Type INTENCLR; /**< Offset: 0x04 (R/W 8) Interrupt Enable Clear */
  587. __IO AC_INTENSET_Type INTENSET; /**< Offset: 0x05 (R/W 8) Interrupt Enable Set */
  588. __IO AC_INTFLAG_Type INTFLAG; /**< Offset: 0x06 (R/W 8) Interrupt Flag Status and Clear */
  589. __I AC_STATUSA_Type STATUSA; /**< Offset: 0x07 (R/ 8) Status A */
  590. __I AC_STATUSB_Type STATUSB; /**< Offset: 0x08 (R/ 8) Status B */
  591. __IO AC_DBGCTRL_Type DBGCTRL; /**< Offset: 0x09 (R/W 8) Debug Control */
  592. __IO AC_WINCTRL_Type WINCTRL; /**< Offset: 0x0A (R/W 8) Window Control */
  593. __I uint8_t Reserved1[1];
  594. __IO AC_SCALER_Type SCALER[2]; /**< Offset: 0x0C (R/W 8) Scaler n */
  595. __I uint8_t Reserved2[2];
  596. __IO AC_COMPCTRL_Type COMPCTRL[2]; /**< Offset: 0x10 (R/W 32) Comparator Control n */
  597. __I uint8_t Reserved3[8];
  598. __I AC_SYNCBUSY_Type SYNCBUSY; /**< Offset: 0x20 (R/ 32) Synchronization Busy */
  599. } Ac;
  600. #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  601. /** @} end of Analog Comparators */
  602. #endif /* _SAML11_AC_COMPONENT_H_ */