stm32f3xx_hal_can.h 36 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f3xx_hal_can.h
  4. * @author MCD Application Team
  5. * @version V1.4.0
  6. * @date 16-December-2016
  7. * @brief Header file of CAN HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32F3xx_CAN_H
  39. #define __STM32F3xx_CAN_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
  44. defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
  45. defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
  46. defined(STM32F302x8) || \
  47. defined(STM32F373xC) || defined(STM32F378xx)
  48. /* Includes ------------------------------------------------------------------*/
  49. #include "stm32f3xx_hal_def.h"
  50. /** @addtogroup STM32F3xx_HAL_Driver
  51. * @{
  52. */
  53. /** @addtogroup CAN
  54. * @{
  55. */
  56. /* Exported types ------------------------------------------------------------*/
  57. /** @defgroup CAN_Exported_Types CAN Exported Types
  58. * @{
  59. */
  60. /**
  61. * @brief HAL State structures definition
  62. */
  63. typedef enum
  64. {
  65. HAL_CAN_STATE_RESET = 0x00U, /*!< CAN not yet initialized or disabled */
  66. HAL_CAN_STATE_READY = 0x01U, /*!< CAN initialized and ready for use */
  67. HAL_CAN_STATE_BUSY = 0x02U, /*!< CAN process is ongoing */
  68. HAL_CAN_STATE_BUSY_TX = 0x12U, /*!< CAN process is ongoing */
  69. HAL_CAN_STATE_BUSY_RX = 0x22U, /*!< CAN process is ongoing */
  70. HAL_CAN_STATE_BUSY_TX_RX = 0x32U, /*!< CAN process is ongoing */
  71. HAL_CAN_STATE_TIMEOUT = 0x03U, /*!< CAN in Timeout state */
  72. HAL_CAN_STATE_ERROR = 0x04 /*!< CAN error state */
  73. }HAL_CAN_StateTypeDef;
  74. /**
  75. * @brief CAN init structure definition
  76. */
  77. typedef struct
  78. {
  79. uint32_t Prescaler; /*!< Specifies the length of a time quantum.
  80. This parameter must be a number between Min_Data = 1 and Max_Data = 1024. */
  81. uint32_t Mode; /*!< Specifies the CAN operating mode.
  82. This parameter can be a value of @ref CAN_operating_mode */
  83. uint32_t SJW; /*!< Specifies the maximum number of time quanta
  84. the CAN hardware is allowed to lengthen or
  85. shorten a bit to perform resynchronization.
  86. This parameter can be a value of @ref CAN_synchronisation_jump_width */
  87. uint32_t BS1; /*!< Specifies the number of time quanta in Bit Segment 1.
  88. This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
  89. uint32_t BS2; /*!< Specifies the number of time quanta in Bit Segment 2.
  90. This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
  91. uint32_t TTCM; /*!< Enable or disable the time triggered communication mode.
  92. This parameter can be set to ENABLE or DISABLE. */
  93. uint32_t ABOM; /*!< Enable or disable the automatic bus-off management.
  94. This parameter can be set to ENABLE or DISABLE. */
  95. uint32_t AWUM; /*!< Enable or disable the automatic wake-up mode.
  96. This parameter can be set to ENABLE or DISABLE. */
  97. uint32_t NART; /*!< Enable or disable the non-automatic retransmission mode.
  98. This parameter can be set to ENABLE or DISABLE. */
  99. uint32_t RFLM; /*!< Enable or disable the Receive FIFO Locked mode.
  100. This parameter can be set to ENABLE or DISABLE. */
  101. uint32_t TXFP; /*!< Enable or disable the transmit FIFO priority.
  102. This parameter can be set to ENABLE or DISABLE. */
  103. }CAN_InitTypeDef;
  104. /**
  105. * @brief CAN filter configuration structure definition
  106. */
  107. typedef struct
  108. {
  109. uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
  110. configuration, first one for a 16-bit configuration).
  111. This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
  112. uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
  113. configuration, second one for a 16-bit configuration).
  114. This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
  115. uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
  116. according to the mode (MSBs for a 32-bit configuration,
  117. first one for a 16-bit configuration).
  118. This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
  119. uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
  120. according to the mode (LSBs for a 32-bit configuration,
  121. second one for a 16-bit configuration).
  122. This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
  123. uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1U) which will be assigned to the filter.
  124. This parameter can be a value of @ref CAN_filter_FIFO */
  125. uint32_t FilterNumber; /*!< Specifies the filter which will be initialized.
  126. This parameter must be a number between Min_Data = 0 and Max_Data = 27. */
  127. uint32_t FilterMode; /*!< Specifies the filter mode to be initialized.
  128. This parameter can be a value of @ref CAN_filter_mode */
  129. uint32_t FilterScale; /*!< Specifies the filter scale.
  130. This parameter can be a value of @ref CAN_filter_scale */
  131. uint32_t FilterActivation; /*!< Enable or disable the filter.
  132. This parameter can be set to ENABLE or DISABLE. */
  133. uint32_t BankNumber; /*!< Select the start slave bank filter
  134. F3 devices don't support CAN2 interface (Slave). Therefore this parameter
  135. is meaningless but it has been kept for compatibility accross STM32 families */
  136. }CAN_FilterConfTypeDef;
  137. /**
  138. * @brief CAN Tx message structure definition
  139. */
  140. typedef struct
  141. {
  142. uint32_t StdId; /*!< Specifies the standard identifier.
  143. This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */
  144. uint32_t ExtId; /*!< Specifies the extended identifier.
  145. This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */
  146. uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
  147. This parameter can be a value of @ref CAN_identifier_type */
  148. uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
  149. This parameter can be a value of @ref CAN_remote_transmission_request */
  150. uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
  151. This parameter must be a number between Min_Data = 0 and Max_Data = 8. */
  152. uint8_t Data[8]; /*!< Contains the data to be transmitted.
  153. This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */
  154. }CanTxMsgTypeDef;
  155. /**
  156. * @brief CAN Rx message structure definition
  157. */
  158. typedef struct
  159. {
  160. uint32_t StdId; /*!< Specifies the standard identifier.
  161. This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */
  162. uint32_t ExtId; /*!< Specifies the extended identifier.
  163. This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */
  164. uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received.
  165. This parameter can be a value of @ref CAN_identifier_type */
  166. uint32_t RTR; /*!< Specifies the type of frame for the received message.
  167. This parameter can be a value of @ref CAN_remote_transmission_request */
  168. uint32_t DLC; /*!< Specifies the length of the frame that will be received.
  169. This parameter must be a number between Min_Data = 0 and Max_Data = 8. */
  170. uint8_t Data[8]; /*!< Contains the data to be received.
  171. This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */
  172. uint32_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through.
  173. This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */
  174. uint32_t FIFONumber; /*!< Specifies the receive FIFO number.
  175. This parameter can be CAN_FIFO0 or CAN_FIFO1 */
  176. }CanRxMsgTypeDef;
  177. /**
  178. * @brief CAN handle Structure definition
  179. */
  180. typedef struct
  181. {
  182. CAN_TypeDef *Instance; /*!< Register base address */
  183. CAN_InitTypeDef Init; /*!< CAN required parameters */
  184. CanTxMsgTypeDef* pTxMsg; /*!< Pointer to transmit structure */
  185. CanRxMsgTypeDef* pRxMsg; /*!< Pointer to reception structure */
  186. HAL_LockTypeDef Lock; /*!< CAN locking object */
  187. __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */
  188. __IO uint32_t ErrorCode; /*!< CAN Error code
  189. This parameter can be a value of @ref CAN_Error_Code */
  190. }CAN_HandleTypeDef;
  191. /**
  192. * @}
  193. */
  194. /* Exported constants --------------------------------------------------------*/
  195. /** @defgroup CAN_Exported_Constants CAN Exported Constants
  196. * @{
  197. */
  198. /** @defgroup CAN_Error_Code CAN Error Code
  199. * @{
  200. */
  201. #define HAL_CAN_ERROR_NONE (0x00000000U) /*!< No error */
  202. #define HAL_CAN_ERROR_EWG (0x00000001U) /*!< EWG error */
  203. #define HAL_CAN_ERROR_EPV (0x00000002U) /*!< EPV error */
  204. #define HAL_CAN_ERROR_BOF (0x00000004U) /*!< BOF error */
  205. #define HAL_CAN_ERROR_STF (0x00000008U) /*!< Stuff error */
  206. #define HAL_CAN_ERROR_FOR (0x00000010U) /*!< Form error */
  207. #define HAL_CAN_ERROR_ACK (0x00000020U) /*!< Acknowledgment error */
  208. #define HAL_CAN_ERROR_BR (0x00000040U) /*!< Bit recessive */
  209. #define HAL_CAN_ERROR_BD (0x00000080U) /*!< LEC dominant */
  210. #define HAL_CAN_ERROR_CRC (0x00000100U) /*!< LEC transfer error */
  211. /**
  212. * @}
  213. */
  214. /** @defgroup CAN_InitStatus CAN InitStatus
  215. * @{
  216. */
  217. #define CAN_INITSTATUS_FAILED (0x00000000U) /*!< CAN initialization failed */
  218. #define CAN_INITSTATUS_SUCCESS (0x00000001U) /*!< CAN initialization OK */
  219. /**
  220. * @}
  221. */
  222. /** @defgroup CAN_operating_mode CAN Operating Mode
  223. * @{
  224. */
  225. #define CAN_MODE_NORMAL (0x00000000U) /*!< Normal mode */
  226. #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */
  227. #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */
  228. #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */
  229. /**
  230. * @}
  231. */
  232. /** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width
  233. * @{
  234. */
  235. #define CAN_SJW_1TQ (0x00000000U) /*!< 1 time quantum */
  236. #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */
  237. #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */
  238. #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */
  239. /**
  240. * @}
  241. */
  242. /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1
  243. * @{
  244. */
  245. #define CAN_BS1_1TQ (0x00000000U) /*!< 1 time quantum */
  246. #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */
  247. #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */
  248. #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */
  249. #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */
  250. #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */
  251. #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */
  252. #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */
  253. #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */
  254. #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */
  255. #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */
  256. #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */
  257. #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */
  258. #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */
  259. #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */
  260. #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
  261. /**
  262. * @}
  263. */
  264. /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2
  265. * @{
  266. */
  267. #define CAN_BS2_1TQ (0x00000000U) /*!< 1 time quantum */
  268. #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */
  269. #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */
  270. #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */
  271. #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */
  272. #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */
  273. #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */
  274. #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */
  275. /**
  276. * @}
  277. */
  278. /** @defgroup CAN_filter_mode CAN Filter Mode
  279. * @{
  280. */
  281. #define CAN_FILTERMODE_IDMASK ((uint8_t)0x00U) /*!< Identifier mask mode */
  282. #define CAN_FILTERMODE_IDLIST ((uint8_t)0x01U) /*!< Identifier list mode */
  283. /**
  284. * @}
  285. */
  286. /** @defgroup CAN_filter_scale CAN Filter Scale
  287. * @{
  288. */
  289. #define CAN_FILTERSCALE_16BIT ((uint8_t)0x00U) /*!< Two 16-bit filters */
  290. #define CAN_FILTERSCALE_32BIT ((uint8_t)0x01U) /*!< One 32-bit filter */
  291. /**
  292. * @}
  293. */
  294. /** @defgroup CAN_filter_FIFO CAN Filter FIFO
  295. * @{
  296. */
  297. #define CAN_FILTER_FIFO0 ((uint8_t)0x00U) /*!< Filter FIFO 0 assignment for filter x */
  298. #define CAN_FILTER_FIFO1 ((uint8_t)0x01U) /*!< Filter FIFO 1 assignment for filter x */
  299. /**
  300. * @}
  301. */
  302. /** @defgroup CAN_identifier_type CAN Identifier Type
  303. * @{
  304. */
  305. #define CAN_ID_STD (0x00000000U) /*!< Standard Id */
  306. #define CAN_ID_EXT (0x00000004U) /*!< Extended Id */
  307. /**
  308. * @}
  309. */
  310. /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
  311. * @{
  312. */
  313. #define CAN_RTR_DATA (0x00000000U) /*!< Data frame */
  314. #define CAN_RTR_REMOTE (0x00000002U) /*!< Remote frame */
  315. /**
  316. * @}
  317. */
  318. /** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number
  319. * @{
  320. */
  321. #define CAN_FIFO0 ((uint8_t)0x00U) /*!< CAN FIFO 0 used to receive */
  322. #define CAN_FIFO1 ((uint8_t)0x01U) /*!< CAN FIFO 1 used to receive */
  323. /**
  324. * @}
  325. */
  326. /** @defgroup CAN_flags CAN Flags
  327. * @{
  328. */
  329. /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
  330. and CAN_ClearFlag() functions. */
  331. /* If the flag is 0x1XXXXXXX, it means that it can only be used with
  332. CAN_GetFlagStatus() function. */
  333. /* Transmit Flags */
  334. #define CAN_FLAG_RQCP0 (0x00000500U) /*!< Request MailBox0 flag */
  335. #define CAN_FLAG_RQCP1 (0x00000508U) /*!< Request MailBox1 flag */
  336. #define CAN_FLAG_RQCP2 (0x00000510U) /*!< Request MailBox2 flag */
  337. #define CAN_FLAG_TXOK0 (0x00000501U) /*!< Transmission OK MailBox0 flag */
  338. #define CAN_FLAG_TXOK1 (0x00000509U) /*!< Transmission OK MailBox1 flag */
  339. #define CAN_FLAG_TXOK2 (0x00000511U) /*!< Transmission OK MailBox2 flag */
  340. #define CAN_FLAG_TME0 (0x0000051AU) /*!< Transmit mailbox 0 empty flag */
  341. #define CAN_FLAG_TME1 (0x0000051BU) /*!< Transmit mailbox 0 empty flag */
  342. #define CAN_FLAG_TME2 (0x0000051CU) /*!< Transmit mailbox 0 empty flag */
  343. /* Receive Flags */
  344. #define CAN_FLAG_FF0 (0x00000203U) /*!< FIFO 0 Full flag */
  345. #define CAN_FLAG_FOV0 (0x00000204U) /*!< FIFO 0 Overrun flag */
  346. #define CAN_FLAG_FF1 (0x00000403U) /*!< FIFO 1 Full flag */
  347. #define CAN_FLAG_FOV1 (0x00000404U) /*!< FIFO 1 Overrun flag */
  348. /* Operating Mode Flags */
  349. #define CAN_FLAG_WKU (0x00000103U) /*!< Wake up flag */
  350. #define CAN_FLAG_SLAK (0x00000101U) /*!< Sleep acknowledge flag */
  351. #define CAN_FLAG_SLAKI (0x00000104U) /*!< Sleep acknowledge flag */
  352. /* @note When SLAK interrupt is disabled (SLKIE=0U), no polling on SLAKI is possible.
  353. In this case the SLAK bit can be polled.*/
  354. /* Error Flags */
  355. #define CAN_FLAG_EWG (0x00000300U) /*!< Error warning flag */
  356. #define CAN_FLAG_EPV (0x00000301U) /*!< Error passive flag */
  357. #define CAN_FLAG_BOF (0x00000302U) /*!< Bus-Off flag */
  358. /**
  359. * @}
  360. */
  361. /** @defgroup CAN_interrupts CAN Interrupts
  362. * @{
  363. */
  364. #define CAN_IT_TME ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */
  365. /* Receive Interrupts */
  366. #define CAN_IT_FMP0 ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */
  367. #define CAN_IT_FF0 ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */
  368. #define CAN_IT_FOV0 ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */
  369. #define CAN_IT_FMP1 ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */
  370. #define CAN_IT_FF1 ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */
  371. #define CAN_IT_FOV1 ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */
  372. /* Operating Mode Interrupts */
  373. #define CAN_IT_WKU ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */
  374. #define CAN_IT_SLK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */
  375. /* Error Interrupts */
  376. #define CAN_IT_EWG ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */
  377. #define CAN_IT_EPV ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */
  378. #define CAN_IT_BOF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */
  379. #define CAN_IT_LEC ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */
  380. #define CAN_IT_ERR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */
  381. /**
  382. * @}
  383. */
  384. /** @defgroup CAN_Mailboxes CAN Mailboxes
  385. * @{
  386. */
  387. /* Mailboxes definition */
  388. #define CAN_TXMAILBOX_0 ((uint8_t)0x00U)
  389. #define CAN_TXMAILBOX_1 ((uint8_t)0x01U)
  390. #define CAN_TXMAILBOX_2 ((uint8_t)0x02U)
  391. /**
  392. * @}
  393. */
  394. /**
  395. * @}
  396. */
  397. /* Exported macros -----------------------------------------------------------*/
  398. /** @defgroup CAN_Exported_Macros CAN Exported Macros
  399. * @{
  400. */
  401. /** @brief Reset CAN handle state
  402. * @param __HANDLE__: CAN handle.
  403. * @retval None
  404. */
  405. #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
  406. /**
  407. * @brief Enable the specified CAN interrupts.
  408. * @param __HANDLE__: CAN handle.
  409. * @param __INTERRUPT__: CAN Interrupt
  410. * @retval None
  411. */
  412. #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
  413. /**
  414. * @brief Disable the specified CAN interrupts.
  415. * @param __HANDLE__: CAN handle.
  416. * @param __INTERRUPT__: CAN Interrupt
  417. * @retval None
  418. */
  419. #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
  420. /**
  421. * @brief Return the number of pending received messages.
  422. * @param __HANDLE__: CAN handle.
  423. * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
  424. * @retval The number of pending message.
  425. */
  426. #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
  427. ((uint8_t)((__HANDLE__)->Instance->RF0R&0x03U)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&0x03U)))
  428. /** @brief Check whether the specified CAN flag is set or not.
  429. * @param __HANDLE__: specifies the CAN Handle.
  430. * @param __FLAG__: specifies the flag to check.
  431. * This parameter can be one of the following values:
  432. * @arg CAN_TSR_RQCP0: Request MailBox0 Flag
  433. * @arg CAN_TSR_RQCP1: Request MailBox1 Flag
  434. * @arg CAN_TSR_RQCP2: Request MailBox2 Flag
  435. * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
  436. * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
  437. * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
  438. * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
  439. * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
  440. * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
  441. * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
  442. * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
  443. * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
  444. * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
  445. * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
  446. * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
  447. * @arg CAN_FLAG_WKU: Wake up Flag
  448. * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
  449. * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
  450. * @arg CAN_FLAG_EWG: Error Warning Flag
  451. * @arg CAN_FLAG_EPV: Error Passive Flag
  452. * @arg CAN_FLAG_BOF: Bus-Off Flag
  453. * @retval The new state of __FLAG__ (TRUE or FALSE).
  454. */
  455. #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
  456. ((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
  457. (((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
  458. (((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
  459. (((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
  460. ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))))
  461. /** @brief Clear the specified CAN pending flag.
  462. * @param __HANDLE__: specifies the CAN Handle.
  463. * @param __FLAG__: specifies the flag to check.
  464. * This parameter can be one of the following values:
  465. * @arg CAN_TSR_RQCP0: Request MailBox0 Flag
  466. * @arg CAN_TSR_RQCP1: Request MailBox1 Flag
  467. * @arg CAN_TSR_RQCP2: Request MailBox2 Flag
  468. * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
  469. * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
  470. * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
  471. * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
  472. * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
  473. * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
  474. * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
  475. * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
  476. * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
  477. * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
  478. * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
  479. * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
  480. * @arg CAN_FLAG_WKU: Wake up Flag
  481. * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
  482. * @arg CAN_FLAG_EWG: Error Warning Flag
  483. * @arg CAN_FLAG_EPV: Error Passive Flag
  484. * @arg CAN_FLAG_BOF: Bus-Off Flag
  485. * @retval The new state of __FLAG__ (TRUE or FALSE).
  486. */
  487. #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
  488. ((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
  489. (((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
  490. (((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
  491. (((__FLAG__) >> 8U) == 1U)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U)
  492. /** @brief Check if the specified CAN interrupt source is enabled or disabled.
  493. * @param __HANDLE__: specifies the CAN Handle.
  494. * @param __INTERRUPT__: specifies the CAN interrupt source to check.
  495. * This parameter can be one of the following values:
  496. * @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
  497. * @arg CAN_IT_FMP0: FIFO0 message pending interrupt enablev
  498. * @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable
  499. * @retval The new state of __IT__ (TRUE or FALSE).
  500. */
  501. #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
  502. /**
  503. * @brief Check the transmission status of a CAN Frame.
  504. * @param __HANDLE__: CAN handle.
  505. * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
  506. * @retval The new status of transmission (TRUE or FALSE).
  507. */
  508. #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
  509. (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\
  510. ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\
  511. ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)))
  512. /**
  513. * @brief Release the specified receive FIFO.
  514. * @param __HANDLE__: CAN handle.
  515. * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
  516. * @retval None
  517. */
  518. #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
  519. ((__HANDLE__)->Instance->RF0R |= CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R |= CAN_RF1R_RFOM1))
  520. /**
  521. * @brief Cancel a transmit request.
  522. * @param __HANDLE__: specifies the CAN Handle.
  523. * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
  524. * @retval None
  525. */
  526. #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
  527. (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ0) :\
  528. ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ1) :\
  529. ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ2))
  530. /**
  531. * @brief Enable or disables the DBG Freeze for CAN.
  532. * @param __HANDLE__: specifies the CAN Handle.
  533. * @param __NEWSTATE__: new state of the CAN peripheral.
  534. * This parameter can be: ENABLE (CAN reception/transmission is frozen
  535. * during debug. Reception FIFOs can still be accessed/controlled normally)
  536. * or DISABLE (CAN is working during debug).
  537. * @retval None
  538. */
  539. #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
  540. ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
  541. /**
  542. * @}
  543. */
  544. /* Exported functions --------------------------------------------------------*/
  545. /** @addtogroup CAN_Exported_Functions CAN Exported Functions
  546. * @{
  547. */
  548. /** @addtogroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions
  549. * @brief Initialization and Configuration functions
  550. * @{
  551. */
  552. /* Initialization and de-initialization functions *****************************/
  553. HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
  554. HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
  555. HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
  556. void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
  557. void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
  558. /**
  559. * @}
  560. */
  561. /** @addtogroup CAN_Exported_Functions_Group2 Input and Output operation functions
  562. * @brief I/O operation functions
  563. * @{
  564. */
  565. /* IO operation functions *****************************************************/
  566. HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
  567. HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
  568. HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
  569. HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
  570. HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
  571. HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
  572. void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
  573. void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
  574. void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
  575. void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
  576. /**
  577. * @}
  578. */
  579. /** @addtogroup CAN_Exported_Functions_Group3 Peripheral State and Error functions
  580. * @brief CAN Peripheral State functions
  581. * @{
  582. */
  583. /* Peripheral State and Error functions ***************************************/
  584. uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
  585. HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
  586. /**
  587. * @}
  588. */
  589. /**
  590. * @}
  591. */
  592. /* Private types -------------------------------------------------------------*/
  593. /** @defgroup CAN_Private_Types CAN Private Types
  594. * @{
  595. */
  596. /**
  597. * @}
  598. */
  599. /* Private variables ---------------------------------------------------------*/
  600. /** @defgroup CAN_Private_Variables CAN Private Variables
  601. * @{
  602. */
  603. /**
  604. * @}
  605. */
  606. /* Private constants ---------------------------------------------------------*/
  607. /** @defgroup CAN_Private_Constants CAN Private Constants
  608. * @{
  609. */
  610. #define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04U) /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
  611. #define CAN_FLAG_MASK (0x000000FFU)
  612. /**
  613. * @}
  614. */
  615. /* Private Macros -----------------------------------------------------------*/
  616. /** @defgroup CAN_Private_Macros CAN Private Macros
  617. * @{
  618. */
  619. #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
  620. ((MODE) == CAN_MODE_LOOPBACK)|| \
  621. ((MODE) == CAN_MODE_SILENT) || \
  622. ((MODE) == CAN_MODE_SILENT_LOOPBACK))
  623. #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \
  624. ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
  625. #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
  626. #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
  627. #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U))
  628. #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27U)
  629. #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
  630. ((MODE) == CAN_FILTERMODE_IDLIST))
  631. #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
  632. ((SCALE) == CAN_FILTERSCALE_32BIT))
  633. #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
  634. ((FIFO) == CAN_FILTER_FIFO1))
  635. #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28U)
  636. #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02U))
  637. #define IS_CAN_STDID(STDID) ((STDID) <= (0x7FFU))
  638. #define IS_CAN_EXTID(EXTID) ((EXTID) <= (0x1FFFFFFFU))
  639. #define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08U))
  640. #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \
  641. ((IDTYPE) == CAN_ID_EXT))
  642. #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
  643. #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
  644. #define IS_CAN_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FMP0) ||\
  645. ((IT) == CAN_IT_FF0) || ((IT) == CAN_IT_FOV0) ||\
  646. ((IT) == CAN_IT_FMP1) || ((IT) == CAN_IT_FF1) ||\
  647. ((IT) == CAN_IT_FOV1) || ((IT) == CAN_IT_EWG) ||\
  648. ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\
  649. ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\
  650. ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK))
  651. #define IS_CAN_CLEAR_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FF0) ||\
  652. ((IT) == CAN_IT_FOV0)|| ((IT) == CAN_IT_FF1) ||\
  653. ((IT) == CAN_IT_FOV1)|| ((IT) == CAN_IT_EWG) ||\
  654. ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\
  655. ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\
  656. ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK))
  657. /**
  658. * @}
  659. */
  660. /* End of private macros -----------------------------------------------------*/
  661. /**
  662. * @}
  663. */
  664. /**
  665. * @}
  666. */
  667. #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
  668. /* STM32F302xC || STM32F303xC || STM32F358xx || */
  669. /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
  670. /* STM32F302x8 || */
  671. /* STM32F373xC || STM32F378xx */
  672. #ifdef __cplusplus
  673. }
  674. #endif
  675. #endif /* __STM32F3xx_CAN_H */
  676. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/