stm32f0xx_hal_uart.h 62 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f0xx_hal_uart.h
  4. * @author MCD Application Team
  5. * @version V1.5.0
  6. * @date 04-November-2016
  7. * @brief Header file of UART HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32F0xx_HAL_UART_H
  39. #define __STM32F0xx_HAL_UART_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. /* Includes ------------------------------------------------------------------*/
  44. #include "stm32f0xx_hal_def.h"
  45. /** @addtogroup STM32F0xx_HAL_Driver
  46. * @{
  47. */
  48. /** @addtogroup UART
  49. * @{
  50. */
  51. /* Exported types ------------------------------------------------------------*/
  52. /** @defgroup UART_Exported_Types UART Exported Types
  53. * @{
  54. */
  55. /**
  56. * @brief UART Init Structure definition
  57. */
  58. typedef struct
  59. {
  60. uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
  61. The baud rate register is computed using the following formula:
  62. - If oversampling is 16 or in LIN mode (LIN mode not available on F030xx devices),
  63. Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate)))
  64. - If oversampling is 8,
  65. Baud Rate Register[15:4] = ((2 * PCLKx) / ((huart->Init.BaudRate)))[15:4]
  66. Baud Rate Register[3] = 0
  67. Baud Rate Register[2:0] = (((2 * PCLKx) / ((huart->Init.BaudRate)))[3:0]) >> 1U */
  68. uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
  69. This parameter can be a value of @ref UARTEx_Word_Length. */
  70. uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
  71. This parameter can be a value of @ref UART_Stop_Bits. */
  72. uint32_t Parity; /*!< Specifies the parity mode.
  73. This parameter can be a value of @ref UART_Parity
  74. @note When parity is enabled, the computed parity is inserted
  75. at the MSB position of the transmitted data (9th bit when
  76. the word length is set to 9 data bits; 8th bit when the
  77. word length is set to 8 data bits). */
  78. uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
  79. This parameter can be a value of @ref UART_Mode. */
  80. uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
  81. or disabled.
  82. This parameter can be a value of @ref UART_Hardware_Flow_Control. */
  83. uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8).
  84. This parameter can be a value of @ref UART_Over_Sampling. */
  85. uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected.
  86. Selecting the single sample method increases the receiver tolerance to clock
  87. deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */
  88. }UART_InitTypeDef;
  89. /**
  90. * @brief UART Advanced Features initalization structure definition
  91. */
  92. typedef struct
  93. {
  94. uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
  95. Advanced Features may be initialized at the same time .
  96. This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */
  97. uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
  98. This parameter can be a value of @ref UART_Tx_Inv. */
  99. uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
  100. This parameter can be a value of @ref UART_Rx_Inv. */
  101. uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
  102. vs negative/inverted logic).
  103. This parameter can be a value of @ref UART_Data_Inv. */
  104. uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
  105. This parameter can be a value of @ref UART_Rx_Tx_Swap. */
  106. uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
  107. This parameter can be a value of @ref UART_Overrun_Disable. */
  108. uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
  109. This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */
  110. uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
  111. This parameter can be a value of @ref UART_AutoBaudRate_Enable */
  112. uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
  113. detection is carried out.
  114. This parameter can be a value of @ref UARTEx_AutoBaud_Rate_Mode. */
  115. uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
  116. This parameter can be a value of @ref UART_MSB_First. */
  117. } UART_AdvFeatureInitTypeDef;
  118. /**
  119. * @brief HAL UART State structures definition
  120. * @note HAL UART State value is a combination of 2 different substates: gState and RxState.
  121. * - gState contains UART state information related to global Handle management
  122. * and also information related to Tx operations.
  123. * gState value coding follow below described bitmap :
  124. * b7-b6 Error information
  125. * 00 : No Error
  126. * 01 : (Not Used)
  127. * 10 : Timeout
  128. * 11 : Error
  129. * b5 IP initilisation status
  130. * 0 : Reset (IP not initialized)
  131. * 1 : Init done (IP not initialized. HAL UART Init function already called)
  132. * b4-b3 (not used)
  133. * xx : Should be set to 00
  134. * b2 Intrinsic process state
  135. * 0 : Ready
  136. * 1 : Busy (IP busy with some configuration or internal operations)
  137. * b1 (not used)
  138. * x : Should be set to 0
  139. * b0 Tx state
  140. * 0 : Ready (no Tx operation ongoing)
  141. * 1 : Busy (Tx operation ongoing)
  142. * - RxState contains information related to Rx operations.
  143. * RxState value coding follow below described bitmap :
  144. * b7-b6 (not used)
  145. * xx : Should be set to 00
  146. * b5 IP initilisation status
  147. * 0 : Reset (IP not initialized)
  148. * 1 : Init done (IP not initialized)
  149. * b4-b2 (not used)
  150. * xxx : Should be set to 000
  151. * b1 Rx state
  152. * 0 : Ready (no Rx operation ongoing)
  153. * 1 : Busy (Rx operation ongoing)
  154. * b0 (not used)
  155. * x : Should be set to 0.
  156. */
  157. typedef enum
  158. {
  159. HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized
  160. Value is allowed for gState and RxState */
  161. HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
  162. Value is allowed for gState and RxState */
  163. HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
  164. Value is allowed for gState only */
  165. HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
  166. Value is allowed for gState only */
  167. HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
  168. Value is allowed for RxState only */
  169. HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
  170. Not to be used for neither gState nor RxState.
  171. Value is result of combination (Or) between gState and RxState values */
  172. HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
  173. Value is allowed for gState only */
  174. HAL_UART_STATE_ERROR = 0xE0U /*!< Error
  175. Value is allowed for gState only */
  176. }HAL_UART_StateTypeDef;
  177. /**
  178. * @brief UART clock sources definition
  179. */
  180. typedef enum
  181. {
  182. UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */
  183. UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */
  184. UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */
  185. UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */
  186. UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */
  187. }UART_ClockSourceTypeDef;
  188. /**
  189. * @brief UART handle Structure definition
  190. */
  191. typedef struct
  192. {
  193. USART_TypeDef *Instance; /*!< UART registers base address */
  194. UART_InitTypeDef Init; /*!< UART communication parameters */
  195. UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */
  196. uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
  197. uint16_t TxXferSize; /*!< UART Tx Transfer size */
  198. __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
  199. uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
  200. uint16_t RxXferSize; /*!< UART Rx Transfer size */
  201. __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
  202. uint16_t Mask; /*!< UART Rx RDR register mask */
  203. DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
  204. DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
  205. HAL_LockTypeDef Lock; /*!< Locking object */
  206. __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
  207. and also related to Tx operations.
  208. This parameter can be a value of @ref HAL_UART_StateTypeDef */
  209. __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
  210. This parameter can be a value of @ref HAL_UART_StateTypeDef */
  211. __IO uint32_t ErrorCode; /*!< UART Error code */
  212. }UART_HandleTypeDef;
  213. /**
  214. * @}
  215. */
  216. /* Exported constants --------------------------------------------------------*/
  217. /** @defgroup UART_Exported_Constants UART Exported Constants
  218. * @{
  219. */
  220. /** @defgroup UART_Error UART Error
  221. * @{
  222. */
  223. #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */
  224. #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */
  225. #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */
  226. #define HAL_UART_ERROR_FE (0x00000004U) /*!< frame error */
  227. #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */
  228. #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
  229. #define HAL_UART_ERROR_BUSY (0x00000020U) /*!< Busy Error */
  230. /**
  231. * @}
  232. */
  233. /** @defgroup UART_Stop_Bits UART Number of Stop Bits
  234. * @{
  235. */
  236. #ifdef USART_SMARTCARD_SUPPORT
  237. #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */
  238. #define UART_STOPBITS_1 (0x00000000U) /*!< UART frame with 1 stop bit */
  239. #define UART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1)) /*!< UART frame with 1.5 stop bits */
  240. #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) /*!< UART frame with 2 stop bits */
  241. #else
  242. #define UART_STOPBITS_1 (0x00000000U) /*!< UART frame with 1 stop bit */
  243. #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) /*!< UART frame with 2 stop bits */
  244. #endif
  245. /**
  246. * @}
  247. */
  248. /** @defgroup UART_Parity UART Parity
  249. * @{
  250. */
  251. #define UART_PARITY_NONE (0x00000000U) /*!< No parity */
  252. #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) /*!< Even parity */
  253. #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) /*!< Odd parity */
  254. /**
  255. * @}
  256. */
  257. /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
  258. * @{
  259. */
  260. #define UART_HWCONTROL_NONE (0x00000000U) /*!< No hardware control */
  261. #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) /*!< Request To Send */
  262. #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) /*!< Clear To Send */
  263. #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) /*!< Request and Clear To Send */
  264. /**
  265. * @}
  266. */
  267. /** @defgroup UART_Mode UART Transfer Mode
  268. * @{
  269. */
  270. #define UART_MODE_RX ((uint32_t)USART_CR1_RE) /*!< RX mode */
  271. #define UART_MODE_TX ((uint32_t)USART_CR1_TE) /*!< TX mode */
  272. #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) /*!< RX and TX mode */
  273. /**
  274. * @}
  275. */
  276. /** @defgroup UART_State UART State
  277. * @{
  278. */
  279. #define UART_STATE_DISABLE (0x00000000U) /*!< UART disabled */
  280. #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) /*!< UART enabled */
  281. /**
  282. * @}
  283. */
  284. /** @defgroup UART_Over_Sampling UART Over Sampling
  285. * @{
  286. */
  287. #define UART_OVERSAMPLING_16 (0x00000000U) /*!< Oversampling by 16 */
  288. #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) /*!< Oversampling by 8 */
  289. /**
  290. * @}
  291. */
  292. /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
  293. * @{
  294. */
  295. #define UART_ONE_BIT_SAMPLE_DISABLE (0x00000000U) /*!< One-bit sampling disable */
  296. #define UART_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT) /*!< One-bit sampling enable */
  297. /**
  298. * @}
  299. */
  300. /** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut
  301. * @{
  302. */
  303. #define UART_RECEIVER_TIMEOUT_DISABLE (0x00000000U) /*!< UART receiver timeout disable */
  304. #define UART_RECEIVER_TIMEOUT_ENABLE ((uint32_t)USART_CR2_RTOEN) /*!< UART receiver timeout enable */
  305. /**
  306. * @}
  307. */
  308. /** @defgroup UART_DMA_Tx UART DMA Tx
  309. * @{
  310. */
  311. #define UART_DMA_TX_DISABLE (0x00000000U) /*!< UART DMA TX disabled */
  312. #define UART_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT) /*!< UART DMA TX enabled */
  313. /**
  314. * @}
  315. */
  316. /** @defgroup UART_DMA_Rx UART DMA Rx
  317. * @{
  318. */
  319. #define UART_DMA_RX_DISABLE (0x00000000U) /*!< UART DMA RX disabled */
  320. #define UART_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR) /*!< UART DMA RX enabled */
  321. /**
  322. * @}
  323. */
  324. /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection
  325. * @{
  326. */
  327. #define UART_HALF_DUPLEX_DISABLE (0x00000000U) /*!< UART half-duplex disabled */
  328. #define UART_HALF_DUPLEX_ENABLE ((uint32_t)USART_CR3_HDSEL) /*!< UART half-duplex enabled */
  329. /**
  330. * @}
  331. */
  332. /** @defgroup UART_WakeUp_Address_Length UART WakeUp Address Length
  333. * @{
  334. */
  335. #define UART_ADDRESS_DETECT_4B (0x00000000U) /*!< 4-bit long wake-up address */
  336. #define UART_ADDRESS_DETECT_7B ((uint32_t)USART_CR2_ADDM7) /*!< 7-bit long wake-up address */
  337. /**
  338. * @}
  339. */
  340. /** @defgroup UART_WakeUp_Methods UART WakeUp Methods
  341. * @{
  342. */
  343. #define UART_WAKEUPMETHOD_IDLELINE (0x00000000U) /*!< UART wake-up on idle line */
  344. #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) /*!< UART wake-up on address mark */
  345. /**
  346. * @}
  347. */
  348. /** @defgroup UART_IT UART IT
  349. * Elements values convention: 000000000XXYYYYYb
  350. * - YYYYY : Interrupt source position in the XX register (5bits)
  351. * - XX : Interrupt source register (2bits)
  352. * - 01: CR1 register
  353. * - 10: CR2 register
  354. * - 11: CR3 register
  355. * @{
  356. */
  357. #define UART_IT_ERR (0x0060U) /*!< UART error interruption */
  358. /** Elements values convention: 0000ZZZZ00000000b
  359. * - ZZZZ : Flag position in the ISR register(4bits)
  360. */
  361. #define UART_IT_ORE (0x0300U) /*!< UART overrun error interruption */
  362. #define UART_IT_NE (0x0200U) /*!< UART noise error interruption */
  363. #define UART_IT_FE (0x0100U) /*!< UART frame error interruption */
  364. /**
  365. * @}
  366. */
  367. /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type
  368. * @{
  369. */
  370. #define UART_ADVFEATURE_NO_INIT (0x00000000U) /*!< No advanced feature initialization */
  371. #define UART_ADVFEATURE_TXINVERT_INIT (0x00000001U) /*!< TX pin active level inversion */
  372. #define UART_ADVFEATURE_RXINVERT_INIT (0x00000002U) /*!< RX pin active level inversion */
  373. #define UART_ADVFEATURE_DATAINVERT_INIT (0x00000004U) /*!< Binary data inversion */
  374. #define UART_ADVFEATURE_SWAP_INIT (0x00000008U) /*!< TX/RX pins swap */
  375. #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT (0x00000010U) /*!< RX overrun disable */
  376. #define UART_ADVFEATURE_DMADISABLEONERROR_INIT (0x00000020U) /*!< DMA disable on Reception Error */
  377. #define UART_ADVFEATURE_AUTOBAUDRATE_INIT (0x00000040U) /*!< Auto Baud rate detection initialization */
  378. #define UART_ADVFEATURE_MSBFIRST_INIT (0x00000080U) /*!< Most significant bit sent/received first */
  379. /**
  380. * @}
  381. */
  382. /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
  383. * @{
  384. */
  385. #define UART_ADVFEATURE_TXINV_DISABLE (0x00000000U) /*!< TX pin active level inversion disable */
  386. #define UART_ADVFEATURE_TXINV_ENABLE ((uint32_t)USART_CR2_TXINV) /*!< TX pin active level inversion enable */
  387. /**
  388. * @}
  389. */
  390. /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
  391. * @{
  392. */
  393. #define UART_ADVFEATURE_RXINV_DISABLE (0x00000000U) /*!< RX pin active level inversion disable */
  394. #define UART_ADVFEATURE_RXINV_ENABLE ((uint32_t)USART_CR2_RXINV) /*!< RX pin active level inversion enable */
  395. /**
  396. * @}
  397. */
  398. /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion
  399. * @{
  400. */
  401. #define UART_ADVFEATURE_DATAINV_DISABLE (0x00000000U) /*!< Binary data inversion disable */
  402. #define UART_ADVFEATURE_DATAINV_ENABLE ((uint32_t)USART_CR2_DATAINV) /*!< Binary data inversion enable */
  403. /**
  404. * @}
  405. */
  406. /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
  407. * @{
  408. */
  409. #define UART_ADVFEATURE_SWAP_DISABLE (0x00000000U) /*!< TX/RX pins swap disable */
  410. #define UART_ADVFEATURE_SWAP_ENABLE ((uint32_t)USART_CR2_SWAP) /*!< TX/RX pins swap enable */
  411. /**
  412. * @}
  413. */
  414. /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable
  415. * @{
  416. */
  417. #define UART_ADVFEATURE_OVERRUN_ENABLE (0x00000000U) /*!< RX overrun enable */
  418. #define UART_ADVFEATURE_OVERRUN_DISABLE ((uint32_t)USART_CR3_OVRDIS) /*!< RX overrun disable */
  419. /**
  420. * @}
  421. */
  422. /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable
  423. * @{
  424. */
  425. #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE (0x00000000U) /*!< RX Auto Baud rate detection enable */
  426. #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE ((uint32_t)USART_CR2_ABREN) /*!< RX Auto Baud rate detection disable */
  427. /**
  428. * @}
  429. */
  430. /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error
  431. * @{
  432. */
  433. #define UART_ADVFEATURE_DMA_ENABLEONRXERROR (0x00000000U) /*!< DMA enable on Reception Error */
  434. #define UART_ADVFEATURE_DMA_DISABLEONRXERROR ((uint32_t)USART_CR3_DDRE) /*!< DMA disable on Reception Error */
  435. /**
  436. * @}
  437. */
  438. /** @defgroup UART_MSB_First UART Advanced Feature MSB First
  439. * @{
  440. */
  441. #define UART_ADVFEATURE_MSBFIRST_DISABLE (0x00000000U) /*!< Most significant bit sent/received first disable */
  442. #define UART_ADVFEATURE_MSBFIRST_ENABLE ((uint32_t)USART_CR2_MSBFIRST) /*!< Most significant bit sent/received first enable */
  443. /**
  444. * @}
  445. */
  446. /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable
  447. * @{
  448. */
  449. #define UART_ADVFEATURE_MUTEMODE_DISABLE (0x00000000U) /*!< UART mute mode disable */
  450. #define UART_ADVFEATURE_MUTEMODE_ENABLE ((uint32_t)USART_CR1_MME) /*!< UART mute mode enable */
  451. /**
  452. * @}
  453. */
  454. /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register
  455. * @{
  456. */
  457. #define UART_CR2_ADDRESS_LSB_POS ( 24U) /*!< UART address-matching LSB position in CR2 register */
  458. /**
  459. * @}
  460. */
  461. /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity
  462. * @{
  463. */
  464. #define UART_DE_POLARITY_HIGH (0x00000000U) /*!< Driver enable signal is active high */
  465. #define UART_DE_POLARITY_LOW ((uint32_t)USART_CR3_DEP) /*!< Driver enable signal is active low */
  466. /**
  467. * @}
  468. */
  469. /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register
  470. * @{
  471. */
  472. #define UART_CR1_DEAT_ADDRESS_LSB_POS ( 21U) /*!< UART Driver Enable assertion time LSB position in CR1 register */
  473. /**
  474. * @}
  475. */
  476. /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register
  477. * @{
  478. */
  479. #define UART_CR1_DEDT_ADDRESS_LSB_POS ( 16U) /*!< UART Driver Enable de-assertion time LSB position in CR1 register */
  480. /**
  481. * @}
  482. */
  483. /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask
  484. * @{
  485. */
  486. #define UART_IT_MASK (0x001FU) /*!< UART interruptions flags mask */
  487. /**
  488. * @}
  489. */
  490. /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value
  491. * @{
  492. */
  493. #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */
  494. /**
  495. * @}
  496. */
  497. /**
  498. * @}
  499. */
  500. /* Exported macros -----------------------------------------------------------*/
  501. /** @defgroup UART_Exported_Macros UART Exported Macros
  502. * @{
  503. */
  504. /** @brief Reset UART handle states.
  505. * @param __HANDLE__: UART handle.
  506. * @retval None
  507. */
  508. #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
  509. (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
  510. (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
  511. } while(0)
  512. /** @brief Clear the specified UART pending flag.
  513. * @param __HANDLE__: specifies the UART Handle.
  514. * @param __FLAG__: specifies the flag to check.
  515. * This parameter can be any combination of the following values:
  516. * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
  517. * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
  518. * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
  519. * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
  520. * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
  521. * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
  522. @if STM32F030x6
  523. @elseif STM32F030x8
  524. @elseif STM32F030xC
  525. @elseif STM32F070x6
  526. @elseif STM32F070xB
  527. @else
  528. * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag (not available on all devices)
  529. @endif
  530. * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
  531. * @arg @ref UART_CLEAR_RTOF Receiver Time Out Clear Flag
  532. @if STM32F030x6
  533. @elseif STM32F030x8
  534. @elseif STM32F030xC
  535. @elseif STM32F070x6
  536. @elseif STM32F070xB
  537. @else
  538. * @arg @ref UART_CLEAR_EOBF End Of Block Clear Flag (not available on all devices)
  539. @endif
  540. * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
  541. @if STM32F030x6
  542. @elseif STM32F030x8
  543. @elseif STM32F030xC
  544. @elseif STM32F070x6
  545. @elseif STM32F070xB
  546. @else
  547. * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag (not available on all devices)
  548. @endif
  549. * @retval None
  550. */
  551. #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
  552. /** @brief Clear the UART PE pending flag.
  553. * @param __HANDLE__: specifies the UART Handle.
  554. * @retval None
  555. */
  556. #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF)
  557. /** @brief Clear the UART FE pending flag.
  558. * @param __HANDLE__: specifies the UART Handle.
  559. * @retval None
  560. */
  561. #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF)
  562. /** @brief Clear the UART NE pending flag.
  563. * @param __HANDLE__: specifies the UART Handle.
  564. * @retval None
  565. */
  566. #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF)
  567. /** @brief Clear the UART ORE pending flag.
  568. * @param __HANDLE__: specifies the UART Handle.
  569. * @retval None
  570. */
  571. #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF)
  572. /** @brief Clear the UART IDLE pending flag.
  573. * @param __HANDLE__: specifies the UART Handle.
  574. * @retval None
  575. */
  576. #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF)
  577. /** @brief Check whether the specified UART flag is set or not.
  578. * @param __HANDLE__: specifies the UART Handle.
  579. * @param __FLAG__: specifies the flag to check.
  580. * This parameter can be one of the following values:
  581. @if STM32F030x6
  582. @elseif STM32F030x8
  583. @elseif STM32F030xC
  584. @elseif STM32F070x6
  585. @elseif STM32F070xB
  586. @else
  587. * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag
  588. @endif
  589. * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag
  590. @if STM32F030x6
  591. @elseif STM32F030x8
  592. @elseif STM32F030xC
  593. @elseif STM32F070x6
  594. @elseif STM32F070xB
  595. @else
  596. * @arg @ref UART_FLAG_WUF Wake up from stop mode flag (not available on F030xx devices)
  597. @endif
  598. * @arg @ref UART_FLAG_RWU Receiver wake up flag (not available on F030xx devices)
  599. * @arg @ref UART_FLAG_SBKF Send Break flag
  600. * @arg @ref UART_FLAG_CMF Character match flag
  601. * @arg @ref UART_FLAG_BUSY Busy flag
  602. * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag
  603. * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag
  604. @if STM32F030x6
  605. @elseif STM32F030x8
  606. @elseif STM32F030xC
  607. @elseif STM32F070x6
  608. @elseif STM32F070xB
  609. @else
  610. * @arg @ref UART_FLAG_EOBF End of block flag (not available on F030xx devices)
  611. @endif
  612. * @arg @ref UART_FLAG_RTOF Receiver timeout flag
  613. * @arg @ref UART_FLAG_CTS CTS Change flag
  614. @if STM32F030x6
  615. @elseif STM32F030x8
  616. @elseif STM32F030xC
  617. @elseif STM32F070x6
  618. @elseif STM32F070xB
  619. @else
  620. * @arg @ref UART_FLAG_LBDF LIN Break detection flag (not available on F030xx devices)
  621. @endif
  622. * @arg @ref UART_FLAG_TXE Transmit data register empty flag
  623. * @arg @ref UART_FLAG_TC Transmission Complete flag
  624. * @arg @ref UART_FLAG_RXNE Receive data register not empty flag
  625. * @arg @ref UART_FLAG_IDLE Idle Line detection flag
  626. * @arg @ref UART_FLAG_ORE Overrun Error flag
  627. * @arg @ref UART_FLAG_NE Noise Error flag
  628. * @arg @ref UART_FLAG_FE Framing Error flag
  629. * @arg @ref UART_FLAG_PE Parity Error flag
  630. * @retval The new state of __FLAG__ (TRUE or FALSE).
  631. */
  632. #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
  633. /** @brief Enable the specified UART interrupt.
  634. * @param __HANDLE__: specifies the UART Handle.
  635. * @param __INTERRUPT__: specifies the UART interrupt source to enable.
  636. * This parameter can be one of the following values:
  637. @if STM32F030x6
  638. @elseif STM32F030x8
  639. @elseif STM32F030xC
  640. @elseif STM32F070x6
  641. @elseif STM32F070xB
  642. @else
  643. * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt (not available on F030xx devices)
  644. @endif
  645. * @arg @ref UART_IT_CM Character match interrupt
  646. * @arg @ref UART_IT_CTS CTS change interrupt
  647. @if STM32F030x6
  648. @elseif STM32F030x8
  649. @elseif STM32F030xC
  650. @elseif STM32F070x6
  651. @elseif STM32F070xB
  652. @else
  653. * @arg @ref UART_IT_LBD LIN Break detection interrupt (not available on F030xx devices)
  654. @endif
  655. * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
  656. * @arg @ref UART_IT_TC Transmission complete interrupt
  657. * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
  658. * @arg @ref UART_IT_IDLE Idle line detection interrupt
  659. * @arg @ref UART_IT_PE Parity Error interrupt
  660. * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
  661. * @retval None
  662. */
  663. #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
  664. ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
  665. ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))))
  666. /** @brief Disable the specified UART interrupt.
  667. * @param __HANDLE__: specifies the UART Handle.
  668. * @param __INTERRUPT__: specifies the UART interrupt source to disable.
  669. * This parameter can be one of the following values:
  670. @if STM32F030x6
  671. @elseif STM32F030x8
  672. @elseif STM32F030xC
  673. @elseif STM32F070x6
  674. @elseif STM32F070xB
  675. @else
  676. * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt (not available on F030xx devices)
  677. @endif
  678. * @arg @ref UART_IT_CM Character match interrupt
  679. * @arg @ref UART_IT_CTS CTS change interrupt
  680. @if STM32F030x6
  681. @elseif STM32F030x8
  682. @elseif STM32F030xC
  683. @elseif STM32F070x6
  684. @elseif STM32F070xB
  685. @else
  686. * @arg @ref UART_IT_LBD LIN Break detection interrupt (not available on F030xx devices)
  687. @endif
  688. * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
  689. * @arg @ref UART_IT_TC Transmission complete interrupt
  690. * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
  691. * @arg @ref UART_IT_IDLE Idle line detection interrupt
  692. * @arg @ref UART_IT_PE Parity Error interrupt
  693. * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
  694. * @retval None
  695. */
  696. #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
  697. ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
  698. ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))))
  699. /** @brief Check whether the specified UART interrupt has occurred or not.
  700. * @param __HANDLE__: specifies the UART Handle.
  701. * @param __IT__: specifies the UART interrupt to check.
  702. * This parameter can be one of the following values:
  703. @if STM32F030x6
  704. @elseif STM32F030x8
  705. @elseif STM32F030xC
  706. @elseif STM32F070x6
  707. @elseif STM32F070xB
  708. @else
  709. * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt (not available on F030xx devices)
  710. @endif
  711. * @arg @ref UART_IT_CM Character match interrupt
  712. * @arg @ref UART_IT_CTS CTS change interrupt
  713. @if STM32F030x6
  714. @elseif STM32F030x8
  715. @elseif STM32F030xC
  716. @elseif STM32F070x6
  717. @elseif STM32F070xB
  718. @else
  719. * @arg @ref UART_IT_LBD LIN Break detection interrupt (not available on F030xx devices)
  720. @endif
  721. * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
  722. * @arg @ref UART_IT_TC Transmission complete interrupt
  723. * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
  724. * @arg @ref UART_IT_IDLE Idle line detection interrupt
  725. * @arg @ref UART_IT_ORE Overrun Error interrupt
  726. * @arg @ref UART_IT_NE Noise Error interrupt
  727. * @arg @ref UART_IT_FE Framing Error interrupt
  728. * @arg @ref UART_IT_PE Parity Error interrupt
  729. * @retval The new state of __IT__ (TRUE or FALSE).
  730. */
  731. #define __HAL_UART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & (1U << ((__IT__)>> 0x08U)))
  732. /** @brief Check whether the specified UART interrupt source is enabled or not.
  733. * @param __HANDLE__: specifies the UART Handle.
  734. * @param __IT__: specifies the UART interrupt source to check.
  735. * This parameter can be one of the following values:
  736. @if STM32F030x6
  737. @elseif STM32F030x8
  738. @elseif STM32F030xC
  739. @elseif STM32F070x6
  740. @elseif STM32F070xB
  741. @else
  742. * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt (not available on F030xx devices)
  743. @endif
  744. * @arg @ref UART_IT_CM Character match interrupt
  745. * @arg @ref UART_IT_CTS CTS change interrupt
  746. @if STM32F030x6
  747. @elseif STM32F030x8
  748. @elseif STM32F030xC
  749. @elseif STM32F070x6
  750. @elseif STM32F070xB
  751. @else
  752. * @arg @ref UART_IT_LBD LIN Break detection interrupt (not available on F030xx devices)
  753. @endif
  754. * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
  755. * @arg @ref UART_IT_TC Transmission complete interrupt
  756. * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
  757. * @arg @ref UART_IT_IDLE Idle line detection interrupt
  758. * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
  759. * @arg @ref UART_IT_PE Parity Error interrupt
  760. * @retval The new state of __IT__ (TRUE or FALSE).
  761. */
  762. #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2U)? \
  763. (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__IT__)) & UART_IT_MASK)))
  764. /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag.
  765. * @param __HANDLE__: specifies the UART Handle.
  766. * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
  767. * to clear the corresponding interrupt
  768. * This parameter can be one of the following values:
  769. * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
  770. * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
  771. * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
  772. * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
  773. * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
  774. * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
  775. @if STM32F030x6
  776. @elseif STM32F030x8
  777. @elseif STM32F030xC
  778. @elseif STM32F070x6
  779. @elseif STM32F070xB
  780. @else
  781. * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag (not available on F030xx devices)
  782. @endif
  783. * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
  784. * @arg @ref UART_CLEAR_RTOF Receiver Time Out Clear Flag
  785. @if STM32F030x6
  786. @elseif STM32F030x8
  787. @elseif STM32F030xC
  788. @elseif STM32F070x6
  789. @elseif STM32F070xB
  790. @else
  791. * @arg @ref UART_CLEAR_EOBF End Of Block Clear Flag
  792. @endif
  793. * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
  794. @if STM32F030x6
  795. @elseif STM32F030x8
  796. @elseif STM32F030xC
  797. @elseif STM32F070x6
  798. @elseif STM32F070xB
  799. @else
  800. * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag (not available on F030xx devices)
  801. @endif
  802. * @retval None
  803. */
  804. #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
  805. /** @brief Set a specific UART request flag.
  806. * @param __HANDLE__: specifies the UART Handle.
  807. * @param __REQ__: specifies the request flag to set
  808. * This parameter can be one of the following values:
  809. * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request
  810. * @arg @ref UART_SENDBREAK_REQUEST Send Break Request
  811. * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request
  812. * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request
  813. @if STM32F030x6
  814. @elseif STM32F030x8
  815. @elseif STM32F030xC
  816. @elseif STM32F070x6
  817. @elseif STM32F070xB
  818. @else
  819. * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request (not available on F030xx devices)
  820. @endif
  821. * @retval None
  822. */
  823. #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint32_t)(__REQ__))
  824. /** @brief Enable the UART one bit sample method.
  825. * @param __HANDLE__: specifies the UART Handle.
  826. * @retval None
  827. */
  828. #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
  829. /** @brief Disable the UART one bit sample method.
  830. * @param __HANDLE__: specifies the UART Handle.
  831. * @retval None
  832. */
  833. #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
  834. /** @brief Enable UART.
  835. * @param __HANDLE__: specifies the UART Handle.
  836. * @retval None
  837. */
  838. #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
  839. /** @brief Disable UART.
  840. * @param __HANDLE__: specifies the UART Handle.
  841. * @retval None
  842. */
  843. #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
  844. /** @brief Enable CTS flow control.
  845. * @note This macro allows to enable CTS hardware flow control for a given UART instance,
  846. * without need to call HAL_UART_Init() function.
  847. * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
  848. * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
  849. * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
  850. * - UART instance should have already been initialised (through call of HAL_UART_Init() )
  851. * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
  852. * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
  853. * @param __HANDLE__: specifies the UART Handle.
  854. * @retval None
  855. */
  856. #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
  857. do{ \
  858. SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
  859. (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
  860. } while(0)
  861. /** @brief Disable CTS flow control.
  862. * @note This macro allows to disable CTS hardware flow control for a given UART instance,
  863. * without need to call HAL_UART_Init() function.
  864. * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
  865. * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
  866. * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
  867. * - UART instance should have already been initialised (through call of HAL_UART_Init() )
  868. * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
  869. * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
  870. * @param __HANDLE__: specifies the UART Handle.
  871. * @retval None
  872. */
  873. #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
  874. do{ \
  875. CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
  876. (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
  877. } while(0)
  878. /** @brief Enable RTS flow control.
  879. * @note This macro allows to enable RTS hardware flow control for a given UART instance,
  880. * without need to call HAL_UART_Init() function.
  881. * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
  882. * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
  883. * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
  884. * - UART instance should have already been initialised (through call of HAL_UART_Init() )
  885. * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
  886. * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
  887. * @param __HANDLE__: specifies the UART Handle.
  888. * @retval None
  889. */
  890. #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
  891. do{ \
  892. SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
  893. (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
  894. } while(0)
  895. /** @brief Disable RTS flow control.
  896. * @note This macro allows to disable RTS hardware flow control for a given UART instance,
  897. * without need to call HAL_UART_Init() function.
  898. * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
  899. * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
  900. * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
  901. * - UART instance should have already been initialised (through call of HAL_UART_Init() )
  902. * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
  903. * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
  904. * @param __HANDLE__: specifies the UART Handle.
  905. * @retval None
  906. */
  907. #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
  908. do{ \
  909. CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
  910. (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
  911. } while(0)
  912. /**
  913. * @}
  914. */
  915. /* Private macros --------------------------------------------------------*/
  916. /** @defgroup UART_Private_Macros UART Private Macros
  917. * @{
  918. */
  919. /** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
  920. * @param __PCLK__: UART clock.
  921. * @param __BAUD__: Baud rate set by the user.
  922. * @retval Division result
  923. */
  924. #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__))
  925. /** @brief BRR division operation to set BRR register in 16-bit oversampling mode.
  926. * @param __PCLK__: UART clock.
  927. * @param __BAUD__: Baud rate set by the user.
  928. * @retval Division result
  929. */
  930. #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__))
  931. /** @brief Check UART Baud rate.
  932. * @param __BAUDRATE__: Baudrate specified by the user.
  933. * The maximum Baud Rate is derived from the maximum clock on F0 (i.e. 48 MHz)
  934. * divided by the smallest oversampling used on the USART (i.e. 8)
  935. * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid)
  936. */
  937. #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 6000001U)
  938. /** @brief Check UART assertion time.
  939. * @param __TIME__: 5-bit value assertion time.
  940. * @retval Test result (TRUE or FALSE).
  941. */
  942. #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1F)
  943. /** @brief Check UART deassertion time.
  944. * @param __TIME__: 5-bit value deassertion time.
  945. * @retval Test result (TRUE or FALSE).
  946. */
  947. #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1F)
  948. /**
  949. * @brief Ensure that UART frame number of stop bits is valid.
  950. * @param __STOPBITS__: UART frame number of stop bits.
  951. * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
  952. */
  953. #ifdef USART_SMARTCARD_SUPPORT
  954. #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \
  955. ((__STOPBITS__) == UART_STOPBITS_1) || \
  956. ((__STOPBITS__) == UART_STOPBITS_1_5) || \
  957. ((__STOPBITS__) == UART_STOPBITS_2))
  958. #else
  959. #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \
  960. ((__STOPBITS__) == UART_STOPBITS_2))
  961. #endif
  962. /**
  963. * @brief Ensure that UART frame parity is valid.
  964. * @param __PARITY__: UART frame parity.
  965. * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
  966. */
  967. #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \
  968. ((__PARITY__) == UART_PARITY_EVEN) || \
  969. ((__PARITY__) == UART_PARITY_ODD))
  970. /**
  971. * @brief Ensure that UART hardware flow control is valid.
  972. * @param __CONTROL__: UART hardware flow control.
  973. * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid)
  974. */
  975. #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\
  976. (((__CONTROL__) == UART_HWCONTROL_NONE) || \
  977. ((__CONTROL__) == UART_HWCONTROL_RTS) || \
  978. ((__CONTROL__) == UART_HWCONTROL_CTS) || \
  979. ((__CONTROL__) == UART_HWCONTROL_RTS_CTS))
  980. /**
  981. * @brief Ensure that UART communication mode is valid.
  982. * @param __MODE__: UART communication mode.
  983. * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
  984. */
  985. #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U))
  986. /**
  987. * @brief Ensure that UART state is valid.
  988. * @param __STATE__: UART state.
  989. * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
  990. */
  991. #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \
  992. ((__STATE__) == UART_STATE_ENABLE))
  993. /**
  994. * @brief Ensure that UART oversampling is valid.
  995. * @param __SAMPLING__: UART oversampling.
  996. * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid)
  997. */
  998. #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \
  999. ((__SAMPLING__) == UART_OVERSAMPLING_8))
  1000. /**
  1001. * @brief Ensure that UART frame sampling is valid.
  1002. * @param __ONEBIT__: UART frame sampling.
  1003. * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid)
  1004. */
  1005. #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \
  1006. ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE))
  1007. /**
  1008. * @brief Ensure that Address Length detection parameter is valid.
  1009. * @param __ADDRESS__: UART Adress length value.
  1010. * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid)
  1011. */
  1012. #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \
  1013. ((__ADDRESS__) == UART_ADDRESS_DETECT_7B))
  1014. /**
  1015. * @brief Ensure that UART receiver timeout setting is valid.
  1016. * @param __TIMEOUT__: UART receiver timeout setting.
  1017. * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid)
  1018. */
  1019. #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \
  1020. ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE))
  1021. /**
  1022. * @brief Ensure that UART DMA TX state is valid.
  1023. * @param __DMATX__: UART DMA TX state.
  1024. * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid)
  1025. */
  1026. #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \
  1027. ((__DMATX__) == UART_DMA_TX_ENABLE))
  1028. /**
  1029. * @brief Ensure that UART DMA RX state is valid.
  1030. * @param __DMARX__: UART DMA RX state.
  1031. * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid)
  1032. */
  1033. #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \
  1034. ((__DMARX__) == UART_DMA_RX_ENABLE))
  1035. /**
  1036. * @brief Ensure that UART half-duplex state is valid.
  1037. * @param __HDSEL__: UART half-duplex state.
  1038. * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid)
  1039. */
  1040. #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \
  1041. ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE))
  1042. /**
  1043. * @brief Ensure that UART wake-up method is valid.
  1044. * @param __WAKEUP__: UART wake-up method .
  1045. * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid)
  1046. */
  1047. #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \
  1048. ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK))
  1049. /**
  1050. * @brief Ensure that UART advanced features initialization is valid.
  1051. * @param __INIT__: UART advanced features initialization.
  1052. * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid)
  1053. */
  1054. #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \
  1055. UART_ADVFEATURE_TXINVERT_INIT | \
  1056. UART_ADVFEATURE_RXINVERT_INIT | \
  1057. UART_ADVFEATURE_DATAINVERT_INIT | \
  1058. UART_ADVFEATURE_SWAP_INIT | \
  1059. UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \
  1060. UART_ADVFEATURE_DMADISABLEONERROR_INIT | \
  1061. UART_ADVFEATURE_AUTOBAUDRATE_INIT | \
  1062. UART_ADVFEATURE_MSBFIRST_INIT))
  1063. /**
  1064. * @brief Ensure that UART frame TX inversion setting is valid.
  1065. * @param __TXINV__: UART frame TX inversion setting.
  1066. * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid)
  1067. */
  1068. #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \
  1069. ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE))
  1070. /**
  1071. * @brief Ensure that UART frame RX inversion setting is valid.
  1072. * @param __RXINV__: UART frame RX inversion setting.
  1073. * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid)
  1074. */
  1075. #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \
  1076. ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE))
  1077. /**
  1078. * @brief Ensure that UART frame data inversion setting is valid.
  1079. * @param __DATAINV__: UART frame data inversion setting.
  1080. * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid)
  1081. */
  1082. #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \
  1083. ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE))
  1084. /**
  1085. * @brief Ensure that UART frame RX/TX pins swap setting is valid.
  1086. * @param __SWAP__: UART frame RX/TX pins swap setting.
  1087. * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid)
  1088. */
  1089. #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \
  1090. ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE))
  1091. /**
  1092. * @brief Ensure that UART frame overrun setting is valid.
  1093. * @param __OVERRUN__: UART frame overrun setting.
  1094. * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid)
  1095. */
  1096. #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \
  1097. ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE))
  1098. /**
  1099. * @brief Ensure that UART auto Baud rate state is valid.
  1100. * @param __AUTOBAUDRATE__: UART auto Baud rate state.
  1101. * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid)
  1102. */
  1103. #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \
  1104. ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
  1105. /**
  1106. * @brief Ensure that UART DMA enabling or disabling on error setting is valid.
  1107. * @param __DMA__: UART DMA enabling or disabling on error setting.
  1108. * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid)
  1109. */
  1110. #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \
  1111. ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
  1112. /**
  1113. * @brief Ensure that UART frame MSB first setting is valid.
  1114. * @param __MSBFIRST__: UART frame MSB first setting.
  1115. * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid)
  1116. */
  1117. #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \
  1118. ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE))
  1119. /**
  1120. * @brief Ensure that UART mute mode state is valid.
  1121. * @param __MUTE__: UART mute mode state.
  1122. * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid)
  1123. */
  1124. #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \
  1125. ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE))
  1126. /**
  1127. * @brief Ensure that UART driver enable polarity is valid.
  1128. * @param __POLARITY__: UART driver enable polarity.
  1129. * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid)
  1130. */
  1131. #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \
  1132. ((__POLARITY__) == UART_DE_POLARITY_LOW))
  1133. /**
  1134. * @}
  1135. */
  1136. /* Include UART HAL Extended module */
  1137. #include "stm32f0xx_hal_uart_ex.h"
  1138. /* Exported functions --------------------------------------------------------*/
  1139. /** @addtogroup UART_Exported_Functions UART Exported Functions
  1140. * @{
  1141. */
  1142. /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
  1143. * @{
  1144. */
  1145. /* Initialization and de-initialization functions ****************************/
  1146. HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
  1147. HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
  1148. HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
  1149. HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
  1150. void HAL_UART_MspInit(UART_HandleTypeDef *huart);
  1151. void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
  1152. /**
  1153. * @}
  1154. */
  1155. /** @addtogroup UART_Exported_Functions_Group2 IO operation functions
  1156. * @{
  1157. */
  1158. /* IO operation functions *****************************************************/
  1159. HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
  1160. HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
  1161. HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
  1162. HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
  1163. HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
  1164. HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
  1165. HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
  1166. HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
  1167. HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
  1168. /* Transfer Abort functions */
  1169. HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
  1170. HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
  1171. HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
  1172. HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
  1173. HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
  1174. HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
  1175. void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
  1176. void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
  1177. void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
  1178. void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
  1179. void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
  1180. void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
  1181. void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart);
  1182. void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart);
  1183. void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart);
  1184. /**
  1185. * @}
  1186. */
  1187. /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
  1188. * @{
  1189. */
  1190. /* Peripheral Control functions ************************************************/
  1191. HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
  1192. HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
  1193. void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
  1194. HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
  1195. HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
  1196. /**
  1197. * @}
  1198. */
  1199. /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
  1200. * @{
  1201. */
  1202. /* Peripheral State and Errors functions **************************************************/
  1203. HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
  1204. uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
  1205. /**
  1206. * @}
  1207. */
  1208. /**
  1209. * @}
  1210. */
  1211. /* Private functions -----------------------------------------------------------*/
  1212. /** @addtogroup UART_Private_Functions UART Private Functions
  1213. * @{
  1214. */
  1215. void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
  1216. HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
  1217. HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
  1218. HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart);
  1219. HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart);
  1220. HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
  1221. HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
  1222. /**
  1223. * @}
  1224. */
  1225. /**
  1226. * @}
  1227. */
  1228. /**
  1229. * @}
  1230. */
  1231. #ifdef __cplusplus
  1232. }
  1233. #endif
  1234. #endif /* __STM32F0xx_HAL_UART_H */
  1235. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/