ccl.h 2.5 KB

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  1. /**
  2. * \file
  3. *
  4. * \brief Instance description for CCL
  5. *
  6. * Copyright (c) 2018 Microchip Technology Inc.
  7. *
  8. * \license_start
  9. *
  10. * \page License
  11. *
  12. * SPDX-License-Identifier: Apache-2.0
  13. *
  14. * Licensed under the Apache License, Version 2.0 (the "License");
  15. * you may not use this file except in compliance with the License.
  16. * You may obtain a copy of the License at
  17. *
  18. * http://www.apache.org/licenses/LICENSE-2.0
  19. *
  20. * Unless required by applicable law or agreed to in writing, software
  21. * distributed under the License is distributed on an "AS IS" BASIS,
  22. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  23. * See the License for the specific language governing permissions and
  24. * limitations under the License.
  25. *
  26. * \license_stop
  27. *
  28. */
  29. /* file generated from device description version 2018-05-30T11:07:17Z */
  30. #ifndef _SAML11_CCL_INSTANCE_H_
  31. #define _SAML11_CCL_INSTANCE_H_
  32. /* ========== Register definition for CCL peripheral ========== */
  33. #if (defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
  34. #define REG_CCL_CTRL (0x42002C00) /**< (CCL) Control */
  35. #define REG_CCL_SEQCTRL (0x42002C04) /**< (CCL) SEQ Control x */
  36. #define REG_CCL_SEQCTRL0 (0x42002C04) /**< (CCL) SEQ Control x 0 */
  37. #define REG_CCL_LUTCTRL (0x42002C08) /**< (CCL) LUT Control x */
  38. #define REG_CCL_LUTCTRL0 (0x42002C08) /**< (CCL) LUT Control x 0 */
  39. #define REG_CCL_LUTCTRL1 (0x42002C0C) /**< (CCL) LUT Control x 1 */
  40. #else
  41. #define REG_CCL_CTRL (*(__IO uint8_t*)0x42002C00U) /**< (CCL) Control */
  42. #define REG_CCL_SEQCTRL (*(__IO uint8_t*)0x42002C04U) /**< (CCL) SEQ Control x */
  43. #define REG_CCL_SEQCTRL0 (*(__IO uint8_t*)0x42002C04U) /**< (CCL) SEQ Control x 0 */
  44. #define REG_CCL_LUTCTRL (*(__IO uint32_t*)0x42002C08U) /**< (CCL) LUT Control x */
  45. #define REG_CCL_LUTCTRL0 (*(__IO uint32_t*)0x42002C08U) /**< (CCL) LUT Control x 0 */
  46. #define REG_CCL_LUTCTRL1 (*(__IO uint32_t*)0x42002C0CU) /**< (CCL) LUT Control x 1 */
  47. #endif /* (defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
  48. /* ========== Instance Parameter definitions for CCL peripheral ========== */
  49. #define CCL_GCLK_ID 20 /* GCLK index for CCL */
  50. #define CCL_LUT_NUM 2 /* Number of LUT in a CCL */
  51. #define CCL_SEQ_NUM 1 /* Number of SEQ in a CCL */
  52. #define CCL_INSTANCE_ID 75
  53. #endif /* _SAML11_CCL_INSTANCE_ */