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- typedef enum
- {
- BSP_INT_SUCCESS = 0,
- BSP_INT_ERR_NO_REGISTERED_CALLBACK,
- BSP_INT_ERR_INVALID_ARG,
- BSP_INT_ERR_UNSUPPORTED,
- BSP_INT_ERR_GROUP_STILL_ENABLED
- } bsp_int_err_t;
- typedef enum
- {
- BSP_INT_SRC_EXC_SUPERVISOR_INSTR = 0,
- BSP_INT_SRC_EXC_UNDEFINED_INSTR,
- BSP_INT_SRC_EXC_NMI_PIN,
- BSP_INT_SRC_EXC_FPU,
- BSP_INT_SRC_EXC_ACCESS,
- BSP_INT_SRC_OSC_STOP_DETECT,
- BSP_INT_SRC_WDT_ERROR,
- BSP_INT_SRC_IWDT_ERROR,
- BSP_INT_SRC_LVD1,
- BSP_INT_SRC_LVD2,
- BSP_INT_SRC_UNDEFINED_INTERRUPT,
- BSP_INT_SRC_BUS_ERROR,
- BSP_INT_SRC_RAM,
- BSP_INT_SRC_EXRAM,
-
-
- BSP_INT_SRC_BL0_SCI0_TEI0,
- BSP_INT_SRC_BL0_SCI0_ERI0,
- BSP_INT_SRC_BL0_SCI1_TEI1,
- BSP_INT_SRC_BL0_SCI1_ERI1,
- BSP_INT_SRC_BL0_SCI2_TEI2,
- BSP_INT_SRC_BL0_SCI2_ERI2,
- BSP_INT_SRC_BL0_SCI3_TEI3,
- BSP_INT_SRC_BL0_SCI3_ERI3,
- BSP_INT_SRC_BL0_SCI4_TEI4,
- BSP_INT_SRC_BL0_SCI4_ERI4,
- BSP_INT_SRC_BL0_SCI5_TEI5,
- BSP_INT_SRC_BL0_SCI5_ERI5,
- BSP_INT_SRC_BL0_SCI6_TEI6,
- BSP_INT_SRC_BL0_SCI6_ERI6,
- BSP_INT_SRC_BL0_SCI7_TEI7,
- BSP_INT_SRC_BL0_SCI7_ERI7,
- BSP_INT_SRC_BL0_SCI12_TEI12,
- BSP_INT_SRC_BL0_SCI12_ERI12,
- BSP_INT_SRC_BL0_SCI12_SCIX0,
- BSP_INT_SRC_BL0_SCI12_SCIX1,
- BSP_INT_SRC_BL0_SCI12_SCIX2,
- BSP_INT_SRC_BL0_SCI12_SCIX3,
- BSP_INT_SRC_BL0_QSPI_QSPSSLI,
- BSP_INT_SRC_BL0_CAC_FERRI,
- BSP_INT_SRC_BL0_CAC_MENDI,
- BSP_INT_SRC_BL0_CAC_OVFI,
- BSP_INT_SRC_BL0_DOC_DOPCI,
- BSP_INT_SRC_BL0_PDC_PCFEI,
- BSP_INT_SRC_BL0_PDC_PCERI,
-
- BSP_INT_SRC_BL1_SDHI_CDETI,
- BSP_INT_SRC_BL1_SDHI_CACI,
- BSP_INT_SRC_BL1_SDHI_SDACI,
- BSP_INT_SRC_BL1_MMCIF_CDETIO,
- BSP_INT_SRC_BL1_MMCIF_ERRIO,
- BSP_INT_SRC_BL1_MMCIF_ACCIO,
- BSP_INT_SRC_BL1_POE3_OEI1,
- BSP_INT_SRC_BL1_POE3_OEI2,
- BSP_INT_SRC_BL1_POE3_OEI3,
- BSP_INT_SRC_BL1_POE3_OEI4,
- BSP_INT_SRC_BL1_RIIC0_TEI0,
- BSP_INT_SRC_BL1_RIIC0_EEI0,
- BSP_INT_SRC_BL1_RIIC2_TEI2,
- BSP_INT_SRC_BL1_RIIC2_EEI2,
- BSP_INT_SRC_BL1_S12AD0_S12CMPAI,
- BSP_INT_SRC_BL1_S12AD0_S12CMPBI,
- BSP_INT_SRC_BL1_S12AD1_S12CMPAI1,
- BSP_INT_SRC_BL1_S12AD1_S12CMPBI1,
- BSP_INT_SRC_BL1_SCI8_TEI8,
- BSP_INT_SRC_BL1_SCI8_ERI8,
- BSP_INT_SRC_BL1_SCI9_TEI9,
- BSP_INT_SRC_BL1_SCI9_ERI9,
- BSP_INT_SRC_BL1_RIIC1_TEI1,
- BSP_INT_SRC_BL1_RIIC1_EEI1,
-
- BSP_INT_SRC_BL2_SDSI_SDIOI,
-
- BSP_INT_SRC_AL0_SCI10_TEI10,
- BSP_INT_SRC_AL0_SCI10_ERI10,
- BSP_INT_SRC_AL0_SCI11_TEI11,
- BSP_INT_SRC_AL0_SCI11_ERI11,
- BSP_INT_SRC_AL0_RSPI0_SPII0,
- BSP_INT_SRC_AL0_RSPI0_SPEI0,
- BSP_INT_SRC_AL0_RSPI1_SPII1,
- BSP_INT_SRC_AL0_RSPI1_SPEI1,
- BSP_INT_SRC_AL0_RSPI2_SPII2,
- BSP_INT_SRC_AL0_RSPI2_SPEI2,
-
- BSP_INT_SRC_AL1_EDMAC0_EINT0,
- BSP_INT_SRC_AL1_GLCDC_VPOS,
- BSP_INT_SRC_AL1_GLCDC_GR1UF,
- BSP_INT_SRC_AL1_GLCDC_GR2UF,
- BSP_INT_SRC_AL1_DRW2D_DRW_IRQ,
- BSP_INT_SRC_TOTAL_ITEMS
- } bsp_int_src_t;
- typedef enum
- {
- BSP_INT_CMD_CALL_CALLBACK = 0,
- BSP_INT_CMD_INTERRUPT_ENABLE,
- BSP_INT_CMD_INTERRUPT_DISABLE,
- BSP_INT_CMD_GROUP_INTERRUPT_ENABLE,
-
-
-
- BSP_INT_CMD_GROUP_INTERRUPT_DISABLE,
-
-
- } bsp_int_cmd_t;
- typedef union
- {
- uint32_t ipl;
- } bsp_int_ctrl_t;
- typedef void (*bsp_int_cb_t)(void *);
- typedef struct
- {
- bsp_int_src_t vector;
- } bsp_int_cb_args_t;
- bsp_int_err_t R_BSP_InterruptWrite(bsp_int_src_t vector, bsp_int_cb_t callback);
- bsp_int_err_t R_BSP_InterruptRead(bsp_int_src_t vector, bsp_int_cb_t * callback);
- bsp_int_err_t R_BSP_InterruptControl(bsp_int_src_t vector, bsp_int_cmd_t cmd, void * pdata);
- void bsp_interrupt_open(void);
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