fsl_crc.h 7.0 KB

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  1. /*
  2. * The Clear BSD License
  3. * Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
  4. * Copyright 2016-2017 NXP
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without modification,
  8. * are permitted (subject to the limitations in the disclaimer below) provided
  9. * that the following conditions are met:
  10. *
  11. * o Redistributions of source code must retain the above copyright notice, this list
  12. * of conditions and the following disclaimer.
  13. *
  14. * o Redistributions in binary form must reproduce the above copyright notice, this
  15. * list of conditions and the following disclaimer in the documentation and/or
  16. * other materials provided with the distribution.
  17. *
  18. * o Neither the name of the copyright holder nor the names of its
  19. * contributors may be used to endorse or promote products derived from this
  20. * software without specific prior written permission.
  21. *
  22. * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
  23. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  24. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  27. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  30. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. */
  34. #ifndef _FSL_CRC_H_
  35. #define _FSL_CRC_H_
  36. #include "fsl_common.h"
  37. /*!
  38. * @addtogroup crc
  39. * @{
  40. */
  41. /*******************************************************************************
  42. * Definitions
  43. ******************************************************************************/
  44. /*! @name Driver version */
  45. /*@{*/
  46. /*! @brief CRC driver version. Version 2.0.1.
  47. *
  48. * Current version: 2.0.1
  49. *
  50. * Change log:
  51. * - Version 2.0.1
  52. * - move DATA and DATALL macro definition from header file to source file
  53. */
  54. #define FSL_CRC_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
  55. /*@}*/
  56. #ifndef CRC_DRIVER_CUSTOM_DEFAULTS
  57. /*! @brief Default configuration structure filled by CRC_GetDefaultConfig(). Use CRC16-CCIT-FALSE as defeault. */
  58. #define CRC_DRIVER_USE_CRC16_CCIT_FALSE_AS_DEFAULT 1
  59. #endif
  60. /*! @brief CRC bit width */
  61. typedef enum _crc_bits
  62. {
  63. kCrcBits16 = 0U, /*!< Generate 16-bit CRC code */
  64. kCrcBits32 = 1U /*!< Generate 32-bit CRC code */
  65. } crc_bits_t;
  66. /*! @brief CRC result type */
  67. typedef enum _crc_result
  68. {
  69. kCrcFinalChecksum = 0U, /*!< CRC data register read value is the final checksum.
  70. Reflect out and final xor protocol features are applied. */
  71. kCrcIntermediateChecksum = 1U /*!< CRC data register read value is intermediate checksum (raw value).
  72. Reflect out and final xor protocol feature are not applied.
  73. Intermediate checksum can be used as a seed for CRC_Init()
  74. to continue adding data to this checksum. */
  75. } crc_result_t;
  76. /*!
  77. * @brief CRC protocol configuration.
  78. *
  79. * This structure holds the configuration for the CRC protocol.
  80. *
  81. */
  82. typedef struct _crc_config
  83. {
  84. uint32_t polynomial; /*!< CRC Polynomial, MSBit first.
  85. Example polynomial: 0x1021 = 1_0000_0010_0001 = x^12+x^5+1 */
  86. uint32_t seed; /*!< Starting checksum value */
  87. bool reflectIn; /*!< Reflect bits on input. */
  88. bool reflectOut; /*!< Reflect bits on output. */
  89. bool complementChecksum; /*!< True if the result shall be complement of the actual checksum. */
  90. crc_bits_t crcBits; /*!< Selects 16- or 32- bit CRC protocol. */
  91. crc_result_t crcResult; /*!< Selects final or intermediate checksum return from CRC_Get16bitResult() or
  92. CRC_Get32bitResult() */
  93. } crc_config_t;
  94. /*******************************************************************************
  95. * API
  96. ******************************************************************************/
  97. #if defined(__cplusplus)
  98. extern "C" {
  99. #endif
  100. /*!
  101. * @brief Enables and configures the CRC peripheral module.
  102. *
  103. * This function enables the clock gate in the SIM module for the CRC peripheral.
  104. * It also configures the CRC module and starts a checksum computation by writing the seed.
  105. *
  106. * @param base CRC peripheral address.
  107. * @param config CRC module configuration structure.
  108. */
  109. void CRC_Init(CRC_Type *base, const crc_config_t *config);
  110. /*!
  111. * @brief Disables the CRC peripheral module.
  112. *
  113. * This function disables the clock gate in the SIM module for the CRC peripheral.
  114. *
  115. * @param base CRC peripheral address.
  116. */
  117. static inline void CRC_Deinit(CRC_Type *base)
  118. {
  119. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  120. /* gate clock */
  121. CLOCK_DisableClock(kCLOCK_Crc0);
  122. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  123. }
  124. /*!
  125. * @brief Loads default values to the CRC protocol configuration structure.
  126. *
  127. * Loads default values to the CRC protocol configuration structure. The default values are as follows.
  128. * @code
  129. * config->polynomial = 0x1021;
  130. * config->seed = 0xFFFF;
  131. * config->reflectIn = false;
  132. * config->reflectOut = false;
  133. * config->complementChecksum = false;
  134. * config->crcBits = kCrcBits16;
  135. * config->crcResult = kCrcFinalChecksum;
  136. * @endcode
  137. *
  138. * @param config CRC protocol configuration structure.
  139. */
  140. void CRC_GetDefaultConfig(crc_config_t *config);
  141. /*!
  142. * @brief Writes data to the CRC module.
  143. *
  144. * Writes input data buffer bytes to the CRC data register.
  145. * The configured type of transpose is applied.
  146. *
  147. * @param base CRC peripheral address.
  148. * @param data Input data stream, MSByte in data[0].
  149. * @param dataSize Size in bytes of the input data buffer.
  150. */
  151. void CRC_WriteData(CRC_Type *base, const uint8_t *data, size_t dataSize);
  152. /*!
  153. * @brief Reads the 32-bit checksum from the CRC module.
  154. *
  155. * Reads the CRC data register (either an intermediate or the final checksum).
  156. * The configured type of transpose and complement is applied.
  157. *
  158. * @param base CRC peripheral address.
  159. * @return An intermediate or the final 32-bit checksum, after configured transpose and complement operations.
  160. */
  161. uint32_t CRC_Get32bitResult(CRC_Type *base);
  162. /*!
  163. * @brief Reads a 16-bit checksum from the CRC module.
  164. *
  165. * Reads the CRC data register (either an intermediate or the final checksum).
  166. * The configured type of transpose and complement is applied.
  167. *
  168. * @param base CRC peripheral address.
  169. * @return An intermediate or the final 16-bit checksum, after configured transpose and complement operations.
  170. */
  171. uint16_t CRC_Get16bitResult(CRC_Type *base);
  172. #if defined(__cplusplus)
  173. }
  174. #endif
  175. /*!
  176. *@}
  177. */
  178. #endif /* _FSL_CRC_H_ */