speck3264.lst 34 KB

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  1. 1 .cpu cortex-m4
  2. 2 .eabi_attribute 20, 1
  3. 3 .eabi_attribute 21, 1
  4. 4 .eabi_attribute 23, 3
  5. 5 .eabi_attribute 24, 1
  6. 6 .eabi_attribute 25, 1
  7. 7 .eabi_attribute 26, 1
  8. 8 .eabi_attribute 30, 4
  9. 9 .eabi_attribute 34, 1
  10. 10 .eabi_attribute 18, 4
  11. 11 .file "speck3264.c"
  12. 12 .text
  13. 13 .Ltext0:
  14. 14 .cfi_sections .debug_frame
  15. 15 .section .text.FuncER16,"ax",%progbits
  16. 16 .align 1
  17. 17 .global FuncER16
  18. 18 .arch armv7e-m
  19. 19 .syntax unified
  20. 20 .thumb
  21. 21 .thumb_func
  22. 22 .fpu softvfp
  23. 24 FuncER16:
  24. 25 .LVL0:
  25. 26 .LFB3:
  26. 27 .file 1 "speck3264.c"
  27. 1:speck3264.c **** #include <stdio.h>
  28. 2:speck3264.c **** #include <stdint.h>
  29. 3:speck3264.c **** #include "speck.h"
  30. 4:speck3264.c ****
  31. 5:speck3264.c ****
  32. 6:speck3264.c **** // This function is only used for the "x86" Speck compilation and as reference
  33. 7:speck3264.c **** void FuncER16(u16 *x, u16 *y, u16 k)
  34. 8:speck3264.c **** {
  35. 28 .loc 1 8 1 view -0
  36. 29 .cfi_startproc
  37. 30 @ args = 0, pretend = 0, frame = 0
  38. 31 @ frame_needed = 0, uses_anonymous_args = 0
  39. 9:speck3264.c **** u16 tmp_x = *x;
  40. 32 .loc 1 9 5 view .LVU1
  41. 8:speck3264.c **** u16 tmp_x = *x;
  42. 33 .loc 1 8 1 is_stmt 0 view .LVU2
  43. 34 0000 30B5 push {r4, r5, lr}
  44. 35 .LCFI0:
  45. 36 .cfi_def_cfa_offset 12
  46. 37 .cfi_offset 4, -12
  47. 38 .cfi_offset 5, -8
  48. 39 .cfi_offset 14, -4
  49. 40 .loc 1 9 9 view .LVU3
  50. 41 0002 0588 ldrh r5, [r0]
  51. 42 .LVL1:
  52. 10:speck3264.c **** u16 tmp_y = *y;
  53. 43 .loc 1 10 5 is_stmt 1 view .LVU4
  54. 44 .loc 1 10 9 is_stmt 0 view .LVU5
  55. 45 0004 0C88 ldrh r4, [r1]
  56. 46 .LVL2:
  57. 11:speck3264.c ****
  58. 12:speck3264.c **** *x = (((tmp_x)>>(7)) | ((tmp_x)<<(16-(7))));
  59. 47 .loc 1 12 5 is_stmt 1 view .LVU6
  60. 48 .loc 1 12 36 is_stmt 0 view .LVU7
  61. 49 0006 6B02 lsls r3, r5, #9
  62. 50 .loc 1 12 26 view .LVU8
  63. 51 0008 43EAD513 orr r3, r3, r5, lsr #7
  64. 52 000c 9BB2 uxth r3, r3
  65. 53 .loc 1 12 8 view .LVU9
  66. 54 000e 0380 strh r3, [r0] @ movhi
  67. 13:speck3264.c **** *x += *y;
  68. 55 .loc 1 13 5 is_stmt 1 view .LVU10
  69. 14:speck3264.c ****
  70. 15:speck3264.c **** *x = *x ^ k;
  71. 56 .loc 1 15 5 view .LVU11
  72. 13:speck3264.c **** *x += *y;
  73. 57 .loc 1 13 8 is_stmt 0 view .LVU12
  74. 58 0010 0D88 ldrh r5, [r1]
  75. 59 .LVL3:
  76. 13:speck3264.c **** *x += *y;
  77. 60 .loc 1 13 8 view .LVU13
  78. 61 0012 2B44 add r3, r3, r5
  79. 62 .loc 1 15 8 view .LVU14
  80. 63 0014 5A40 eors r2, r2, r3
  81. 64 .LVL4:
  82. 16:speck3264.c ****
  83. 17:speck3264.c **** *y = (((tmp_y)<<(2)) | (tmp_y>>(16-(2))));
  84. 65 .loc 1 17 19 view .LVU15
  85. 66 0016 A300 lsls r3, r4, #2
  86. 67 .loc 1 17 26 view .LVU16
  87. 68 0018 43EA9433 orr r3, r3, r4, lsr #14
  88. 69 001c 9BB2 uxth r3, r3
  89. 15:speck3264.c ****
  90. 70 .loc 1 15 8 view .LVU17
  91. 71 001e 0280 strh r2, [r0] @ movhi
  92. 72 .loc 1 17 5 is_stmt 1 view .LVU18
  93. 73 .loc 1 17 8 is_stmt 0 view .LVU19
  94. 74 0020 0B80 strh r3, [r1] @ movhi
  95. 18:speck3264.c **** *y = *y ^ *x;
  96. 75 .loc 1 18 5 is_stmt 1 view .LVU20
  97. 76 .loc 1 18 8 is_stmt 0 view .LVU21
  98. 77 0022 0288 ldrh r2, [r0]
  99. 78 0024 5340 eors r3, r3, r2
  100. 79 0026 0B80 strh r3, [r1] @ movhi
  101. 19:speck3264.c ****
  102. 20:speck3264.c **** }
  103. 80 .loc 1 20 1 view .LVU22
  104. 81 0028 30BD pop {r4, r5, pc}
  105. 82 .loc 1 20 1 view .LVU23
  106. 83 .cfi_endproc
  107. 84 .LFE3:
  108. 86 .section .text.FuncER16_ASM,"ax",%progbits
  109. 87 .align 1
  110. 88 .global FuncER16_ASM
  111. 89 .syntax unified
  112. 90 .thumb
  113. 91 .thumb_func
  114. 92 .fpu softvfp
  115. 94 FuncER16_ASM:
  116. 95 .LVL5:
  117. 96 .LFB4:
  118. 21:speck3264.c ****
  119. 22:speck3264.c ****
  120. 23:speck3264.c **** #ifdef ARM
  121. 24:speck3264.c **** // This function is used when running on the CW
  122. 25:speck3264.c **** void FuncER16_ASM(u16 *x, u16 *y, u16 k)
  123. 26:speck3264.c **** {
  124. 97 .loc 1 26 1 is_stmt 1 view -0
  125. 98 .cfi_startproc
  126. 99 @ args = 0, pretend = 0, frame = 0
  127. 100 @ frame_needed = 0, uses_anonymous_args = 0
  128. 101 @ link register save eliminated.
  129. 27:speck3264.c ****
  130. 28:speck3264.c **** asm volatile (
  131. 102 .loc 1 28 5 view .LVU25
  132. 103 .syntax unified
  133. 104 @ 28 "speck3264.c" 1
  134. 105 0000 00BF nop
  135. 106 0002 30B5 push {r4, r5, lr}
  136. 107 0004 0588 ldrh r5, [r0, #0]
  137. 108 0006 0C88 ldrh r4, [r1, #0]
  138. 109 0008 6B02 lsls r3, r5, #9
  139. 110 000a 43EAD513 orr.w r3, r3, r5, lsr #7
  140. 111 000e 9BB2 uxth r3, r3
  141. 112 0010 0380 strh r3, [r0, #0]
  142. 113 0012 0D88 ldrh r5, [r1, #0]
  143. 114 0014 2B44 add r3, r5
  144. 115 0016 5A40 eors r2, r3
  145. 116 0018 A300 lsls r3, r4, #2
  146. 117 001a 43EA9433 orr.w r3, r3, r4, lsr #14
  147. 118 001e 9BB2 uxth r3, r3
  148. 119 0020 0280 strh r2, [r0, #0]
  149. 120 0022 0B80 strh r3, [r1, #0]
  150. 121 0024 0288 ldrh r2, [r0, #0]
  151. 122 0026 5340 eors r3, r2
  152. 123 0028 0B80 strh r3, [r1, #0]
  153. 124 002a 30BD pop {r4, r5, pc}
  154. 125
  155. 126 @ 0 "" 2
  156. 29:speck3264.c **** "nop\n\t"
  157. 30:speck3264.c **** "push {r4, r5, lr}\n\t"
  158. 31:speck3264.c **** "ldrh r5, [r0, #0]\n\t"
  159. 32:speck3264.c **** "ldrh r4, [r1, #0]\n\t"
  160. 33:speck3264.c **** "lsls r3, r5, #9\n\t"
  161. 34:speck3264.c **** "orr.w r3, r3, r5, lsr #7\n\t"
  162. 35:speck3264.c **** "uxth r3, r3\n\t"
  163. 36:speck3264.c **** "strh r3, [r0, #0]\n\t"
  164. 37:speck3264.c **** "ldrh r5, [r1, #0]\n\t"
  165. 38:speck3264.c **** "add r3, r5\n\t"
  166. 39:speck3264.c **** "eors r2, r3\n\t"
  167. 40:speck3264.c **** "lsls r3, r4, #2\n\t"
  168. 41:speck3264.c **** "orr.w r3, r3, r4, lsr #14\n\t"
  169. 42:speck3264.c **** "uxth r3, r3\n\t"
  170. 43:speck3264.c **** "strh r2, [r0, #0]\n\t"
  171. 44:speck3264.c **** "strh r3, [r1, #0]\n\t"
  172. 45:speck3264.c **** "ldrh r2, [r0, #0]\n\t"
  173. 46:speck3264.c **** "eors r3, r2\n\t"
  174. 47:speck3264.c **** "strh r3, [r1, #0]\n\t"
  175. 48:speck3264.c **** "pop {r4, r5, pc}\n\t"
  176. 49:speck3264.c **** );
  177. 50:speck3264.c ****
  178. 51:speck3264.c **** }
  179. 127 .loc 1 51 1 is_stmt 0 view .LVU26
  180. 128 .thumb
  181. 129 .syntax unified
  182. 130 002c 7047 bx lr
  183. 131 .cfi_endproc
  184. 132 .LFE4:
  185. 134 .section .text.Words16ToBytes,"ax",%progbits
  186. 135 .align 1
  187. 136 .global Words16ToBytes
  188. 137 .syntax unified
  189. 138 .thumb
  190. 139 .thumb_func
  191. 140 .fpu softvfp
  192. 142 Words16ToBytes:
  193. 143 .LVL6:
  194. 144 .LFB5:
  195. 52:speck3264.c **** #endif
  196. 53:speck3264.c ****
  197. 54:speck3264.c ****
  198. 55:speck3264.c **** void Words16ToBytes(u16 words[],u8 bytes[],int numwords)
  199. 56:speck3264.c **** {
  200. 145 .loc 1 56 1 is_stmt 1 view -0
  201. 146 .cfi_startproc
  202. 147 @ args = 0, pretend = 0, frame = 0
  203. 148 @ frame_needed = 0, uses_anonymous_args = 0
  204. 57:speck3264.c **** int i,j=0;
  205. 149 .loc 1 57 5 view .LVU28
  206. 58:speck3264.c **** for(i=0;i<numwords;i++){
  207. 150 .loc 1 58 5 view .LVU29
  208. 56:speck3264.c **** int i,j=0;
  209. 151 .loc 1 56 1 is_stmt 0 view .LVU30
  210. 152 0000 30B5 push {r4, r5, lr}
  211. 153 .LCFI1:
  212. 154 .cfi_def_cfa_offset 12
  213. 155 .cfi_offset 4, -12
  214. 156 .cfi_offset 5, -8
  215. 157 .cfi_offset 14, -4
  216. 158 0002 0238 subs r0, r0, #2
  217. 159 .LVL7:
  218. 160 .loc 1 58 10 view .LVU31
  219. 161 0004 0023 movs r3, #0
  220. 59:speck3264.c **** bytes[j]=(u8)words[i];
  221. 60:speck3264.c **** bytes[j+1]=(u8)(words[i]>>8);
  222. 162 .loc 1 60 19 view .LVU32
  223. 163 0006 4D1C adds r5, r1, #1
  224. 164 .LVL8:
  225. 165 .L4:
  226. 58:speck3264.c **** bytes[j]=(u8)words[i];
  227. 166 .loc 1 58 14 is_stmt 1 discriminator 1 view .LVU33
  228. 167 0008 9342 cmp r3, r2
  229. 168 000a 00DB blt .L5
  230. 61:speck3264.c **** j+=2;
  231. 62:speck3264.c **** }
  232. 63:speck3264.c **** }
  233. 169 .loc 1 63 1 is_stmt 0 view .LVU34
  234. 170 000c 30BD pop {r4, r5, pc}
  235. 171 .L5:
  236. 59:speck3264.c **** bytes[j+1]=(u8)(words[i]>>8);
  237. 172 .loc 1 59 9 is_stmt 1 discriminator 3 view .LVU35
  238. 59:speck3264.c **** bytes[j+1]=(u8)(words[i]>>8);
  239. 173 .loc 1 59 18 is_stmt 0 discriminator 3 view .LVU36
  240. 174 000e 30F8024F ldrh r4, [r0, #2]!
  241. 175 .LVL9:
  242. 59:speck3264.c **** bytes[j+1]=(u8)(words[i]>>8);
  243. 176 .loc 1 59 18 discriminator 3 view .LVU37
  244. 177 0012 01F81340 strb r4, [r1, r3, lsl #1]
  245. 60:speck3264.c **** j+=2;
  246. 178 .loc 1 60 9 is_stmt 1 discriminator 3 view .LVU38
  247. 60:speck3264.c **** j+=2;
  248. 179 .loc 1 60 20 is_stmt 0 discriminator 3 view .LVU39
  249. 180 0016 0488 ldrh r4, [r0]
  250. 181 0018 240A lsrs r4, r4, #8
  251. 182 001a 05F81340 strb r4, [r5, r3, lsl #1]
  252. 61:speck3264.c **** j+=2;
  253. 183 .loc 1 61 9 is_stmt 1 discriminator 3 view .LVU40
  254. 184 .LVL10:
  255. 58:speck3264.c **** bytes[j]=(u8)words[i];
  256. 185 .loc 1 58 25 discriminator 3 view .LVU41
  257. 186 001e 0133 adds r3, r3, #1
  258. 187 .LVL11:
  259. 58:speck3264.c **** bytes[j]=(u8)words[i];
  260. 188 .loc 1 58 25 is_stmt 0 discriminator 3 view .LVU42
  261. 189 0020 F2E7 b .L4
  262. 190 .cfi_endproc
  263. 191 .LFE5:
  264. 193 .section .text.BytesToWords16,"ax",%progbits
  265. 194 .align 1
  266. 195 .global BytesToWords16
  267. 196 .syntax unified
  268. 197 .thumb
  269. 198 .thumb_func
  270. 199 .fpu softvfp
  271. 201 BytesToWords16:
  272. 202 .LVL12:
  273. 203 .LFB6:
  274. 64:speck3264.c ****
  275. 65:speck3264.c **** void BytesToWords16(u8 bytes[],u16 words[],int numbytes)
  276. 66:speck3264.c **** {
  277. 204 .loc 1 66 1 is_stmt 1 view -0
  278. 205 .cfi_startproc
  279. 206 @ args = 0, pretend = 0, frame = 0
  280. 207 @ frame_needed = 0, uses_anonymous_args = 0
  281. 67:speck3264.c **** int i,j=0; for(i=0;i<numbytes/2;i++){
  282. 208 .loc 1 67 5 view .LVU44
  283. 209 .loc 1 67 16 view .LVU45
  284. 210 .loc 1 67 34 is_stmt 0 view .LVU46
  285. 211 0000 02EBD272 add r2, r2, r2, lsr #31
  286. 212 .LVL13:
  287. 66:speck3264.c **** int i,j=0; for(i=0;i<numbytes/2;i++){
  288. 213 .loc 1 66 1 view .LVU47
  289. 214 0004 70B5 push {r4, r5, r6, lr}
  290. 215 .LCFI2:
  291. 216 .cfi_def_cfa_offset 16
  292. 217 .cfi_offset 4, -16
  293. 218 .cfi_offset 5, -12
  294. 219 .cfi_offset 6, -8
  295. 220 .cfi_offset 14, -4
  296. 221 .loc 1 67 34 view .LVU48
  297. 222 0006 5210 asrs r2, r2, #1
  298. 223 .loc 1 67 21 view .LVU49
  299. 224 0008 0023 movs r3, #0
  300. 68:speck3264.c **** words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
  301. 225 .loc 1 68 45 view .LVU50
  302. 226 000a 451C adds r5, r0, #1
  303. 227 .LVL14:
  304. 228 .L7:
  305. 67:speck3264.c **** int i,j=0; for(i=0;i<numbytes/2;i++){
  306. 229 .loc 1 67 25 is_stmt 1 discriminator 1 view .LVU51
  307. 230 000c 9A42 cmp r2, r3
  308. 231 000e 00DC bgt .L8
  309. 69:speck3264.c **** j+=2;
  310. 70:speck3264.c **** }
  311. 71:speck3264.c **** }
  312. 232 .loc 1 71 1 is_stmt 0 view .LVU52
  313. 233 0010 70BD pop {r4, r5, r6, pc}
  314. 234 .L8:
  315. 68:speck3264.c **** words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
  316. 235 .loc 1 68 9 is_stmt 1 discriminator 3 view .LVU53
  317. 68:speck3264.c **** words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
  318. 236 .loc 1 68 35 is_stmt 0 discriminator 3 view .LVU54
  319. 237 0012 15F81360 ldrb r6, [r5, r3, lsl #1] @ zero_extendqisi2
  320. 68:speck3264.c **** words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
  321. 238 .loc 1 68 28 discriminator 3 view .LVU55
  322. 239 0016 10F81340 ldrb r4, [r0, r3, lsl #1] @ zero_extendqisi2
  323. 68:speck3264.c **** words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
  324. 240 .loc 1 68 32 discriminator 3 view .LVU56
  325. 241 001a 44EA0624 orr r4, r4, r6, lsl #8
  326. 68:speck3264.c **** words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
  327. 242 .loc 1 68 17 discriminator 3 view .LVU57
  328. 243 001e 21F81340 strh r4, [r1, r3, lsl #1] @ movhi
  329. 69:speck3264.c **** j+=2;
  330. 244 .loc 1 69 9 is_stmt 1 discriminator 3 view .LVU58
  331. 245 .LVL15:
  332. 67:speck3264.c **** words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
  333. 246 .loc 1 67 38 discriminator 3 view .LVU59
  334. 247 0022 0133 adds r3, r3, #1
  335. 248 .LVL16:
  336. 67:speck3264.c **** words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
  337. 249 .loc 1 67 38 is_stmt 0 discriminator 3 view .LVU60
  338. 250 0024 F2E7 b .L7
  339. 251 .cfi_endproc
  340. 252 .LFE6:
  341. 254 .section .text.Speck3264KeySchedule,"ax",%progbits
  342. 255 .align 1
  343. 256 .global Speck3264KeySchedule
  344. 257 .syntax unified
  345. 258 .thumb
  346. 259 .thumb_func
  347. 260 .fpu softvfp
  348. 262 Speck3264KeySchedule:
  349. 263 .LVL17:
  350. 264 .LFB7:
  351. 72:speck3264.c ****
  352. 73:speck3264.c **** void Speck3264KeySchedule(u16 K[],u16 rk[])
  353. 74:speck3264.c **** {
  354. 265 .loc 1 74 1 is_stmt 1 view -0
  355. 266 .cfi_startproc
  356. 267 @ args = 0, pretend = 0, frame = 0
  357. 268 @ frame_needed = 0, uses_anonymous_args = 0
  358. 75:speck3264.c **** u16 i,D=K[3],C=K[2],B=K[1],A=K[0];
  359. 269 .loc 1 75 5 view .LVU62
  360. 74:speck3264.c **** u16 i,D=K[3],C=K[2],B=K[1],A=K[0];
  361. 270 .loc 1 74 1 is_stmt 0 view .LVU63
  362. 271 0000 F0B5 push {r4, r5, r6, r7, lr}
  363. 272 .LCFI3:
  364. 273 .cfi_def_cfa_offset 20
  365. 274 .cfi_offset 4, -20
  366. 275 .cfi_offset 5, -16
  367. 276 .cfi_offset 6, -12
  368. 277 .cfi_offset 7, -8
  369. 278 .cfi_offset 14, -4
  370. 279 .loc 1 75 32 view .LVU64
  371. 280 0002 0388 ldrh r3, [r0]
  372. 281 .loc 1 75 11 view .LVU65
  373. 282 0004 C788 ldrh r7, [r0, #6]
  374. 283 .LVL18:
  375. 284 .loc 1 75 18 view .LVU66
  376. 285 0006 8488 ldrh r4, [r0, #4]
  377. 286 .LVL19:
  378. 287 .loc 1 75 25 view .LVU67
  379. 288 0008 4688 ldrh r6, [r0, #2]
  380. 289 .LVL20:
  381. 76:speck3264.c **** #ifdef ARM
  382. 77:speck3264.c **** for(i=0;i<22;){
  383. 290 .loc 1 77 5 is_stmt 1 view .LVU68
  384. 291 .loc 1 77 14 view .LVU69
  385. 75:speck3264.c **** #ifdef ARM
  386. 292 .loc 1 75 32 is_stmt 0 view .LVU70
  387. 293 000a 0025 movs r5, #0
  388. 294 .LVL21:
  389. 295 .L10:
  390. 78:speck3264.c **** rk[i]=A;
  391. 79:speck3264.c **** ER16(B,A,i++);
  392. 296 .loc 1 79 9 view .LVU71
  393. 297 000c 7202 lsls r2, r6, #9
  394. 298 000e 92B2 uxth r2, r2
  395. 299 0010 42EAD612 orr r2, r2, r6, lsr #7
  396. 300 0014 1A44 add r2, r2, r3
  397. 301 0016 A8B2 uxth r0, r5
  398. 302 .LVL22:
  399. 78:speck3264.c **** rk[i]=A;
  400. 303 .loc 1 78 9 is_stmt 1 view .LVU72
  401. 304 .loc 1 79 9 is_stmt 0 view .LVU73
  402. 305 0018 92B2 uxth r2, r2
  403. 306 001a 82EA0006 eor r6, r2, r0
  404. 307 .LVL23:
  405. 308 .loc 1 79 9 view .LVU74
  406. 309 001e 9A00 lsls r2, r3, #2
  407. 310 0020 92B2 uxth r2, r2
  408. 78:speck3264.c **** rk[i]=A;
  409. 311 .loc 1 78 14 view .LVU75
  410. 312 0022 0B80 strh r3, [r1] @ movhi
  411. 313 .loc 1 79 9 is_stmt 1 view .LVU76
  412. 314 .LVL24:
  413. 315 .loc 1 79 9 is_stmt 0 view .LVU77
  414. 316 0024 42EA9332 orr r2, r2, r3, lsr #14
  415. 317 .LVL25:
  416. 80:speck3264.c **** rk[i]=A;
  417. 81:speck3264.c **** ER16(C,A,i++);
  418. 318 .loc 1 81 9 view .LVU78
  419. 319 0028 6302 lsls r3, r4, #9
  420. 79:speck3264.c **** rk[i]=A;
  421. 320 .loc 1 79 9 view .LVU79
  422. 321 002a 7240 eors r2, r2, r6
  423. 322 .LVL26:
  424. 80:speck3264.c **** rk[i]=A;
  425. 323 .loc 1 80 9 is_stmt 1 view .LVU80
  426. 324 002c 9BB2 uxth r3, r3
  427. 325 .loc 1 81 9 is_stmt 0 view .LVU81
  428. 326 002e 43EAD413 orr r3, r3, r4, lsr #7
  429. 327 0032 4FEA820C lsl ip, r2, #2
  430. 328 0036 1344 add r3, r3, r2
  431. 329 0038 441C adds r4, r0, #1
  432. 330 .LVL27:
  433. 331 .loc 1 81 9 view .LVU82
  434. 332 003a 1FFA8CFC uxth ip, ip
  435. 80:speck3264.c **** rk[i]=A;
  436. 333 .loc 1 80 14 view .LVU83
  437. 334 003e 4A80 strh r2, [r1, #2] @ movhi
  438. 335 .loc 1 81 9 is_stmt 1 view .LVU84
  439. 336 .LVL28:
  440. 337 .loc 1 81 9 is_stmt 0 view .LVU85
  441. 338 0040 5C40 eors r4, r4, r3
  442. 339 0042 4CEA923C orr ip, ip, r2, lsr #14
  443. 82:speck3264.c **** rk[i]=A;
  444. 83:speck3264.c **** ER16(D,A,i++);
  445. 340 .loc 1 83 9 view .LVU86
  446. 341 0046 7A02 lsls r2, r7, #9
  447. 342 .LVL29:
  448. 81:speck3264.c **** rk[i]=A;
  449. 343 .loc 1 81 9 view .LVU87
  450. 344 0048 A4B2 uxth r4, r4
  451. 345 .LVL30:
  452. 81:speck3264.c **** rk[i]=A;
  453. 346 .loc 1 81 9 view .LVU88
  454. 347 004a 92B2 uxth r2, r2
  455. 348 004c 84EA0C0C eor ip, r4, ip
  456. 349 .LVL31:
  457. 82:speck3264.c **** rk[i]=A;
  458. 350 .loc 1 82 9 is_stmt 1 view .LVU89
  459. 351 .loc 1 83 9 is_stmt 0 view .LVU90
  460. 352 0050 42EAD712 orr r2, r2, r7, lsr #7
  461. 353 0054 6244 add r2, r2, ip
  462. 354 0056 0230 adds r0, r0, #2
  463. 355 .LVL32:
  464. 356 .loc 1 83 9 view .LVU91
  465. 357 0058 4FEA8C03 lsl r3, ip, #2
  466. 358 005c 5040 eors r0, r0, r2
  467. 359 .LVL33:
  468. 360 .loc 1 83 9 view .LVU92
  469. 361 005e 9BB2 uxth r3, r3
  470. 77:speck3264.c **** rk[i]=A;
  471. 362 .loc 1 77 14 view .LVU93
  472. 363 0060 0335 adds r5, r5, #3
  473. 364 .LVL34:
  474. 365 .loc 1 83 9 view .LVU94
  475. 366 0062 87B2 uxth r7, r0
  476. 367 .LVL35:
  477. 368 .loc 1 83 9 view .LVU95
  478. 369 0064 43EA9C33 orr r3, r3, ip, lsr #14
  479. 77:speck3264.c **** rk[i]=A;
  480. 370 .loc 1 77 14 view .LVU96
  481. 371 0068 182D cmp r5, #24
  482. 82:speck3264.c **** rk[i]=A;
  483. 372 .loc 1 82 14 view .LVU97
  484. 373 006a A1F804C0 strh ip, [r1, #4] @ movhi
  485. 374 .loc 1 83 9 is_stmt 1 view .LVU98
  486. 375 .LVL36:
  487. 376 .loc 1 83 9 is_stmt 0 view .LVU99
  488. 377 006e 83EA0703 eor r3, r3, r7
  489. 378 .LVL37:
  490. 77:speck3264.c **** rk[i]=A;
  491. 379 .loc 1 77 14 is_stmt 1 view .LVU100
  492. 380 0072 01F10601 add r1, r1, #6
  493. 381 0076 C9D1 bne .L10
  494. 84:speck3264.c **** }
  495. 85:speck3264.c **** #endif
  496. 86:speck3264.c ****
  497. 87:speck3264.c **** #ifndef ARM
  498. 88:speck3264.c **** for(i=0;i<22;){
  499. 89:speck3264.c ****
  500. 90:speck3264.c **** printf("A = 0x%x ; B = 0x%x ; C = 0x%x ; D = 0x%x\n", A, B, C, D);
  501. 91:speck3264.c ****
  502. 92:speck3264.c **** rk[i]=A;
  503. 93:speck3264.c **** ER16(B,A,i++);
  504. 94:speck3264.c **** printf("rk[%d] = 0x%x\n", i-1, A);
  505. 95:speck3264.c ****
  506. 96:speck3264.c **** printf("A = 0x%x ; B = 0x%x ; C = 0x%x ; D = 0x%x\n", A, B, C, D);
  507. 97:speck3264.c **** rk[i]=A;
  508. 98:speck3264.c **** ER16(C,A,i++);
  509. 99:speck3264.c **** printf("rk[%d] = 0x%x\n", i-1, A);
  510. 100:speck3264.c ****
  511. 101:speck3264.c **** printf("A = 0x%x ; B = 0x%x ; C = 0x%x ; D = 0x%x\n", A, B, C, D);
  512. 102:speck3264.c **** rk[i]=A;
  513. 103:speck3264.c **** ER16(D,A,i++);
  514. 104:speck3264.c **** printf("rk[%d] = 0x%x\n <- D = 0x%x", i-1, A, D);
  515. 105:speck3264.c **** printf("----------------------\n");
  516. 106:speck3264.c **** }
  517. 107:speck3264.c **** #endif
  518. 108:speck3264.c **** }
  519. 382 .loc 1 108 1 is_stmt 0 view .LVU101
  520. 383 0078 F0BD pop {r4, r5, r6, r7, pc}
  521. 384 .loc 1 108 1 view .LVU102
  522. 385 .cfi_endproc
  523. 386 .LFE7:
  524. 388 .section .text.Speck3264Encrypt,"ax",%progbits
  525. 389 .align 1
  526. 390 .global Speck3264Encrypt
  527. 391 .syntax unified
  528. 392 .thumb
  529. 393 .thumb_func
  530. 394 .fpu softvfp
  531. 396 Speck3264Encrypt:
  532. 397 .LVL38:
  533. 398 .LFB8:
  534. 109:speck3264.c ****
  535. 110:speck3264.c ****
  536. 111:speck3264.c **** void Speck3264Encrypt(u16 Pt[],u16 Ct[],u16 rk[])
  537. 112:speck3264.c **** {
  538. 399 .loc 1 112 1 is_stmt 1 view -0
  539. 400 .cfi_startproc
  540. 401 @ args = 0, pretend = 0, frame = 0
  541. 402 @ frame_needed = 0, uses_anonymous_args = 0
  542. 113:speck3264.c **** u16 i;
  543. 403 .loc 1 113 5 view .LVU104
  544. 114:speck3264.c **** Ct[0]=Pt[0]; Ct[1]=Pt[1];
  545. 404 .loc 1 114 5 view .LVU105
  546. 405 .loc 1 114 13 is_stmt 0 view .LVU106
  547. 406 0000 0388 ldrh r3, [r0]
  548. 407 .loc 1 114 10 view .LVU107
  549. 408 0002 0B80 strh r3, [r1] @ movhi
  550. 409 .loc 1 114 18 is_stmt 1 view .LVU108
  551. 410 .loc 1 114 23 is_stmt 0 view .LVU109
  552. 411 0004 4388 ldrh r3, [r0, #2]
  553. 412 0006 0846 mov r0, r1
  554. 413 .LVL39:
  555. 112:speck3264.c **** u16 i;
  556. 414 .loc 1 112 1 view .LVU110
  557. 415 0008 10B5 push {r4, lr}
  558. 416 .LCFI4:
  559. 417 .cfi_def_cfa_offset 8
  560. 418 .cfi_offset 4, -8
  561. 419 .cfi_offset 14, -4
  562. 420 .loc 1 114 23 view .LVU111
  563. 421 000a 20F8023F strh r3, [r0, #2]! @ movhi
  564. 115:speck3264.c ****
  565. 116:speck3264.c **** // full 22 rounds
  566. 117:speck3264.c **** for(i=0;i<22;) {
  567. 422 .loc 1 117 5 is_stmt 1 view .LVU112
  568. 423 .LVL40:
  569. 424 .loc 1 117 14 view .LVU113
  570. 425 000e 941E subs r4, r2, #2
  571. 426 0010 02F12A03 add r3, r2, #42
  572. 427 .LVL41:
  573. 428 .L13:
  574. 118:speck3264.c **** //ER16(Ct[1],Ct[0],rk[i++]);
  575. 119:speck3264.c **** #ifdef ARM
  576. 120:speck3264.c **** FuncER16_ASM(&Ct[1], &Ct[0],rk[i++]);
  577. 429 .loc 1 120 9 view .LVU114
  578. 430 .loc 1 120 9 is_stmt 0 view .LVU115
  579. 431 0014 34F8022F ldrh r2, [r4, #2]!
  580. 432 .LVL42:
  581. 433 .loc 1 120 9 view .LVU116
  582. 434 0018 FFF7FEFF bl FuncER16_ASM
  583. 435 .LVL43:
  584. 117:speck3264.c **** //ER16(Ct[1],Ct[0],rk[i++]);
  585. 436 .loc 1 117 14 is_stmt 1 view .LVU117
  586. 437 001c 9C42 cmp r4, r3
  587. 438 001e F9D1 bne .L13
  588. 121:speck3264.c **** //FuncER16(&Ct[1], &Ct[0], rk[i++]);
  589. 122:speck3264.c **** #else
  590. 123:speck3264.c **** ER16(Ct[1],Ct[0],rk[i++]);
  591. 124:speck3264.c **** #endif
  592. 125:speck3264.c ****
  593. 126:speck3264.c **** }
  594. 127:speck3264.c **** }
  595. 439 .loc 1 127 1 is_stmt 0 view .LVU118
  596. 440 0020 10BD pop {r4, pc}
  597. 441 .loc 1 127 1 view .LVU119
  598. 442 .cfi_endproc
  599. 443 .LFE8:
  600. 445 .section .text.Speck3264Decrypt,"ax",%progbits
  601. 446 .align 1
  602. 447 .global Speck3264Decrypt
  603. 448 .syntax unified
  604. 449 .thumb
  605. 450 .thumb_func
  606. 451 .fpu softvfp
  607. 453 Speck3264Decrypt:
  608. 454 .LVL44:
  609. 455 .LFB9:
  610. 128:speck3264.c ****
  611. 129:speck3264.c ****
  612. 130:speck3264.c **** void Speck3264Decrypt(u16 Pt[],u16 Ct[],u16 rk[])
  613. 131:speck3264.c **** {
  614. 456 .loc 1 131 1 is_stmt 1 view -0
  615. 457 .cfi_startproc
  616. 458 @ args = 0, pretend = 0, frame = 0
  617. 459 @ frame_needed = 0, uses_anonymous_args = 0
  618. 132:speck3264.c **** int i;
  619. 460 .loc 1 132 5 view .LVU121
  620. 133:speck3264.c **** Pt[0]=Ct[0]; Pt[1]=Ct[1];
  621. 461 .loc 1 133 5 view .LVU122
  622. 462 .loc 1 133 13 is_stmt 0 view .LVU123
  623. 463 0000 0B88 ldrh r3, [r1]
  624. 464 .loc 1 133 10 view .LVU124
  625. 465 0002 0380 strh r3, [r0] @ movhi
  626. 466 .loc 1 133 18 is_stmt 1 view .LVU125
  627. 467 .loc 1 133 23 is_stmt 0 view .LVU126
  628. 468 0004 4B88 ldrh r3, [r1, #2]
  629. 469 0006 4380 strh r3, [r0, #2] @ movhi
  630. 134:speck3264.c ****
  631. 135:speck3264.c **** for(i=21;i>=0;) DR16(Pt[1],Pt[0],rk[i--]);
  632. 470 .loc 1 135 5 is_stmt 1 view .LVU127
  633. 471 .LVL45:
  634. 472 .loc 1 135 15 view .LVU128
  635. 131:speck3264.c **** int i;
  636. 473 .loc 1 131 1 is_stmt 0 view .LVU129
  637. 474 0008 30B5 push {r4, r5, lr}
  638. 475 .LCFI5:
  639. 476 .cfi_def_cfa_offset 12
  640. 477 .cfi_offset 4, -12
  641. 478 .cfi_offset 5, -8
  642. 479 .cfi_offset 14, -4
  643. 480 000a 02F12C05 add r5, r2, #44
  644. 481 .LVL46:
  645. 482 .L16:
  646. 483 .loc 1 135 21 is_stmt 1 discriminator 3 view .LVU130
  647. 484 000e 4388 ldrh r3, [r0, #2]
  648. 485 0010 0488 ldrh r4, [r0]
  649. 486 0012 5C40 eors r4, r4, r3
  650. 487 0014 A103 lsls r1, r4, #14
  651. 488 0016 41EA9401 orr r1, r1, r4, lsr #2
  652. 489 001a 89B2 uxth r1, r1
  653. 490 001c 0180 strh r1, [r0] @ movhi
  654. 491 .loc 1 135 21 is_stmt 0 discriminator 3 view .LVU131
  655. 492 001e 35F8024D ldrh r4, [r5, #-2]!
  656. 493 0022 6340 eors r3, r3, r4
  657. 494 0024 5B1A subs r3, r3, r1
  658. 495 0026 99B2 uxth r1, r3
  659. 496 0028 C3F34623 ubfx r3, r3, #9, #7
  660. 497 002c 43EAC113 orr r3, r3, r1, lsl #7
  661. 498 .loc 1 135 15 discriminator 3 view .LVU132
  662. 499 0030 AA42 cmp r2, r5
  663. 500 .loc 1 135 21 discriminator 3 view .LVU133
  664. 501 0032 4380 strh r3, [r0, #2] @ movhi
  665. 502 .loc 1 135 15 is_stmt 1 discriminator 3 view .LVU134
  666. 503 0034 EBD1 bne .L16
  667. 136:speck3264.c **** }
  668. 504 .loc 1 136 1 is_stmt 0 view .LVU135
  669. 505 0036 30BD pop {r4, r5, pc}
  670. 506 .cfi_endproc
  671. 507 .LFE9:
  672. 509 .section .text.Speck3264_EncryptBlock,"ax",%progbits
  673. 510 .align 1
  674. 511 .global Speck3264_EncryptBlock
  675. 512 .syntax unified
  676. 513 .thumb
  677. 514 .thumb_func
  678. 515 .fpu softvfp
  679. 517 Speck3264_EncryptBlock:
  680. 518 .LVL47:
  681. 519 .LFB10:
  682. 137:speck3264.c ****
  683. 138:speck3264.c ****
  684. 139:speck3264.c **** void Speck3264_EncryptBlock(u8 pt[], u8 k[], u8 ct[]) {
  685. 520 .loc 1 139 55 is_stmt 1 view -0
  686. 521 .cfi_startproc
  687. 522 @ args = 0, pretend = 0, frame = 88
  688. 523 @ frame_needed = 0, uses_anonymous_args = 0
  689. 140:speck3264.c ****
  690. 141:speck3264.c **** u16 Pt[2] = {0};
  691. 524 .loc 1 141 5 view .LVU137
  692. 139:speck3264.c ****
  693. 525 .loc 1 139 55 is_stmt 0 view .LVU138
  694. 526 0000 F0B5 push {r4, r5, r6, r7, lr}
  695. 527 .LCFI6:
  696. 528 .cfi_def_cfa_offset 20
  697. 529 .cfi_offset 4, -20
  698. 530 .cfi_offset 5, -16
  699. 531 .cfi_offset 6, -12
  700. 532 .cfi_offset 7, -8
  701. 533 .cfi_offset 14, -4
  702. 534 .loc 1 141 9 view .LVU139
  703. 535 0002 0024 movs r4, #0
  704. 139:speck3264.c ****
  705. 536 .loc 1 139 55 view .LVU140
  706. 537 0004 97B0 sub sp, sp, #92
  707. 538 .LCFI7:
  708. 539 .cfi_def_cfa_offset 112
  709. 139:speck3264.c ****
  710. 540 .loc 1 139 55 view .LVU141
  711. 541 0006 0746 mov r7, r0
  712. 542 0008 0E46 mov r6, r1
  713. 543 000a 1546 mov r5, r2
  714. 142:speck3264.c **** u16 K[4] = {0};
  715. 143:speck3264.c **** u16 rk[34] = {0};
  716. 544 .loc 1 143 9 view .LVU142
  717. 545 000c 2146 mov r1, r4
  718. 546 .LVL48:
  719. 547 .loc 1 143 9 view .LVU143
  720. 548 000e 4422 movs r2, #68
  721. 549 .LVL49:
  722. 550 .loc 1 143 9 view .LVU144
  723. 551 0010 05A8 add r0, sp, #20
  724. 552 .LVL50:
  725. 142:speck3264.c **** u16 K[4] = {0};
  726. 553 .loc 1 142 9 view .LVU145
  727. 554 0012 CDE90344 strd r4, r4, [sp, #12]
  728. 141:speck3264.c **** u16 K[4] = {0};
  729. 555 .loc 1 141 9 view .LVU146
  730. 556 0016 0194 str r4, [sp, #4]
  731. 142:speck3264.c **** u16 K[4] = {0};
  732. 557 .loc 1 142 5 is_stmt 1 view .LVU147
  733. 558 .loc 1 143 5 view .LVU148
  734. 559 .loc 1 143 9 is_stmt 0 view .LVU149
  735. 560 0018 FFF7FEFF bl memset
  736. 561 .LVL51:
  737. 144:speck3264.c **** u16 Ct[2] = {0};
  738. 562 .loc 1 144 5 is_stmt 1 view .LVU150
  739. 145:speck3264.c ****
  740. 146:speck3264.c **** BytesToWords16(pt,Pt,8);
  741. 563 .loc 1 146 5 is_stmt 0 view .LVU151
  742. 564 001c 01A9 add r1, sp, #4
  743. 565 001e 3846 mov r0, r7
  744. 566 0020 0822 movs r2, #8
  745. 144:speck3264.c **** u16 Ct[2] = {0};
  746. 567 .loc 1 144 9 view .LVU152
  747. 568 0022 0294 str r4, [sp, #8]
  748. 569 .loc 1 146 5 is_stmt 1 view .LVU153
  749. 570 0024 FFF7FEFF bl BytesToWords16
  750. 571 .LVL52:
  751. 147:speck3264.c **** BytesToWords16(k,K,16);
  752. 572 .loc 1 147 5 view .LVU154
  753. 573 0028 1022 movs r2, #16
  754. 574 002a 03A9 add r1, sp, #12
  755. 575 002c 3046 mov r0, r6
  756. 576 002e FFF7FEFF bl BytesToWords16
  757. 577 .LVL53:
  758. 148:speck3264.c ****
  759. 149:speck3264.c ****
  760. 150:speck3264.c **** Speck3264KeySchedule(K,rk);
  761. 578 .loc 1 150 5 view .LVU155
  762. 579 0032 05A9 add r1, sp, #20
  763. 580 0034 03A8 add r0, sp, #12
  764. 581 0036 FFF7FEFF bl Speck3264KeySchedule
  765. 582 .LVL54:
  766. 151:speck3264.c ****
  767. 152:speck3264.c **** #ifndef ARM
  768. 153:speck3264.c **** // DEBUG Purposes
  769. 154:speck3264.c **** for (int i=0; i < 16; i++)
  770. 155:speck3264.c **** {
  771. 156:speck3264.c **** printf("Key: 0x%x\n", rk[i]);
  772. 157:speck3264.c **** }
  773. 158:speck3264.c **** #endif
  774. 159:speck3264.c **** Speck3264Encrypt(Pt,Ct,rk);
  775. 583 .loc 1 159 5 view .LVU156
  776. 584 003a 05AA add r2, sp, #20
  777. 585 003c 02A9 add r1, sp, #8
  778. 586 003e 01A8 add r0, sp, #4
  779. 587 0040 FFF7FEFF bl Speck3264Encrypt
  780. 588 .LVL55:
  781. 160:speck3264.c **** Words16ToBytes(Ct,ct,2);
  782. 589 .loc 1 160 5 view .LVU157
  783. 590 0044 0222 movs r2, #2
  784. 591 0046 2946 mov r1, r5
  785. 592 0048 02A8 add r0, sp, #8
  786. 593 004a FFF7FEFF bl Words16ToBytes
  787. 594 .LVL56:
  788. 161:speck3264.c **** }
  789. 595 .loc 1 161 1 is_stmt 0 view .LVU158
  790. 596 004e 17B0 add sp, sp, #92
  791. 597 .LCFI8:
  792. 598 .cfi_def_cfa_offset 20
  793. 599 @ sp needed
  794. 600 0050 F0BD pop {r4, r5, r6, r7, pc}
  795. 601 .loc 1 161 1 view .LVU159
  796. 602 .cfi_endproc
  797. 603 .LFE10:
  798. 605 .text
  799. 606 .Letext0:
  800. 607 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
  801. 608 .file 3 "/usr/arm-none-eabi/include/sys/_stdint.h"
  802. 609 .file 4 "<built-in>"
  803. DEFINED SYMBOLS
  804. *ABS*:0000000000000000 speck3264.c
  805. /tmp/cc3Lq9np.s:16 .text.FuncER16:0000000000000000 $t
  806. /tmp/cc3Lq9np.s:24 .text.FuncER16:0000000000000000 FuncER16
  807. /tmp/cc3Lq9np.s:87 .text.FuncER16_ASM:0000000000000000 $t
  808. /tmp/cc3Lq9np.s:94 .text.FuncER16_ASM:0000000000000000 FuncER16_ASM
  809. /tmp/cc3Lq9np.s:135 .text.Words16ToBytes:0000000000000000 $t
  810. /tmp/cc3Lq9np.s:142 .text.Words16ToBytes:0000000000000000 Words16ToBytes
  811. /tmp/cc3Lq9np.s:194 .text.BytesToWords16:0000000000000000 $t
  812. /tmp/cc3Lq9np.s:201 .text.BytesToWords16:0000000000000000 BytesToWords16
  813. /tmp/cc3Lq9np.s:255 .text.Speck3264KeySchedule:0000000000000000 $t
  814. /tmp/cc3Lq9np.s:262 .text.Speck3264KeySchedule:0000000000000000 Speck3264KeySchedule
  815. /tmp/cc3Lq9np.s:389 .text.Speck3264Encrypt:0000000000000000 $t
  816. /tmp/cc3Lq9np.s:396 .text.Speck3264Encrypt:0000000000000000 Speck3264Encrypt
  817. /tmp/cc3Lq9np.s:446 .text.Speck3264Decrypt:0000000000000000 $t
  818. /tmp/cc3Lq9np.s:453 .text.Speck3264Decrypt:0000000000000000 Speck3264Decrypt
  819. /tmp/cc3Lq9np.s:510 .text.Speck3264_EncryptBlock:0000000000000000 $t
  820. /tmp/cc3Lq9np.s:517 .text.Speck3264_EncryptBlock:0000000000000000 Speck3264_EncryptBlock
  821. UNDEFINED SYMBOLS
  822. memset