speck_cpa_cw/cw_firmware_hiding/objdir-CWLITEARM/speck3264.lst

   1              		.cpu cortex-m4
   2              		.eabi_attribute 20, 1
   3              		.eabi_attribute 21, 1
   4              		.eabi_attribute 23, 3
   5              		.eabi_attribute 24, 1
   6              		.eabi_attribute 25, 1
   7              		.eabi_attribute 26, 1
   8              		.eabi_attribute 30, 4
   9              		.eabi_attribute 34, 1
  10              		.eabi_attribute 18, 4
  11              		.file	"speck3264.c"
  12              		.text
  13              	.Ltext0:
  14              		.cfi_sections	.debug_frame
  15              		.section	.text.FuncER16,"ax",%progbits
  16              		.align	1
  17              		.global	FuncER16
  18              		.arch armv7e-m
  19              		.syntax unified
  20              		.thumb
  21              		.thumb_func
  22              		.fpu softvfp
  24              	FuncER16:
  25              	.LVL0:
  26              	.LFB3:
  27              		.file 1 "speck3264.c"
   1:speck3264.c   **** #include <stdio.h>
   2:speck3264.c   **** #include <stdint.h>
   3:speck3264.c   **** #include "speck.h"
   4:speck3264.c   **** #include "helper.h"
   5:speck3264.c   **** 
   6:speck3264.c   **** u8 random_seed[8] = {0x00};
   7:speck3264.c   **** 
   8:speck3264.c   **** 
   9:speck3264.c   **** // This function is only used for the "x86" Speck compilation and as reference
  10:speck3264.c   **** void FuncER16(u16 *x, u16 *y, u16 k)
  11:speck3264.c   **** {
  28              		.loc 1 11 1 view -0
  29              		.cfi_startproc
  30              		@ args = 0, pretend = 0, frame = 0
  31              		@ frame_needed = 0, uses_anonymous_args = 0
  12:speck3264.c   ****     u16 tmp_x = *x;
  32              		.loc 1 12 5 view .LVU1
  11:speck3264.c   ****     u16 tmp_x = *x;
  33              		.loc 1 11 1 is_stmt 0 view .LVU2
  34 0000 70B5     		push	{r4, r5, r6, lr}
  35              	.LCFI0:
  36              		.cfi_def_cfa_offset 16
  37              		.cfi_offset 4, -16
  38              		.cfi_offset 5, -12
  39              		.cfi_offset 6, -8
  40              		.cfi_offset 14, -4
  11:speck3264.c   ****     u16 tmp_x = *x;
  41              		.loc 1 11 1 view .LVU3
  42 0002 0D46     		mov	r5, r1
  43 0004 1146     		mov	r1, r2
  44              	.LVL1:
  45              		.loc 1 12 9 view .LVU4
  46 0006 0288     		ldrh	r2, [r0]
  47              	.LVL2:
  13:speck3264.c   ****     u16 tmp_y = *y;
  48              		.loc 1 13 5 is_stmt 1 view .LVU5
  49              		.loc 1 13 9 is_stmt 0 view .LVU6
  50 0008 2E88     		ldrh	r6, [r5]
  51              	.LVL3:
  14:speck3264.c   **** 
  15:speck3264.c   ****     *x = (((tmp_x)>>(7)) | ((tmp_x)<<(16-(7))));
  52              		.loc 1 15 5 is_stmt 1 view .LVU7
  53              		.loc 1 15 36 is_stmt 0 view .LVU8
  54 000a 5302     		lsls	r3, r2, #9
  55              		.loc 1 15 26 view .LVU9
  56 000c 43EAD213 		orr	r3, r3, r2, lsr #7
  57 0010 9BB2     		uxth	r3, r3
  58              		.loc 1 15 8 view .LVU10
  59 0012 0380     		strh	r3, [r0]	@ movhi
  16:speck3264.c   ****     *x += *y;
  60              		.loc 1 16 5 is_stmt 1 view .LVU11
  61              		.loc 1 16 8 is_stmt 0 view .LVU12
  62 0014 2A88     		ldrh	r2, [r5]
  63              	.LVL4:
  64              		.loc 1 16 8 view .LVU13
  65 0016 1344     		add	r3, r3, r2
  11:speck3264.c   ****     u16 tmp_x = *x;
  66              		.loc 1 11 1 view .LVU14
  67 0018 0446     		mov	r4, r0
  68              		.loc 1 16 8 view .LVU15
  69 001a 98B2     		uxth	r0, r3
  70              	.LVL5:
  17:speck3264.c   **** 
  18:speck3264.c   ****     //*x = *x ^ k;
  19:speck3264.c   ****     *x = XOR(*x,  k, random_seed[*x & 0x07]);
  71              		.loc 1 19 37 view .LVU16
  72 001c 00F00703 		and	r3, r0, #7
  73              		.loc 1 19 10 view .LVU17
  74 0020 084A     		ldr	r2, .L2
  16:speck3264.c   **** 
  75              		.loc 1 16 8 view .LVU18
  76 0022 2080     		strh	r0, [r4]	@ movhi
  77              		.loc 1 19 5 is_stmt 1 view .LVU19
  78              		.loc 1 19 10 is_stmt 0 view .LVU20
  79 0024 D25C     		ldrb	r2, [r2, r3]	@ zero_extendqisi2
  80 0026 FFF7FEFF 		bl	XOR
  81              	.LVL6:
  82              		.loc 1 19 8 view .LVU21
  83 002a 2080     		strh	r0, [r4]	@ movhi
  20:speck3264.c   **** 
  21:speck3264.c   ****     *y = (((tmp_y)<<(2)) | (tmp_y>>(16-(2))));
  84              		.loc 1 21 5 is_stmt 1 view .LVU22
  85              		.loc 1 21 19 is_stmt 0 view .LVU23
  86 002c B000     		lsls	r0, r6, #2
  87              		.loc 1 21 26 view .LVU24
  88 002e 40EA9633 		orr	r3, r0, r6, lsr #14
  89 0032 98B2     		uxth	r0, r3
  90              		.loc 1 21 8 view .LVU25
  91 0034 2880     		strh	r0, [r5]	@ movhi
  22:speck3264.c   ****     *y = XOR(*y, *x, *y);
  92              		.loc 1 22 5 is_stmt 1 view .LVU26
  93              		.loc 1 22 10 is_stmt 0 view .LVU27
  94 0036 2188     		ldrh	r1, [r4]
  95 0038 C2B2     		uxtb	r2, r0
  96 003a FFF7FEFF 		bl	XOR
  97              	.LVL7:
  98              		.loc 1 22 8 view .LVU28
  99 003e 2880     		strh	r0, [r5]	@ movhi
  23:speck3264.c   ****     //*y = *y ^ *x;
  24:speck3264.c   **** 
  25:speck3264.c   **** }
 100              		.loc 1 25 1 view .LVU29
 101 0040 70BD     		pop	{r4, r5, r6, pc}
 102              	.LVL8:
 103              	.L3:
 104              		.loc 1 25 1 view .LVU30
 105 0042 00BF     		.align	2
 106              	.L2:
 107 0044 00000000 		.word	.LANCHOR0
 108              		.cfi_endproc
 109              	.LFE3:
 111              		.section	.text.FuncER16_ASM,"ax",%progbits
 112              		.align	1
 113              		.global	FuncER16_ASM
 114              		.syntax unified
 115              		.thumb
 116              		.thumb_func
 117              		.fpu softvfp
 119              	FuncER16_ASM:
 120              	.LVL9:
 121              	.LFB4:
  26:speck3264.c   **** 
  27:speck3264.c   **** 
  28:speck3264.c   **** #ifdef ARM
  29:speck3264.c   **** // This function is used when running on the CW
  30:speck3264.c   **** void FuncER16_ASM(u16 *x, u16 *y, u16 k)
  31:speck3264.c   **** {
 122              		.loc 1 31 1 is_stmt 1 view -0
 123              		.cfi_startproc
 124              		@ args = 0, pretend = 0, frame = 0
 125              		@ frame_needed = 0, uses_anonymous_args = 0
 126              		@ link register save eliminated.
  32:speck3264.c   **** 
  33:speck3264.c   ****     asm volatile (
 127              		.loc 1 33 5 view .LVU32
 128              		.syntax unified
 129              	@ 33 "speck3264.c" 1
 130 0000 00BF     		nop
 131 0002 30B5     		push	{r4, r5, lr}
 132 0004 0588     		ldrh	r5, [r0, #0]
 133 0006 0C88     		ldrh	r4, [r1, #0]
 134 0008 6B02     		lsls	r3, r5, #9
 135 000a 43EAD513 		orr.w	r3, r3, r5, lsr #7
 136 000e 9BB2     		uxth	r3, r3
 137 0010 0380     		strh	r3, [r0, #0]
 138 0012 0D88     		ldrh	r5, [r1, #0]
 139 0014 2B44     		add	r3, r5
 140 0016 5A40     		eors	r2, r3
 141 0018 A300     		lsls	r3, r4, #2
 142 001a 43EA9433 		orr.w	r3, r3, r4, lsr #14
 143 001e 9BB2     		uxth	r3, r3
 144 0020 0280     		strh	r2, [r0, #0]
 145 0022 0B80     		strh	r3, [r1, #0]
 146 0024 0288     		ldrh	r2, [r0, #0]
 147 0026 5340     		eors	r3, r2
 148 0028 0B80     		strh	r3, [r1, #0]
 149 002a 30BD     		pop	{r4, r5, pc}
 150              		
 151              	@ 0 "" 2
  34:speck3264.c   ****         "nop\n\t"
  35:speck3264.c   ****         "push	{r4, r5, lr}\n\t"
  36:speck3264.c   ****         "ldrh	r5, [r0, #0]\n\t"
  37:speck3264.c   ****         "ldrh	r4, [r1, #0]\n\t"
  38:speck3264.c   ****         "lsls	r3, r5, #9\n\t"
  39:speck3264.c   ****         "orr.w	r3, r3, r5, lsr #7\n\t"
  40:speck3264.c   ****         "uxth	r3, r3\n\t"
  41:speck3264.c   ****         "strh	r3, [r0, #0]\n\t"
  42:speck3264.c   ****         "ldrh	r5, [r1, #0]\n\t"
  43:speck3264.c   ****         "add	r3, r5\n\t"
  44:speck3264.c   ****         "eors	r2, r3\n\t"
  45:speck3264.c   ****         "lsls	r3, r4, #2\n\t"
  46:speck3264.c   ****         "orr.w	r3, r3, r4, lsr #14\n\t"
  47:speck3264.c   ****         "uxth	r3, r3\n\t"
  48:speck3264.c   ****         "strh	r2, [r0, #0]\n\t"
  49:speck3264.c   ****         "strh	r3, [r1, #0]\n\t"
  50:speck3264.c   ****         "ldrh	r2, [r0, #0]\n\t"
  51:speck3264.c   ****         "eors	r3, r2\n\t"
  52:speck3264.c   ****         "strh	r3, [r1, #0]\n\t"
  53:speck3264.c   ****         "pop	{r4, r5, pc}\n\t"
  54:speck3264.c   ****     );
  55:speck3264.c   **** 
  56:speck3264.c   **** }
 152              		.loc 1 56 1 is_stmt 0 view .LVU33
 153              		.thumb
 154              		.syntax unified
 155 002c 7047     		bx	lr
 156              		.cfi_endproc
 157              	.LFE4:
 159              		.section	.text.Words16ToBytes,"ax",%progbits
 160              		.align	1
 161              		.global	Words16ToBytes
 162              		.syntax unified
 163              		.thumb
 164              		.thumb_func
 165              		.fpu softvfp
 167              	Words16ToBytes:
 168              	.LVL10:
 169              	.LFB5:
  57:speck3264.c   **** #endif
  58:speck3264.c   **** 
  59:speck3264.c   **** 
  60:speck3264.c   **** void Words16ToBytes(u16 words[],u8 bytes[],int numwords)
  61:speck3264.c   **** {
 170              		.loc 1 61 1 is_stmt 1 view -0
 171              		.cfi_startproc
 172              		@ args = 0, pretend = 0, frame = 0
 173              		@ frame_needed = 0, uses_anonymous_args = 0
  62:speck3264.c   ****     int i,j=0;
 174              		.loc 1 62 5 view .LVU35
  63:speck3264.c   ****     for(i=0;i<numwords;i++){
 175              		.loc 1 63 5 view .LVU36
  61:speck3264.c   ****     int i,j=0;
 176              		.loc 1 61 1 is_stmt 0 view .LVU37
 177 0000 30B5     		push	{r4, r5, lr}
 178              	.LCFI1:
 179              		.cfi_def_cfa_offset 12
 180              		.cfi_offset 4, -12
 181              		.cfi_offset 5, -8
 182              		.cfi_offset 14, -4
 183 0002 0238     		subs	r0, r0, #2
 184              	.LVL11:
 185              		.loc 1 63 10 view .LVU38
 186 0004 0023     		movs	r3, #0
  64:speck3264.c   ****         bytes[j]=(u8)words[i];
  65:speck3264.c   ****         bytes[j+1]=(u8)(words[i]>>8);
 187              		.loc 1 65 19 view .LVU39
 188 0006 4D1C     		adds	r5, r1, #1
 189              	.LVL12:
 190              	.L6:
  63:speck3264.c   ****         bytes[j]=(u8)words[i];
 191              		.loc 1 63 14 is_stmt 1 discriminator 1 view .LVU40
 192 0008 9342     		cmp	r3, r2
 193 000a 00DB     		blt	.L7
  66:speck3264.c   ****         j+=2;
  67:speck3264.c   ****     }
  68:speck3264.c   **** }
 194              		.loc 1 68 1 is_stmt 0 view .LVU41
 195 000c 30BD     		pop	{r4, r5, pc}
 196              	.L7:
  64:speck3264.c   ****         bytes[j+1]=(u8)(words[i]>>8);
 197              		.loc 1 64 9 is_stmt 1 discriminator 3 view .LVU42
  64:speck3264.c   ****         bytes[j+1]=(u8)(words[i]>>8);
 198              		.loc 1 64 18 is_stmt 0 discriminator 3 view .LVU43
 199 000e 30F8024F 		ldrh	r4, [r0, #2]!
 200              	.LVL13:
  64:speck3264.c   ****         bytes[j+1]=(u8)(words[i]>>8);
 201              		.loc 1 64 18 discriminator 3 view .LVU44
 202 0012 01F81340 		strb	r4, [r1, r3, lsl #1]
  65:speck3264.c   ****         j+=2;
 203              		.loc 1 65 9 is_stmt 1 discriminator 3 view .LVU45
  65:speck3264.c   ****         j+=2;
 204              		.loc 1 65 20 is_stmt 0 discriminator 3 view .LVU46
 205 0016 0488     		ldrh	r4, [r0]
 206 0018 240A     		lsrs	r4, r4, #8
 207 001a 05F81340 		strb	r4, [r5, r3, lsl #1]
  66:speck3264.c   ****         j+=2;
 208              		.loc 1 66 9 is_stmt 1 discriminator 3 view .LVU47
 209              	.LVL14:
  63:speck3264.c   ****         bytes[j]=(u8)words[i];
 210              		.loc 1 63 25 discriminator 3 view .LVU48
 211 001e 0133     		adds	r3, r3, #1
 212              	.LVL15:
  63:speck3264.c   ****         bytes[j]=(u8)words[i];
 213              		.loc 1 63 25 is_stmt 0 discriminator 3 view .LVU49
 214 0020 F2E7     		b	.L6
 215              		.cfi_endproc
 216              	.LFE5:
 218              		.section	.text.BytesToWords16,"ax",%progbits
 219              		.align	1
 220              		.global	BytesToWords16
 221              		.syntax unified
 222              		.thumb
 223              		.thumb_func
 224              		.fpu softvfp
 226              	BytesToWords16:
 227              	.LVL16:
 228              	.LFB6:
  69:speck3264.c   **** 
  70:speck3264.c   **** void BytesToWords16(u8 bytes[],u16 words[],int numbytes)
  71:speck3264.c   **** {
 229              		.loc 1 71 1 is_stmt 1 view -0
 230              		.cfi_startproc
 231              		@ args = 0, pretend = 0, frame = 0
 232              		@ frame_needed = 0, uses_anonymous_args = 0
  72:speck3264.c   ****     int i,j=0; for(i=0;i<numbytes/2;i++){
 233              		.loc 1 72 5 view .LVU51
 234              		.loc 1 72 16 view .LVU52
 235              		.loc 1 72 34 is_stmt 0 view .LVU53
 236 0000 02EBD272 		add	r2, r2, r2, lsr #31
 237              	.LVL17:
  71:speck3264.c   ****     int i,j=0; for(i=0;i<numbytes/2;i++){
 238              		.loc 1 71 1 view .LVU54
 239 0004 70B5     		push	{r4, r5, r6, lr}
 240              	.LCFI2:
 241              		.cfi_def_cfa_offset 16
 242              		.cfi_offset 4, -16
 243              		.cfi_offset 5, -12
 244              		.cfi_offset 6, -8
 245              		.cfi_offset 14, -4
 246              		.loc 1 72 34 view .LVU55
 247 0006 5210     		asrs	r2, r2, #1
 248              		.loc 1 72 21 view .LVU56
 249 0008 0023     		movs	r3, #0
  73:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 250              		.loc 1 73 45 view .LVU57
 251 000a 451C     		adds	r5, r0, #1
 252              	.LVL18:
 253              	.L9:
  72:speck3264.c   ****     int i,j=0; for(i=0;i<numbytes/2;i++){
 254              		.loc 1 72 25 is_stmt 1 discriminator 1 view .LVU58
 255 000c 9A42     		cmp	r2, r3
 256 000e 00DC     		bgt	.L10
  74:speck3264.c   ****         j+=2;
  75:speck3264.c   ****     }
  76:speck3264.c   **** }
 257              		.loc 1 76 1 is_stmt 0 view .LVU59
 258 0010 70BD     		pop	{r4, r5, r6, pc}
 259              	.L10:
  73:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 260              		.loc 1 73 9 is_stmt 1 discriminator 3 view .LVU60
  73:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 261              		.loc 1 73 35 is_stmt 0 discriminator 3 view .LVU61
 262 0012 15F81360 		ldrb	r6, [r5, r3, lsl #1]	@ zero_extendqisi2
  73:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 263              		.loc 1 73 28 discriminator 3 view .LVU62
 264 0016 10F81340 		ldrb	r4, [r0, r3, lsl #1]	@ zero_extendqisi2
  73:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 265              		.loc 1 73 32 discriminator 3 view .LVU63
 266 001a 44EA0624 		orr	r4, r4, r6, lsl #8
  73:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 267              		.loc 1 73 17 discriminator 3 view .LVU64
 268 001e 21F81340 		strh	r4, [r1, r3, lsl #1]	@ movhi
  74:speck3264.c   ****         j+=2;
 269              		.loc 1 74 9 is_stmt 1 discriminator 3 view .LVU65
 270              	.LVL19:
  72:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 271              		.loc 1 72 38 discriminator 3 view .LVU66
 272 0022 0133     		adds	r3, r3, #1
 273              	.LVL20:
  72:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 274              		.loc 1 72 38 is_stmt 0 discriminator 3 view .LVU67
 275 0024 F2E7     		b	.L9
 276              		.cfi_endproc
 277              	.LFE6:
 279              		.section	.text.Speck3264KeySchedule,"ax",%progbits
 280              		.align	1
 281              		.global	Speck3264KeySchedule
 282              		.syntax unified
 283              		.thumb
 284              		.thumb_func
 285              		.fpu softvfp
 287              	Speck3264KeySchedule:
 288              	.LVL21:
 289              	.LFB7:
  77:speck3264.c   **** 
  78:speck3264.c   **** void Speck3264KeySchedule(u16 K[],u16 rk[])
  79:speck3264.c   **** {
 290              		.loc 1 79 1 is_stmt 1 view -0
 291              		.cfi_startproc
 292              		@ args = 0, pretend = 0, frame = 8
 293              		@ frame_needed = 0, uses_anonymous_args = 0
  80:speck3264.c   ****     u16 i,D=K[3],C=K[2],B=K[1],A=K[0];
 294              		.loc 1 80 5 view .LVU69
  79:speck3264.c   ****     u16 i,D=K[3],C=K[2],B=K[1],A=K[0];
 295              		.loc 1 79 1 is_stmt 0 view .LVU70
 296 0000 F7B5     		push	{r0, r1, r2, r4, r5, r6, r7, lr}
 297              	.LCFI3:
 298              		.cfi_def_cfa_offset 32
 299              		.cfi_offset 4, -20
 300              		.cfi_offset 5, -16
 301              		.cfi_offset 6, -12
 302              		.cfi_offset 7, -8
 303              		.cfi_offset 14, -4
 304              		.loc 1 80 11 view .LVU71
 305 0002 C388     		ldrh	r3, [r0, #6]
 306 0004 ADF80030 		strh	r3, [sp]	@ movhi
 307              		.loc 1 80 18 view .LVU72
 308 0008 8388     		ldrh	r3, [r0, #4]
 309 000a ADF80230 		strh	r3, [sp, #2]	@ movhi
 310              		.loc 1 80 25 view .LVU73
 311 000e 4388     		ldrh	r3, [r0, #2]
 312 0010 ADF80430 		strh	r3, [sp, #4]	@ movhi
 313              		.loc 1 80 32 view .LVU74
 314 0014 0388     		ldrh	r3, [r0]
 315 0016 ADF80630 		strh	r3, [sp, #6]	@ movhi
  81:speck3264.c   **** #ifdef ARM
  82:speck3264.c   ****     for(i=0;i<22;){
 316              		.loc 1 82 5 is_stmt 1 view .LVU75
 317              	.LVL22:
 318              		.loc 1 82 14 view .LVU76
  79:speck3264.c   ****     u16 i,D=K[3],C=K[2],B=K[1],A=K[0];
 319              		.loc 1 79 1 is_stmt 0 view .LVU77
 320 001a 0E46     		mov	r6, r1
  80:speck3264.c   **** #ifdef ARM
 321              		.loc 1 80 32 view .LVU78
 322 001c 0024     		movs	r4, #0
  83:speck3264.c   ****         rk[i]=A;
  84:speck3264.c   ****         //ER16(B,A,i++);
  85:speck3264.c   ****         FuncER16(&B,&A,i++);
  86:speck3264.c   ****         rk[i]=A;
 323              		.loc 1 86 14 view .LVU79
 324 001e 8F1C     		adds	r7, r1, #2
 325              	.LVL23:
 326              	.L12:
 327              		.loc 1 86 14 view .LVU80
 328 0020 A5B2     		uxth	r5, r4
 329              	.LVL24:
  83:speck3264.c   ****         rk[i]=A;
 330              		.loc 1 83 9 is_stmt 1 view .LVU81
  83:speck3264.c   ****         rk[i]=A;
 331              		.loc 1 83 14 is_stmt 0 view .LVU82
 332 0022 BDF80630 		ldrh	r3, [sp, #6]
 333 0026 26F81430 		strh	r3, [r6, r4, lsl #1]	@ movhi
  85:speck3264.c   ****         rk[i]=A;
 334              		.loc 1 85 9 is_stmt 1 view .LVU83
 335              	.LVL25:
  85:speck3264.c   ****         rk[i]=A;
 336              		.loc 1 85 9 is_stmt 0 view .LVU84
 337 002a 2A46     		mov	r2, r5
 338 002c 0DF10601 		add	r1, sp, #6
 339 0030 01A8     		add	r0, sp, #4
 340 0032 FFF7FEFF 		bl	FuncER16
 341              	.LVL26:
 342              		.loc 1 86 9 is_stmt 1 view .LVU85
 343              		.loc 1 86 14 is_stmt 0 view .LVU86
 344 0036 BDF80630 		ldrh	r3, [sp, #6]
 345 003a 27F81430 		strh	r3, [r7, r4, lsl #1]	@ movhi
  87:speck3264.c   ****         //ER16(C,A,i++);
  88:speck3264.c   ****         FuncER16(&C,&A,i++);
 346              		.loc 1 88 9 is_stmt 1 view .LVU87
 347              	.LVL27:
 348              		.loc 1 88 9 is_stmt 0 view .LVU88
 349 003e 6A1C     		adds	r2, r5, #1
 350 0040 92B2     		uxth	r2, r2
 351 0042 0DF10601 		add	r1, sp, #6
 352 0046 0DF10200 		add	r0, sp, #2
 353 004a FFF7FEFF 		bl	FuncER16
 354              	.LVL28:
  89:speck3264.c   ****         rk[i]=A;
 355              		.loc 1 89 9 is_stmt 1 view .LVU89
 356              		.loc 1 89 14 is_stmt 0 view .LVU90
 357 004e 331D     		adds	r3, r6, #4
 358 0050 BDF80620 		ldrh	r2, [sp, #6]
 359 0054 23F81420 		strh	r2, [r3, r4, lsl #1]	@ movhi
  90:speck3264.c   ****         //ER16(D,A,i++);
  91:speck3264.c   ****         FuncER16(&D,&A,i++);
 360              		.loc 1 91 9 is_stmt 1 view .LVU91
 361              	.LVL29:
 362              		.loc 1 91 9 is_stmt 0 view .LVU92
 363 0058 AA1C     		adds	r2, r5, #2
 364 005a 92B2     		uxth	r2, r2
 365 005c 0DF10601 		add	r1, sp, #6
 366 0060 6846     		mov	r0, sp
  82:speck3264.c   ****         rk[i]=A;
 367              		.loc 1 82 14 view .LVU93
 368 0062 0334     		adds	r4, r4, #3
 369              	.LVL30:
 370              		.loc 1 91 9 view .LVU94
 371 0064 FFF7FEFF 		bl	FuncER16
 372              	.LVL31:
  82:speck3264.c   ****         rk[i]=A;
 373              		.loc 1 82 14 is_stmt 1 view .LVU95
 374 0068 182C     		cmp	r4, #24
 375 006a D9D1     		bne	.L12
  92:speck3264.c   ****     }
  93:speck3264.c   **** #endif
  94:speck3264.c   **** 
  95:speck3264.c   **** #ifndef ARM
  96:speck3264.c   ****     for(i=0;i<22;){
  97:speck3264.c   **** 
  98:speck3264.c   ****         printf("A = 0x%x ; B = 0x%x ; C = 0x%x ; D = 0x%x\n", A, B, C, D);
  99:speck3264.c   **** 
 100:speck3264.c   ****         rk[i]=A;
 101:speck3264.c   ****         //ER16(B,A,i++);
 102:speck3264.c   ****         FuncER16(&B, &A, i++);
 103:speck3264.c   **** 
 104:speck3264.c   ****         printf("rk[%d] =  0x%x\n", i-1, A);
 105:speck3264.c   **** 
 106:speck3264.c   ****         printf("A = 0x%x ; B = 0x%x ; C = 0x%x ; D = 0x%x\n", A, B, C, D);
 107:speck3264.c   ****         rk[i]=A;
 108:speck3264.c   ****         //ER16(C,A,i++);
 109:speck3264.c   ****         FuncER16(&C, &A, i++);
 110:speck3264.c   ****         printf("rk[%d] =  0x%x\n", i-1, A);
 111:speck3264.c   **** 
 112:speck3264.c   ****         printf("A = 0x%x ; B = 0x%x ; C = 0x%x ; D = 0x%x\n", A, B, C, D);
 113:speck3264.c   ****         rk[i]=A;
 114:speck3264.c   ****         //ER16(D,A,i++);
 115:speck3264.c   ****         FuncER16(&D, &A, i++);
 116:speck3264.c   ****         printf("rk[%d] =  0x%x\n  <- D = 0x%x", i-1, A, D);
 117:speck3264.c   ****         printf("----------------------\n");
 118:speck3264.c   ****     }
 119:speck3264.c   **** #endif
 120:speck3264.c   **** }
 376              		.loc 1 120 1 is_stmt 0 view .LVU96
 377 006c 03B0     		add	sp, sp, #12
 378              	.LCFI4:
 379              		.cfi_def_cfa_offset 20
 380              		@ sp needed
 381 006e F0BD     		pop	{r4, r5, r6, r7, pc}
 382              		.loc 1 120 1 view .LVU97
 383              		.cfi_endproc
 384              	.LFE7:
 386              		.section	.text.Speck3264Encrypt,"ax",%progbits
 387              		.align	1
 388              		.global	Speck3264Encrypt
 389              		.syntax unified
 390              		.thumb
 391              		.thumb_func
 392              		.fpu softvfp
 394              	Speck3264Encrypt:
 395              	.LVL32:
 396              	.LFB8:
 121:speck3264.c   **** 
 122:speck3264.c   **** 
 123:speck3264.c   **** void Speck3264Encrypt(u16 Pt[],u16 Ct[],u16 rk[])
 124:speck3264.c   **** {
 397              		.loc 1 124 1 is_stmt 1 view -0
 398              		.cfi_startproc
 399              		@ args = 0, pretend = 0, frame = 0
 400              		@ frame_needed = 0, uses_anonymous_args = 0
 401              		.loc 1 124 1 is_stmt 0 view .LVU99
 402 0000 F8B5     		push	{r3, r4, r5, r6, r7, lr}
 403              	.LCFI5:
 404              		.cfi_def_cfa_offset 24
 405              		.cfi_offset 3, -24
 406              		.cfi_offset 4, -20
 407              		.cfi_offset 5, -16
 408              		.cfi_offset 6, -12
 409              		.cfi_offset 7, -8
 410              		.cfi_offset 14, -4
 125:speck3264.c   ****     u16 i;
 126:speck3264.c   ****     Ct[0]=Pt[0]; Ct[1]=Pt[1];
 411              		.loc 1 126 13 view .LVU100
 412 0002 0388     		ldrh	r3, [r0]
 413              		.loc 1 126 10 view .LVU101
 414 0004 0B80     		strh	r3, [r1]	@ movhi
 415              		.loc 1 126 23 view .LVU102
 416 0006 0F46     		mov	r7, r1
 417 0008 4388     		ldrh	r3, [r0, #2]
 418 000a 27F8023F 		strh	r3, [r7, #2]!	@ movhi
 124:speck3264.c   ****     u16 i;
 419              		.loc 1 124 1 view .LVU103
 420 000e 0D46     		mov	r5, r1
 125:speck3264.c   ****     u16 i;
 421              		.loc 1 125 5 is_stmt 1 view .LVU104
 422              		.loc 1 126 5 view .LVU105
 423              		.loc 1 126 18 view .LVU106
 127:speck3264.c   **** 
 128:speck3264.c   ****     // full 22  rounds
 129:speck3264.c   ****     for(i=0;i<22;) {
 424              		.loc 1 129 5 view .LVU107
 425              	.LVL33:
 426              		.loc 1 129 14 view .LVU108
 427 0010 961E     		subs	r6, r2, #2
 428 0012 02F12A04 		add	r4, r2, #42
 429              	.LVL34:
 430              	.L15:
 130:speck3264.c   ****         //ER16(Ct[1],Ct[0],rk[i++]);
 131:speck3264.c   **** #ifdef ARM
 132:speck3264.c   ****         //FuncER16_ASM(&Ct[1], &Ct[0],rk[i++]);
 133:speck3264.c   ****         FuncER16(&Ct[1], &Ct[0], rk[i++]);
 431              		.loc 1 133 9 view .LVU109
 432              		.loc 1 133 9 is_stmt 0 view .LVU110
 433 0016 36F8022F 		ldrh	r2, [r6, #2]!
 434              	.LVL35:
 435              		.loc 1 133 9 view .LVU111
 436 001a 2946     		mov	r1, r5
 437 001c 3846     		mov	r0, r7
 438 001e FFF7FEFF 		bl	FuncER16
 439              	.LVL36:
 129:speck3264.c   ****         //ER16(Ct[1],Ct[0],rk[i++]);
 440              		.loc 1 129 14 is_stmt 1 view .LVU112
 441 0022 A642     		cmp	r6, r4
 442 0024 F7D1     		bne	.L15
 134:speck3264.c   **** #else
 135:speck3264.c   ****         FuncER16(&Ct[1], &Ct[0], rk[i++]);
 136:speck3264.c   ****         //ER16(Ct[1],Ct[0],rk[i++]);
 137:speck3264.c   **** #endif
 138:speck3264.c   **** 
 139:speck3264.c   ****     }
 140:speck3264.c   **** }
 443              		.loc 1 140 1 is_stmt 0 view .LVU113
 444 0026 F8BD     		pop	{r3, r4, r5, r6, r7, pc}
 445              		.loc 1 140 1 view .LVU114
 446              		.cfi_endproc
 447              	.LFE8:
 449              		.section	.text.Speck3264Decrypt,"ax",%progbits
 450              		.align	1
 451              		.global	Speck3264Decrypt
 452              		.syntax unified
 453              		.thumb
 454              		.thumb_func
 455              		.fpu softvfp
 457              	Speck3264Decrypt:
 458              	.LVL37:
 459              	.LFB9:
 141:speck3264.c   **** 
 142:speck3264.c   **** 
 143:speck3264.c   **** void Speck3264Decrypt(u16 Pt[],u16 Ct[],u16 rk[])
 144:speck3264.c   **** {
 460              		.loc 1 144 1 is_stmt 1 view -0
 461              		.cfi_startproc
 462              		@ args = 0, pretend = 0, frame = 0
 463              		@ frame_needed = 0, uses_anonymous_args = 0
 145:speck3264.c   ****     int i;
 464              		.loc 1 145 5 view .LVU116
 146:speck3264.c   ****     Pt[0]=Ct[0]; Pt[1]=Ct[1];
 465              		.loc 1 146 5 view .LVU117
 466              		.loc 1 146 13 is_stmt 0 view .LVU118
 467 0000 0B88     		ldrh	r3, [r1]
 468              		.loc 1 146 10 view .LVU119
 469 0002 0380     		strh	r3, [r0]	@ movhi
 470              		.loc 1 146 18 is_stmt 1 view .LVU120
 471              		.loc 1 146 23 is_stmt 0 view .LVU121
 472 0004 4B88     		ldrh	r3, [r1, #2]
 473 0006 4380     		strh	r3, [r0, #2]	@ movhi
 147:speck3264.c   **** 
 148:speck3264.c   ****     for(i=21;i>=0;) DR16(Pt[1],Pt[0],rk[i--]);
 474              		.loc 1 148 5 is_stmt 1 view .LVU122
 475              	.LVL38:
 476              		.loc 1 148 15 view .LVU123
 144:speck3264.c   ****     int i;
 477              		.loc 1 144 1 is_stmt 0 view .LVU124
 478 0008 30B5     		push	{r4, r5, lr}
 479              	.LCFI6:
 480              		.cfi_def_cfa_offset 12
 481              		.cfi_offset 4, -12
 482              		.cfi_offset 5, -8
 483              		.cfi_offset 14, -4
 484 000a 02F12C05 		add	r5, r2, #44
 485              	.LVL39:
 486              	.L18:
 487              		.loc 1 148 21 is_stmt 1 discriminator 3 view .LVU125
 488 000e 4388     		ldrh	r3, [r0, #2]
 489 0010 0488     		ldrh	r4, [r0]
 490 0012 5C40     		eors	r4, r4, r3
 491 0014 A103     		lsls	r1, r4, #14
 492 0016 41EA9401 		orr	r1, r1, r4, lsr #2
 493 001a 89B2     		uxth	r1, r1
 494 001c 0180     		strh	r1, [r0]	@ movhi
 495              		.loc 1 148 21 is_stmt 0 discriminator 3 view .LVU126
 496 001e 35F8024D 		ldrh	r4, [r5, #-2]!
 497 0022 6340     		eors	r3, r3, r4
 498 0024 5B1A     		subs	r3, r3, r1
 499 0026 99B2     		uxth	r1, r3
 500 0028 C3F34623 		ubfx	r3, r3, #9, #7
 501 002c 43EAC113 		orr	r3, r3, r1, lsl #7
 502              		.loc 1 148 15 discriminator 3 view .LVU127
 503 0030 AA42     		cmp	r2, r5
 504              		.loc 1 148 21 discriminator 3 view .LVU128
 505 0032 4380     		strh	r3, [r0, #2]	@ movhi
 506              		.loc 1 148 15 is_stmt 1 discriminator 3 view .LVU129
 507 0034 EBD1     		bne	.L18
 149:speck3264.c   **** }
 508              		.loc 1 149 1 is_stmt 0 view .LVU130
 509 0036 30BD     		pop	{r4, r5, pc}
 510              		.cfi_endproc
 511              	.LFE9:
 513              		.section	.text.Speck3264_EncryptBlock,"ax",%progbits
 514              		.align	1
 515              		.global	Speck3264_EncryptBlock
 516              		.syntax unified
 517              		.thumb
 518              		.thumb_func
 519              		.fpu softvfp
 521              	Speck3264_EncryptBlock:
 522              	.LVL40:
 523              	.LFB10:
 150:speck3264.c   **** 
 151:speck3264.c   **** 
 152:speck3264.c   **** // Add a random byte array
 153:speck3264.c   **** void Speck3264_EncryptBlock(u8 pt[], u8 k[], u8 ct[], u8 rand[]) {
 524              		.loc 1 153 66 is_stmt 1 view -0
 525              		.cfi_startproc
 526              		@ args = 0, pretend = 0, frame = 88
 527              		@ frame_needed = 0, uses_anonymous_args = 0
 154:speck3264.c   **** 
 155:speck3264.c   ****     u16 Pt[2] = {0};
 528              		.loc 1 155 5 view .LVU132
 153:speck3264.c   **** 
 529              		.loc 1 153 66 is_stmt 0 view .LVU133
 530 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
 531              	.LCFI7:
 532              		.cfi_def_cfa_offset 24
 533              		.cfi_offset 4, -24
 534              		.cfi_offset 5, -20
 535              		.cfi_offset 6, -16
 536              		.cfi_offset 7, -12
 537              		.cfi_offset 8, -8
 538              		.cfi_offset 14, -4
 539              		.loc 1 155 9 view .LVU134
 540 0004 0024     		movs	r4, #0
 153:speck3264.c   **** 
 541              		.loc 1 153 66 view .LVU135
 542 0006 96B0     		sub	sp, sp, #88
 543              	.LCFI8:
 544              		.cfi_def_cfa_offset 112
 153:speck3264.c   **** 
 545              		.loc 1 153 66 view .LVU136
 546 0008 8046     		mov	r8, r0
 547 000a 0F46     		mov	r7, r1
 548 000c 1646     		mov	r6, r2
 156:speck3264.c   ****     u16 K[4] = {0};
 157:speck3264.c   ****     u16 rk[34] = {0};
 549              		.loc 1 157 9 view .LVU137
 550 000e 2146     		mov	r1, r4
 551              	.LVL41:
 552              		.loc 1 157 9 view .LVU138
 553 0010 4422     		movs	r2, #68
 554              	.LVL42:
 555              		.loc 1 157 9 view .LVU139
 556 0012 05A8     		add	r0, sp, #20
 557              	.LVL43:
 153:speck3264.c   **** 
 558              		.loc 1 153 66 view .LVU140
 559 0014 1D46     		mov	r5, r3
 156:speck3264.c   ****     u16 K[4] = {0};
 560              		.loc 1 156 9 view .LVU141
 561 0016 CDE90344 		strd	r4, r4, [sp, #12]
 155:speck3264.c   ****     u16 K[4] = {0};
 562              		.loc 1 155 9 view .LVU142
 563 001a 0194     		str	r4, [sp, #4]
 156:speck3264.c   ****     u16 K[4] = {0};
 564              		.loc 1 156 5 is_stmt 1 view .LVU143
 565              		.loc 1 157 5 view .LVU144
 566              		.loc 1 157 9 is_stmt 0 view .LVU145
 567 001c FFF7FEFF 		bl	memset
 568              	.LVL44:
 158:speck3264.c   ****     u16 Ct[2] = {0};
 569              		.loc 1 158 5 is_stmt 1 view .LVU146
 159:speck3264.c   **** 
 160:speck3264.c   ****     BytesToWords16(pt,Pt,8);
 570              		.loc 1 160 5 is_stmt 0 view .LVU147
 571 0020 01A9     		add	r1, sp, #4
 572 0022 4046     		mov	r0, r8
 573 0024 0822     		movs	r2, #8
 158:speck3264.c   ****     u16 Ct[2] = {0};
 574              		.loc 1 158 9 view .LVU148
 575 0026 0294     		str	r4, [sp, #8]
 576              		.loc 1 160 5 is_stmt 1 view .LVU149
 577 0028 FFF7FEFF 		bl	BytesToWords16
 578              	.LVL45:
 161:speck3264.c   ****     BytesToWords16(k,K,16);
 579              		.loc 1 161 5 view .LVU150
 580 002c 03A9     		add	r1, sp, #12
 581 002e 3846     		mov	r0, r7
 582 0030 1022     		movs	r2, #16
 583 0032 FFF7FEFF 		bl	BytesToWords16
 584              	.LVL46:
 162:speck3264.c   **** 
 163:speck3264.c   ****     // copy the random data to the global variable
 164:speck3264.c   ****     memcpy(random_seed, rand, 8);
 585              		.loc 1 164 5 view .LVU151
 586 0036 0B4A     		ldr	r2, .L21
 587 0038 2B68     		ldr	r3, [r5]	@ unaligned
 588 003a 1360     		str	r3, [r2]	@ unaligned
 589 003c 6B68     		ldr	r3, [r5, #4]	@ unaligned
 590 003e 5360     		str	r3, [r2, #4]	@ unaligned
 165:speck3264.c   **** 
 166:speck3264.c   ****     Speck3264KeySchedule(K,rk);
 591              		.loc 1 166 5 view .LVU152
 592 0040 05A9     		add	r1, sp, #20
 593 0042 03A8     		add	r0, sp, #12
 594 0044 FFF7FEFF 		bl	Speck3264KeySchedule
 595              	.LVL47:
 167:speck3264.c   **** 
 168:speck3264.c   **** #ifndef ARM
 169:speck3264.c   ****     // DEBUG Purposes
 170:speck3264.c   ****     for (int i=0; i < 16; i++)
 171:speck3264.c   ****     {
 172:speck3264.c   ****         printf("Key: 0x%x\n", rk[i]);
 173:speck3264.c   ****     }
 174:speck3264.c   **** #endif
 175:speck3264.c   ****     Speck3264Encrypt(Pt,Ct,rk);
 596              		.loc 1 175 5 view .LVU153
 597 0048 05AA     		add	r2, sp, #20
 598 004a 02A9     		add	r1, sp, #8
 599 004c 01A8     		add	r0, sp, #4
 600 004e FFF7FEFF 		bl	Speck3264Encrypt
 601              	.LVL48:
 176:speck3264.c   ****     Words16ToBytes(Ct,ct,2);
 602              		.loc 1 176 5 view .LVU154
 603 0052 0222     		movs	r2, #2
 604 0054 3146     		mov	r1, r6
 605 0056 02A8     		add	r0, sp, #8
 606 0058 FFF7FEFF 		bl	Words16ToBytes
 607              	.LVL49:
 177:speck3264.c   **** }
 608              		.loc 1 177 1 is_stmt 0 view .LVU155
 609 005c 16B0     		add	sp, sp, #88
 610              	.LCFI9:
 611              		.cfi_def_cfa_offset 24
 612              		@ sp needed
 613 005e BDE8F081 		pop	{r4, r5, r6, r7, r8, pc}
 614              	.LVL50:
 615              	.L22:
 616              		.loc 1 177 1 view .LVU156
 617 0062 00BF     		.align	2
 618              	.L21:
 619 0064 00000000 		.word	.LANCHOR0
 620              		.cfi_endproc
 621              	.LFE10:
 623              		.global	random_seed
 624              		.bss
 625              		.set	.LANCHOR0,. + 0
 628              	random_seed:
 629 0000 00000000 		.space	8
 629      00000000 
 630              		.text
 631              	.Letext0:
 632              		.file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
 633              		.file 3 "/usr/arm-none-eabi/include/sys/_stdint.h"
 634              		.file 4 "helper.h"
 635              		.file 5 "<built-in>"
DEFINED SYMBOLS
                            *ABS*:0000000000000000 speck3264.c
     /tmp/ccN3tgDA.s:16     .text.FuncER16:0000000000000000 $t
     /tmp/ccN3tgDA.s:24     .text.FuncER16:0000000000000000 FuncER16
     /tmp/ccN3tgDA.s:107    .text.FuncER16:0000000000000044 $d
     /tmp/ccN3tgDA.s:112    .text.FuncER16_ASM:0000000000000000 $t
     /tmp/ccN3tgDA.s:119    .text.FuncER16_ASM:0000000000000000 FuncER16_ASM
     /tmp/ccN3tgDA.s:160    .text.Words16ToBytes:0000000000000000 $t
     /tmp/ccN3tgDA.s:167    .text.Words16ToBytes:0000000000000000 Words16ToBytes
     /tmp/ccN3tgDA.s:219    .text.BytesToWords16:0000000000000000 $t
     /tmp/ccN3tgDA.s:226    .text.BytesToWords16:0000000000000000 BytesToWords16
     /tmp/ccN3tgDA.s:280    .text.Speck3264KeySchedule:0000000000000000 $t
     /tmp/ccN3tgDA.s:287    .text.Speck3264KeySchedule:0000000000000000 Speck3264KeySchedule
     /tmp/ccN3tgDA.s:387    .text.Speck3264Encrypt:0000000000000000 $t
     /tmp/ccN3tgDA.s:394    .text.Speck3264Encrypt:0000000000000000 Speck3264Encrypt
     /tmp/ccN3tgDA.s:450    .text.Speck3264Decrypt:0000000000000000 $t
     /tmp/ccN3tgDA.s:457    .text.Speck3264Decrypt:0000000000000000 Speck3264Decrypt
     /tmp/ccN3tgDA.s:514    .text.Speck3264_EncryptBlock:0000000000000000 $t
     /tmp/ccN3tgDA.s:521    .text.Speck3264_EncryptBlock:0000000000000000 Speck3264_EncryptBlock
     /tmp/ccN3tgDA.s:619    .text.Speck3264_EncryptBlock:0000000000000064 $d
     /tmp/ccN3tgDA.s:628    .bss:0000000000000000 random_seed
     /tmp/ccN3tgDA.s:629    .bss:0000000000000000 $d

UNDEFINED SYMBOLS
XOR
memset