speck3264.lst 28 KB

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  1. 1 .cpu cortex-m4
  2. 2 .eabi_attribute 20, 1
  3. 3 .eabi_attribute 21, 1
  4. 4 .eabi_attribute 23, 3
  5. 5 .eabi_attribute 24, 1
  6. 6 .eabi_attribute 25, 1
  7. 7 .eabi_attribute 26, 1
  8. 8 .eabi_attribute 30, 4
  9. 9 .eabi_attribute 34, 1
  10. 10 .eabi_attribute 18, 4
  11. 11 .file "speck3264.c"
  12. 12 .text
  13. 13 .Ltext0:
  14. 14 .cfi_sections .debug_frame
  15. 15 .section .text.Words16ToBytes,"ax",%progbits
  16. 16 .align 1
  17. 17 .global Words16ToBytes
  18. 18 .arch armv7e-m
  19. 19 .syntax unified
  20. 20 .thumb
  21. 21 .thumb_func
  22. 22 .fpu softvfp
  23. 24 Words16ToBytes:
  24. 25 .LVL0:
  25. 26 .LFB3:
  26. 27 .file 1 "speck3264.c"
  27. 1:speck3264.c **** #include <stdio.h>
  28. 2:speck3264.c **** #include <stdint.h>
  29. 3:speck3264.c **** #include "speck.h"
  30. 4:speck3264.c ****
  31. 5:speck3264.c ****
  32. 6:speck3264.c **** void Words16ToBytes(u16 words[],u8 bytes[],int numwords)
  33. 7:speck3264.c **** {
  34. 28 .loc 1 7 1 view -0
  35. 29 .cfi_startproc
  36. 30 @ args = 0, pretend = 0, frame = 0
  37. 31 @ frame_needed = 0, uses_anonymous_args = 0
  38. 8:speck3264.c **** int i,j=0;
  39. 32 .loc 1 8 5 view .LVU1
  40. 9:speck3264.c **** for(i=0;i<numwords;i++){
  41. 33 .loc 1 9 5 view .LVU2
  42. 7:speck3264.c **** int i,j=0;
  43. 34 .loc 1 7 1 is_stmt 0 view .LVU3
  44. 35 0000 30B5 push {r4, r5, lr}
  45. 36 .LCFI0:
  46. 37 .cfi_def_cfa_offset 12
  47. 38 .cfi_offset 4, -12
  48. 39 .cfi_offset 5, -8
  49. 40 .cfi_offset 14, -4
  50. 41 0002 0238 subs r0, r0, #2
  51. 42 .LVL1:
  52. 43 .loc 1 9 10 view .LVU4
  53. 44 0004 0023 movs r3, #0
  54. 10:speck3264.c **** bytes[j]=(u8)words[i];
  55. 11:speck3264.c **** bytes[j+1]=(u8)(words[i]>>8);
  56. 45 .loc 1 11 19 view .LVU5
  57. 46 0006 4D1C adds r5, r1, #1
  58. 47 .LVL2:
  59. 48 .L2:
  60. 9:speck3264.c **** bytes[j]=(u8)words[i];
  61. 49 .loc 1 9 14 is_stmt 1 discriminator 1 view .LVU6
  62. 50 0008 9342 cmp r3, r2
  63. 51 000a 00DB blt .L3
  64. 12:speck3264.c **** j+=2;
  65. 13:speck3264.c **** }
  66. 14:speck3264.c **** }
  67. 52 .loc 1 14 1 is_stmt 0 view .LVU7
  68. 53 000c 30BD pop {r4, r5, pc}
  69. 54 .L3:
  70. 10:speck3264.c **** bytes[j+1]=(u8)(words[i]>>8);
  71. 55 .loc 1 10 9 is_stmt 1 discriminator 3 view .LVU8
  72. 10:speck3264.c **** bytes[j+1]=(u8)(words[i]>>8);
  73. 56 .loc 1 10 18 is_stmt 0 discriminator 3 view .LVU9
  74. 57 000e 30F8024F ldrh r4, [r0, #2]!
  75. 58 .LVL3:
  76. 10:speck3264.c **** bytes[j+1]=(u8)(words[i]>>8);
  77. 59 .loc 1 10 18 discriminator 3 view .LVU10
  78. 60 0012 01F81340 strb r4, [r1, r3, lsl #1]
  79. 11:speck3264.c **** j+=2;
  80. 61 .loc 1 11 9 is_stmt 1 discriminator 3 view .LVU11
  81. 11:speck3264.c **** j+=2;
  82. 62 .loc 1 11 20 is_stmt 0 discriminator 3 view .LVU12
  83. 63 0016 0488 ldrh r4, [r0]
  84. 64 0018 240A lsrs r4, r4, #8
  85. 65 001a 05F81340 strb r4, [r5, r3, lsl #1]
  86. 12:speck3264.c **** j+=2;
  87. 66 .loc 1 12 9 is_stmt 1 discriminator 3 view .LVU13
  88. 67 .LVL4:
  89. 9:speck3264.c **** bytes[j]=(u8)words[i];
  90. 68 .loc 1 9 25 discriminator 3 view .LVU14
  91. 69 001e 0133 adds r3, r3, #1
  92. 70 .LVL5:
  93. 9:speck3264.c **** bytes[j]=(u8)words[i];
  94. 71 .loc 1 9 25 is_stmt 0 discriminator 3 view .LVU15
  95. 72 0020 F2E7 b .L2
  96. 73 .cfi_endproc
  97. 74 .LFE3:
  98. 76 .section .text.BytesToWords16,"ax",%progbits
  99. 77 .align 1
  100. 78 .global BytesToWords16
  101. 79 .syntax unified
  102. 80 .thumb
  103. 81 .thumb_func
  104. 82 .fpu softvfp
  105. 84 BytesToWords16:
  106. 85 .LVL6:
  107. 86 .LFB4:
  108. 15:speck3264.c ****
  109. 16:speck3264.c **** void BytesToWords16(u8 bytes[],u16 words[],int numbytes)
  110. 17:speck3264.c **** {
  111. 87 .loc 1 17 1 is_stmt 1 view -0
  112. 88 .cfi_startproc
  113. 89 @ args = 0, pretend = 0, frame = 0
  114. 90 @ frame_needed = 0, uses_anonymous_args = 0
  115. 18:speck3264.c **** int i,j=0; for(i=0;i<numbytes/2;i++){
  116. 91 .loc 1 18 5 view .LVU17
  117. 92 .loc 1 18 16 view .LVU18
  118. 93 .loc 1 18 34 is_stmt 0 view .LVU19
  119. 94 0000 02EBD272 add r2, r2, r2, lsr #31
  120. 95 .LVL7:
  121. 17:speck3264.c **** int i,j=0; for(i=0;i<numbytes/2;i++){
  122. 96 .loc 1 17 1 view .LVU20
  123. 97 0004 70B5 push {r4, r5, r6, lr}
  124. 98 .LCFI1:
  125. 99 .cfi_def_cfa_offset 16
  126. 100 .cfi_offset 4, -16
  127. 101 .cfi_offset 5, -12
  128. 102 .cfi_offset 6, -8
  129. 103 .cfi_offset 14, -4
  130. 104 .loc 1 18 34 view .LVU21
  131. 105 0006 5210 asrs r2, r2, #1
  132. 106 .loc 1 18 21 view .LVU22
  133. 107 0008 0023 movs r3, #0
  134. 19:speck3264.c **** words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
  135. 108 .loc 1 19 45 view .LVU23
  136. 109 000a 451C adds r5, r0, #1
  137. 110 .LVL8:
  138. 111 .L5:
  139. 18:speck3264.c **** int i,j=0; for(i=0;i<numbytes/2;i++){
  140. 112 .loc 1 18 25 is_stmt 1 discriminator 1 view .LVU24
  141. 113 000c 9A42 cmp r2, r3
  142. 114 000e 00DC bgt .L6
  143. 20:speck3264.c **** j+=2;
  144. 21:speck3264.c **** }
  145. 22:speck3264.c **** }
  146. 115 .loc 1 22 1 is_stmt 0 view .LVU25
  147. 116 0010 70BD pop {r4, r5, r6, pc}
  148. 117 .L6:
  149. 19:speck3264.c **** words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
  150. 118 .loc 1 19 9 is_stmt 1 discriminator 3 view .LVU26
  151. 19:speck3264.c **** words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
  152. 119 .loc 1 19 35 is_stmt 0 discriminator 3 view .LVU27
  153. 120 0012 15F81360 ldrb r6, [r5, r3, lsl #1] @ zero_extendqisi2
  154. 19:speck3264.c **** words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
  155. 121 .loc 1 19 28 discriminator 3 view .LVU28
  156. 122 0016 10F81340 ldrb r4, [r0, r3, lsl #1] @ zero_extendqisi2
  157. 19:speck3264.c **** words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
  158. 123 .loc 1 19 32 discriminator 3 view .LVU29
  159. 124 001a 44EA0624 orr r4, r4, r6, lsl #8
  160. 19:speck3264.c **** words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
  161. 125 .loc 1 19 17 discriminator 3 view .LVU30
  162. 126 001e 21F81340 strh r4, [r1, r3, lsl #1] @ movhi
  163. 20:speck3264.c **** j+=2;
  164. 127 .loc 1 20 9 is_stmt 1 discriminator 3 view .LVU31
  165. 128 .LVL9:
  166. 18:speck3264.c **** words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
  167. 129 .loc 1 18 38 discriminator 3 view .LVU32
  168. 130 0022 0133 adds r3, r3, #1
  169. 131 .LVL10:
  170. 18:speck3264.c **** words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
  171. 132 .loc 1 18 38 is_stmt 0 discriminator 3 view .LVU33
  172. 133 0024 F2E7 b .L5
  173. 134 .cfi_endproc
  174. 135 .LFE4:
  175. 137 .section .text.Speck3264KeySchedule,"ax",%progbits
  176. 138 .align 1
  177. 139 .global Speck3264KeySchedule
  178. 140 .syntax unified
  179. 141 .thumb
  180. 142 .thumb_func
  181. 143 .fpu softvfp
  182. 145 Speck3264KeySchedule:
  183. 146 .LVL11:
  184. 147 .LFB5:
  185. 23:speck3264.c ****
  186. 24:speck3264.c **** void Speck3264KeySchedule(u16 K[],u16 rk[])
  187. 25:speck3264.c **** {
  188. 148 .loc 1 25 1 is_stmt 1 view -0
  189. 149 .cfi_startproc
  190. 150 @ args = 0, pretend = 0, frame = 0
  191. 151 @ frame_needed = 0, uses_anonymous_args = 0
  192. 26:speck3264.c **** u16 i,D=K[3],C=K[2],B=K[1],A=K[0];
  193. 152 .loc 1 26 5 view .LVU35
  194. 25:speck3264.c **** u16 i,D=K[3],C=K[2],B=K[1],A=K[0];
  195. 153 .loc 1 25 1 is_stmt 0 view .LVU36
  196. 154 0000 F0B5 push {r4, r5, r6, r7, lr}
  197. 155 .LCFI2:
  198. 156 .cfi_def_cfa_offset 20
  199. 157 .cfi_offset 4, -20
  200. 158 .cfi_offset 5, -16
  201. 159 .cfi_offset 6, -12
  202. 160 .cfi_offset 7, -8
  203. 161 .cfi_offset 14, -4
  204. 162 .loc 1 26 32 view .LVU37
  205. 163 0002 0388 ldrh r3, [r0]
  206. 164 .loc 1 26 11 view .LVU38
  207. 165 0004 C788 ldrh r7, [r0, #6]
  208. 166 .LVL12:
  209. 167 .loc 1 26 18 view .LVU39
  210. 168 0006 8488 ldrh r4, [r0, #4]
  211. 169 .LVL13:
  212. 170 .loc 1 26 25 view .LVU40
  213. 171 0008 4688 ldrh r6, [r0, #2]
  214. 172 .LVL14:
  215. 27:speck3264.c **** for(i=0;i<22;){
  216. 173 .loc 1 27 5 is_stmt 1 view .LVU41
  217. 174 .loc 1 27 14 view .LVU42
  218. 26:speck3264.c **** u16 i,D=K[3],C=K[2],B=K[1],A=K[0];
  219. 175 .loc 1 26 32 is_stmt 0 view .LVU43
  220. 176 000a 0025 movs r5, #0
  221. 177 .LVL15:
  222. 178 .L8:
  223. 28:speck3264.c **** rk[i]=A;
  224. 29:speck3264.c **** ER16(B,A,i++);
  225. 179 .loc 1 29 9 view .LVU44
  226. 180 000c 7202 lsls r2, r6, #9
  227. 181 000e 92B2 uxth r2, r2
  228. 182 0010 42EAD612 orr r2, r2, r6, lsr #7
  229. 183 0014 1A44 add r2, r2, r3
  230. 184 0016 A8B2 uxth r0, r5
  231. 185 .LVL16:
  232. 28:speck3264.c **** rk[i]=A;
  233. 186 .loc 1 28 9 is_stmt 1 view .LVU45
  234. 187 .loc 1 29 9 is_stmt 0 view .LVU46
  235. 188 0018 92B2 uxth r2, r2
  236. 189 001a 82EA0006 eor r6, r2, r0
  237. 190 .LVL17:
  238. 191 .loc 1 29 9 view .LVU47
  239. 192 001e 9A00 lsls r2, r3, #2
  240. 193 0020 92B2 uxth r2, r2
  241. 28:speck3264.c **** rk[i]=A;
  242. 194 .loc 1 28 14 view .LVU48
  243. 195 0022 0B80 strh r3, [r1] @ movhi
  244. 196 .loc 1 29 9 is_stmt 1 view .LVU49
  245. 197 .LVL18:
  246. 198 .loc 1 29 9 is_stmt 0 view .LVU50
  247. 199 0024 42EA9332 orr r2, r2, r3, lsr #14
  248. 200 .LVL19:
  249. 30:speck3264.c **** rk[i]=A;
  250. 31:speck3264.c **** ER16(C,A,i++);
  251. 201 .loc 1 31 9 view .LVU51
  252. 202 0028 6302 lsls r3, r4, #9
  253. 29:speck3264.c **** rk[i]=A;
  254. 203 .loc 1 29 9 view .LVU52
  255. 204 002a 7240 eors r2, r2, r6
  256. 205 .LVL20:
  257. 30:speck3264.c **** rk[i]=A;
  258. 206 .loc 1 30 9 is_stmt 1 view .LVU53
  259. 207 002c 9BB2 uxth r3, r3
  260. 208 .loc 1 31 9 is_stmt 0 view .LVU54
  261. 209 002e 43EAD413 orr r3, r3, r4, lsr #7
  262. 210 0032 4FEA820C lsl ip, r2, #2
  263. 211 0036 1344 add r3, r3, r2
  264. 212 0038 441C adds r4, r0, #1
  265. 213 .LVL21:
  266. 214 .loc 1 31 9 view .LVU55
  267. 215 003a 1FFA8CFC uxth ip, ip
  268. 30:speck3264.c **** rk[i]=A;
  269. 216 .loc 1 30 14 view .LVU56
  270. 217 003e 4A80 strh r2, [r1, #2] @ movhi
  271. 218 .loc 1 31 9 is_stmt 1 view .LVU57
  272. 219 .LVL22:
  273. 220 .loc 1 31 9 is_stmt 0 view .LVU58
  274. 221 0040 5C40 eors r4, r4, r3
  275. 222 0042 4CEA923C orr ip, ip, r2, lsr #14
  276. 32:speck3264.c **** rk[i]=A;
  277. 33:speck3264.c **** ER16(D,A,i++);
  278. 223 .loc 1 33 9 view .LVU59
  279. 224 0046 7A02 lsls r2, r7, #9
  280. 225 .LVL23:
  281. 31:speck3264.c **** rk[i]=A;
  282. 226 .loc 1 31 9 view .LVU60
  283. 227 0048 A4B2 uxth r4, r4
  284. 228 .LVL24:
  285. 31:speck3264.c **** rk[i]=A;
  286. 229 .loc 1 31 9 view .LVU61
  287. 230 004a 92B2 uxth r2, r2
  288. 231 004c 84EA0C0C eor ip, r4, ip
  289. 232 .LVL25:
  290. 32:speck3264.c **** rk[i]=A;
  291. 233 .loc 1 32 9 is_stmt 1 view .LVU62
  292. 234 .loc 1 33 9 is_stmt 0 view .LVU63
  293. 235 0050 42EAD712 orr r2, r2, r7, lsr #7
  294. 236 0054 6244 add r2, r2, ip
  295. 237 0056 0230 adds r0, r0, #2
  296. 238 .LVL26:
  297. 239 .loc 1 33 9 view .LVU64
  298. 240 0058 4FEA8C03 lsl r3, ip, #2
  299. 241 005c 5040 eors r0, r0, r2
  300. 242 .LVL27:
  301. 243 .loc 1 33 9 view .LVU65
  302. 244 005e 9BB2 uxth r3, r3
  303. 27:speck3264.c **** rk[i]=A;
  304. 245 .loc 1 27 14 view .LVU66
  305. 246 0060 0335 adds r5, r5, #3
  306. 247 .LVL28:
  307. 248 .loc 1 33 9 view .LVU67
  308. 249 0062 87B2 uxth r7, r0
  309. 250 .LVL29:
  310. 251 .loc 1 33 9 view .LVU68
  311. 252 0064 43EA9C33 orr r3, r3, ip, lsr #14
  312. 27:speck3264.c **** rk[i]=A;
  313. 253 .loc 1 27 14 view .LVU69
  314. 254 0068 182D cmp r5, #24
  315. 32:speck3264.c **** rk[i]=A;
  316. 255 .loc 1 32 14 view .LVU70
  317. 256 006a A1F804C0 strh ip, [r1, #4] @ movhi
  318. 257 .loc 1 33 9 is_stmt 1 view .LVU71
  319. 258 .LVL30:
  320. 259 .loc 1 33 9 is_stmt 0 view .LVU72
  321. 260 006e 83EA0703 eor r3, r3, r7
  322. 261 .LVL31:
  323. 27:speck3264.c **** rk[i]=A;
  324. 262 .loc 1 27 14 is_stmt 1 view .LVU73
  325. 263 0072 01F10601 add r1, r1, #6
  326. 264 0076 C9D1 bne .L8
  327. 34:speck3264.c **** }
  328. 35:speck3264.c ****
  329. 36:speck3264.c **** /* DEBUG
  330. 37:speck3264.c **** for(i=0;i<22;){
  331. 38:speck3264.c ****
  332. 39:speck3264.c **** printf("A = 0x%x ; B = 0x%x ; C = 0x%x ; D = 0x%x\n", A, B, C, D);
  333. 40:speck3264.c ****
  334. 41:speck3264.c **** rk[i]=A;
  335. 42:speck3264.c **** ER16(B,A,i++);
  336. 43:speck3264.c **** printf("rk[%d] = 0x%x\n", i-1, A);
  337. 44:speck3264.c ****
  338. 45:speck3264.c **** printf("A = 0x%x ; B = 0x%x ; C = 0x%x ; D = 0x%x\n", A, B, C, D);
  339. 46:speck3264.c **** rk[i]=A;
  340. 47:speck3264.c **** ER16(C,A,i++);
  341. 48:speck3264.c **** printf("rk[%d] = 0x%x\n", i-1, A);
  342. 49:speck3264.c ****
  343. 50:speck3264.c **** printf("A = 0x%x ; B = 0x%x ; C = 0x%x ; D = 0x%x\n", A, B, C, D);
  344. 51:speck3264.c **** rk[i]=A;
  345. 52:speck3264.c **** ER16(D,A,i++);
  346. 53:speck3264.c **** printf("rk[%d] = 0x%x\n <- D = 0x%x", i-1, A, D);
  347. 54:speck3264.c **** printf("----------------------\n");
  348. 55:speck3264.c **** }
  349. 56:speck3264.c **** */
  350. 57:speck3264.c **** }
  351. 265 .loc 1 57 1 is_stmt 0 view .LVU74
  352. 266 0078 F0BD pop {r4, r5, r6, r7, pc}
  353. 267 .loc 1 57 1 view .LVU75
  354. 268 .cfi_endproc
  355. 269 .LFE5:
  356. 271 .section .text.Speck3264Encrypt,"ax",%progbits
  357. 272 .align 1
  358. 273 .global Speck3264Encrypt
  359. 274 .syntax unified
  360. 275 .thumb
  361. 276 .thumb_func
  362. 277 .fpu softvfp
  363. 279 Speck3264Encrypt:
  364. 280 .LVL32:
  365. 281 .LFB6:
  366. 58:speck3264.c ****
  367. 59:speck3264.c ****
  368. 60:speck3264.c **** void Speck3264Encrypt(u16 Pt[],u16 Ct[],u16 rk[])
  369. 61:speck3264.c **** {
  370. 282 .loc 1 61 1 is_stmt 1 view -0
  371. 283 .cfi_startproc
  372. 284 @ args = 0, pretend = 0, frame = 0
  373. 285 @ frame_needed = 0, uses_anonymous_args = 0
  374. 62:speck3264.c **** u16 i;
  375. 286 .loc 1 62 5 view .LVU77
  376. 63:speck3264.c **** Ct[0]=Pt[0]; Ct[1]=Pt[1];
  377. 287 .loc 1 63 5 view .LVU78
  378. 288 .loc 1 63 13 is_stmt 0 view .LVU79
  379. 289 0000 0388 ldrh r3, [r0]
  380. 290 .loc 1 63 10 view .LVU80
  381. 291 0002 0B80 strh r3, [r1] @ movhi
  382. 292 .loc 1 63 18 is_stmt 1 view .LVU81
  383. 293 .loc 1 63 23 is_stmt 0 view .LVU82
  384. 294 0004 4388 ldrh r3, [r0, #2]
  385. 295 0006 4B80 strh r3, [r1, #2] @ movhi
  386. 64:speck3264.c ****
  387. 65:speck3264.c **** // full 22 rounds
  388. 66:speck3264.c **** // for(i=0;i<22;) ;
  389. 67:speck3264.c **** //er16(ct[1],ct[0],rk[0]);
  390. 68:speck3264.c **** for(i=0;i<22;) {
  391. 296 .loc 1 68 5 is_stmt 1 view .LVU83
  392. 297 .LVL33:
  393. 298 .loc 1 68 14 view .LVU84
  394. 61:speck3264.c **** u16 i;
  395. 299 .loc 1 61 1 is_stmt 0 view .LVU85
  396. 300 0008 30B5 push {r4, r5, lr}
  397. 301 .LCFI3:
  398. 302 .cfi_def_cfa_offset 12
  399. 303 .cfi_offset 4, -12
  400. 304 .cfi_offset 5, -8
  401. 305 .cfi_offset 14, -4
  402. 306 000a 941E subs r4, r2, #2
  403. 307 000c 2A32 adds r2, r2, #42
  404. 308 .LVL34:
  405. 309 .L11:
  406. 69:speck3264.c **** //er16(ct[1],ct[0],0xdead);
  407. 70:speck3264.c **** ER16(Ct[1],Ct[0],rk[i++]);
  408. 310 .loc 1 70 9 is_stmt 1 view .LVU86
  409. 311 000e 4888 ldrh r0, [r1, #2]
  410. 312 0010 0D88 ldrh r5, [r1]
  411. 313 0012 4302 lsls r3, r0, #9
  412. 314 0014 43EAD013 orr r3, r3, r0, lsr #7
  413. 315 0018 2B44 add r3, r3, r5
  414. 316 001a 9BB2 uxth r3, r3
  415. 317 001c 4B80 strh r3, [r1, #2] @ movhi
  416. 318 .LVL35:
  417. 319 .loc 1 70 9 is_stmt 0 view .LVU87
  418. 320 001e 34F8020F ldrh r0, [r4, #2]!
  419. 321 .LVL36:
  420. 322 .loc 1 70 9 view .LVU88
  421. 323 0022 4340 eors r3, r3, r0
  422. 324 0024 A800 lsls r0, r5, #2
  423. 325 0026 40EA9530 orr r0, r0, r5, lsr #14
  424. 326 002a 4B80 strh r3, [r1, #2] @ movhi
  425. 68:speck3264.c **** //er16(ct[1],ct[0],0xdead);
  426. 327 .loc 1 68 14 view .LVU89
  427. 328 002c A242 cmp r2, r4
  428. 329 .loc 1 70 9 view .LVU90
  429. 330 002e 83EA0003 eor r3, r3, r0
  430. 331 0032 0B80 strh r3, [r1] @ movhi
  431. 68:speck3264.c **** //er16(ct[1],ct[0],0xdead);
  432. 332 .loc 1 68 14 is_stmt 1 view .LVU91
  433. 333 0034 EBD1 bne .L11
  434. 71:speck3264.c **** #ifndef ARM
  435. 72:speck3264.c **** printf("( c1=0x%x, c0=0x%x, k=0x%x )\n", Ct[1], Ct[0], rk[i]);
  436. 73:speck3264.c **** #endif
  437. 74:speck3264.c ****
  438. 75:speck3264.c **** }
  439. 76:speck3264.c **** }
  440. 334 .loc 1 76 1 is_stmt 0 view .LVU92
  441. 335 0036 30BD pop {r4, r5, pc}
  442. 336 .loc 1 76 1 view .LVU93
  443. 337 .cfi_endproc
  444. 338 .LFE6:
  445. 340 .section .text.Speck3264Decrypt,"ax",%progbits
  446. 341 .align 1
  447. 342 .global Speck3264Decrypt
  448. 343 .syntax unified
  449. 344 .thumb
  450. 345 .thumb_func
  451. 346 .fpu softvfp
  452. 348 Speck3264Decrypt:
  453. 349 .LVL37:
  454. 350 .LFB7:
  455. 77:speck3264.c ****
  456. 78:speck3264.c ****
  457. 79:speck3264.c **** void Speck3264Decrypt(u16 Pt[],u16 Ct[],u16 rk[])
  458. 80:speck3264.c **** {
  459. 351 .loc 1 80 1 is_stmt 1 view -0
  460. 352 .cfi_startproc
  461. 353 @ args = 0, pretend = 0, frame = 0
  462. 354 @ frame_needed = 0, uses_anonymous_args = 0
  463. 81:speck3264.c **** int i;
  464. 355 .loc 1 81 5 view .LVU95
  465. 82:speck3264.c **** Pt[0]=Ct[0]; Pt[1]=Ct[1];
  466. 356 .loc 1 82 5 view .LVU96
  467. 357 .loc 1 82 13 is_stmt 0 view .LVU97
  468. 358 0000 0B88 ldrh r3, [r1]
  469. 359 .loc 1 82 10 view .LVU98
  470. 360 0002 0380 strh r3, [r0] @ movhi
  471. 361 .loc 1 82 18 is_stmt 1 view .LVU99
  472. 362 .loc 1 82 23 is_stmt 0 view .LVU100
  473. 363 0004 4B88 ldrh r3, [r1, #2]
  474. 364 0006 4380 strh r3, [r0, #2] @ movhi
  475. 83:speck3264.c ****
  476. 84:speck3264.c **** for(i=21;i>=0;) DR16(Pt[1],Pt[0],rk[i--]);
  477. 365 .loc 1 84 5 is_stmt 1 view .LVU101
  478. 366 .LVL38:
  479. 367 .loc 1 84 15 view .LVU102
  480. 80:speck3264.c **** int i;
  481. 368 .loc 1 80 1 is_stmt 0 view .LVU103
  482. 369 0008 30B5 push {r4, r5, lr}
  483. 370 .LCFI4:
  484. 371 .cfi_def_cfa_offset 12
  485. 372 .cfi_offset 4, -12
  486. 373 .cfi_offset 5, -8
  487. 374 .cfi_offset 14, -4
  488. 375 000a 02F12C05 add r5, r2, #44
  489. 376 .LVL39:
  490. 377 .L14:
  491. 378 .loc 1 84 21 is_stmt 1 discriminator 3 view .LVU104
  492. 379 000e 4388 ldrh r3, [r0, #2]
  493. 380 0010 0488 ldrh r4, [r0]
  494. 381 0012 5C40 eors r4, r4, r3
  495. 382 0014 A103 lsls r1, r4, #14
  496. 383 0016 41EA9401 orr r1, r1, r4, lsr #2
  497. 384 001a 89B2 uxth r1, r1
  498. 385 001c 0180 strh r1, [r0] @ movhi
  499. 386 .loc 1 84 21 is_stmt 0 discriminator 3 view .LVU105
  500. 387 001e 35F8024D ldrh r4, [r5, #-2]!
  501. 388 0022 6340 eors r3, r3, r4
  502. 389 0024 5B1A subs r3, r3, r1
  503. 390 0026 99B2 uxth r1, r3
  504. 391 0028 C3F34623 ubfx r3, r3, #9, #7
  505. 392 002c 43EAC113 orr r3, r3, r1, lsl #7
  506. 393 .loc 1 84 15 discriminator 3 view .LVU106
  507. 394 0030 AA42 cmp r2, r5
  508. 395 .loc 1 84 21 discriminator 3 view .LVU107
  509. 396 0032 4380 strh r3, [r0, #2] @ movhi
  510. 397 .loc 1 84 15 is_stmt 1 discriminator 3 view .LVU108
  511. 398 0034 EBD1 bne .L14
  512. 85:speck3264.c **** }
  513. 399 .loc 1 85 1 is_stmt 0 view .LVU109
  514. 400 0036 30BD pop {r4, r5, pc}
  515. 401 .cfi_endproc
  516. 402 .LFE7:
  517. 404 .section .text.Speck3264_EncryptBlock,"ax",%progbits
  518. 405 .align 1
  519. 406 .global Speck3264_EncryptBlock
  520. 407 .syntax unified
  521. 408 .thumb
  522. 409 .thumb_func
  523. 410 .fpu softvfp
  524. 412 Speck3264_EncryptBlock:
  525. 413 .LVL40:
  526. 414 .LFB8:
  527. 86:speck3264.c ****
  528. 87:speck3264.c ****
  529. 88:speck3264.c **** void Speck3264_EncryptBlock(u8 pt[], u8 k[], u8 ct[]) {
  530. 415 .loc 1 88 55 is_stmt 1 view -0
  531. 416 .cfi_startproc
  532. 417 @ args = 0, pretend = 0, frame = 88
  533. 418 @ frame_needed = 0, uses_anonymous_args = 0
  534. 89:speck3264.c ****
  535. 90:speck3264.c **** u16 Pt[2] = {0};
  536. 419 .loc 1 90 5 view .LVU111
  537. 88:speck3264.c ****
  538. 420 .loc 1 88 55 is_stmt 0 view .LVU112
  539. 421 0000 F0B5 push {r4, r5, r6, r7, lr}
  540. 422 .LCFI5:
  541. 423 .cfi_def_cfa_offset 20
  542. 424 .cfi_offset 4, -20
  543. 425 .cfi_offset 5, -16
  544. 426 .cfi_offset 6, -12
  545. 427 .cfi_offset 7, -8
  546. 428 .cfi_offset 14, -4
  547. 429 .loc 1 90 9 view .LVU113
  548. 430 0002 0024 movs r4, #0
  549. 88:speck3264.c ****
  550. 431 .loc 1 88 55 view .LVU114
  551. 432 0004 97B0 sub sp, sp, #92
  552. 433 .LCFI6:
  553. 434 .cfi_def_cfa_offset 112
  554. 88:speck3264.c ****
  555. 435 .loc 1 88 55 view .LVU115
  556. 436 0006 0746 mov r7, r0
  557. 437 0008 0E46 mov r6, r1
  558. 438 000a 1546 mov r5, r2
  559. 91:speck3264.c **** u16 K[4] = {0};
  560. 92:speck3264.c **** u16 rk[34] = {0};
  561. 439 .loc 1 92 9 view .LVU116
  562. 440 000c 2146 mov r1, r4
  563. 441 .LVL41:
  564. 442 .loc 1 92 9 view .LVU117
  565. 443 000e 4422 movs r2, #68
  566. 444 .LVL42:
  567. 445 .loc 1 92 9 view .LVU118
  568. 446 0010 05A8 add r0, sp, #20
  569. 447 .LVL43:
  570. 91:speck3264.c **** u16 K[4] = {0};
  571. 448 .loc 1 91 9 view .LVU119
  572. 449 0012 CDE90344 strd r4, r4, [sp, #12]
  573. 90:speck3264.c **** u16 K[4] = {0};
  574. 450 .loc 1 90 9 view .LVU120
  575. 451 0016 0194 str r4, [sp, #4]
  576. 91:speck3264.c **** u16 K[4] = {0};
  577. 452 .loc 1 91 5 is_stmt 1 view .LVU121
  578. 453 .loc 1 92 5 view .LVU122
  579. 454 .loc 1 92 9 is_stmt 0 view .LVU123
  580. 455 0018 FFF7FEFF bl memset
  581. 456 .LVL44:
  582. 93:speck3264.c **** u16 Ct[2] = {0};
  583. 457 .loc 1 93 5 is_stmt 1 view .LVU124
  584. 94:speck3264.c ****
  585. 95:speck3264.c **** BytesToWords16(pt,Pt,8);
  586. 458 .loc 1 95 5 is_stmt 0 view .LVU125
  587. 459 001c 01A9 add r1, sp, #4
  588. 460 001e 3846 mov r0, r7
  589. 461 0020 0822 movs r2, #8
  590. 93:speck3264.c **** u16 Ct[2] = {0};
  591. 462 .loc 1 93 9 view .LVU126
  592. 463 0022 0294 str r4, [sp, #8]
  593. 464 .loc 1 95 5 is_stmt 1 view .LVU127
  594. 465 0024 FFF7FEFF bl BytesToWords16
  595. 466 .LVL45:
  596. 96:speck3264.c **** BytesToWords16(k,K,16);
  597. 467 .loc 1 96 5 view .LVU128
  598. 468 0028 1022 movs r2, #16
  599. 469 002a 03A9 add r1, sp, #12
  600. 470 002c 3046 mov r0, r6
  601. 471 002e FFF7FEFF bl BytesToWords16
  602. 472 .LVL46:
  603. 97:speck3264.c ****
  604. 98:speck3264.c ****
  605. 99:speck3264.c **** Speck3264KeySchedule(K,rk);
  606. 473 .loc 1 99 5 view .LVU129
  607. 474 0032 05A9 add r1, sp, #20
  608. 475 0034 03A8 add r0, sp, #12
  609. 476 0036 FFF7FEFF bl Speck3264KeySchedule
  610. 477 .LVL47:
  611. 100:speck3264.c ****
  612. 101:speck3264.c **** // DEBUG Purposes
  613. 102:speck3264.c ****
  614. 103:speck3264.c **** #ifndef ARM
  615. 104:speck3264.c **** for (int i=0; i < 16; i++)
  616. 105:speck3264.c **** {
  617. 106:speck3264.c **** printf("Key: 0x%x\n", rk[i]);
  618. 107:speck3264.c **** }
  619. 108:speck3264.c **** #endif
  620. 109:speck3264.c **** Speck3264Encrypt(Pt,Ct,rk);
  621. 478 .loc 1 109 5 view .LVU130
  622. 479 003a 05AA add r2, sp, #20
  623. 480 003c 02A9 add r1, sp, #8
  624. 481 003e 01A8 add r0, sp, #4
  625. 482 0040 FFF7FEFF bl Speck3264Encrypt
  626. 483 .LVL48:
  627. 110:speck3264.c **** Words16ToBytes(Ct,ct,2);
  628. 484 .loc 1 110 5 view .LVU131
  629. 485 0044 0222 movs r2, #2
  630. 486 0046 2946 mov r1, r5
  631. 487 0048 02A8 add r0, sp, #8
  632. 488 004a FFF7FEFF bl Words16ToBytes
  633. 489 .LVL49:
  634. 111:speck3264.c **** }
  635. 490 .loc 1 111 1 is_stmt 0 view .LVU132
  636. 491 004e 17B0 add sp, sp, #92
  637. 492 .LCFI7:
  638. 493 .cfi_def_cfa_offset 20
  639. 494 @ sp needed
  640. 495 0050 F0BD pop {r4, r5, r6, r7, pc}
  641. 496 .loc 1 111 1 view .LVU133
  642. 497 .cfi_endproc
  643. 498 .LFE8:
  644. 500 .text
  645. 501 .Letext0:
  646. 502 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
  647. 503 .file 3 "/usr/arm-none-eabi/include/sys/_stdint.h"
  648. 504 .file 4 "<built-in>"
  649. DEFINED SYMBOLS
  650. *ABS*:0000000000000000 speck3264.c
  651. /tmp/cc1zOjum.s:16 .text.Words16ToBytes:0000000000000000 $t
  652. /tmp/cc1zOjum.s:24 .text.Words16ToBytes:0000000000000000 Words16ToBytes
  653. /tmp/cc1zOjum.s:77 .text.BytesToWords16:0000000000000000 $t
  654. /tmp/cc1zOjum.s:84 .text.BytesToWords16:0000000000000000 BytesToWords16
  655. /tmp/cc1zOjum.s:138 .text.Speck3264KeySchedule:0000000000000000 $t
  656. /tmp/cc1zOjum.s:145 .text.Speck3264KeySchedule:0000000000000000 Speck3264KeySchedule
  657. /tmp/cc1zOjum.s:272 .text.Speck3264Encrypt:0000000000000000 $t
  658. /tmp/cc1zOjum.s:279 .text.Speck3264Encrypt:0000000000000000 Speck3264Encrypt
  659. /tmp/cc1zOjum.s:341 .text.Speck3264Decrypt:0000000000000000 $t
  660. /tmp/cc1zOjum.s:348 .text.Speck3264Decrypt:0000000000000000 Speck3264Decrypt
  661. /tmp/cc1zOjum.s:405 .text.Speck3264_EncryptBlock:0000000000000000 $t
  662. /tmp/cc1zOjum.s:412 .text.Speck3264_EncryptBlock:0000000000000000 Speck3264_EncryptBlock
  663. UNDEFINED SYMBOLS
  664. memset