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- #ifndef _SAML11_IDAU_COMPONENT_H_
- #define _SAML11_IDAU_COMPONENT_H_
- #define _SAML11_IDAU_COMPONENT_
- #define IDAU_U2803
- #define REV_IDAU 0x100
- #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
- typedef union {
- struct {
- uint8_t :2;
- uint8_t RXN:1;
- uint8_t :5;
- } bit;
- uint8_t reg;
- } IDAU_SECCTRL_Type;
- #endif
- #define IDAU_SECCTRL_OFFSET (0x01)
- #define IDAU_SECCTRL_RESETVALUE _U_(0x03)
- #define IDAU_SECCTRL_RXN_Pos 2
- #define IDAU_SECCTRL_RXN_Msk (_U_(0x1) << IDAU_SECCTRL_RXN_Pos)
- #define IDAU_SECCTRL_RXN IDAU_SECCTRL_RXN_Msk
- #define IDAU_SECCTRL_MASK _U_(0x04)
- #define IDAU_SECCTRL_Msk _U_(0x04)
- #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
- typedef union {
- struct {
- uint32_t BS:8;
- uint32_t BNSC:6;
- uint32_t :2;
- uint32_t BOOTPROT:8;
- uint32_t :8;
- } bit;
- uint32_t reg;
- } IDAU_SCFGB_Type;
- #endif
- #define IDAU_SCFGB_OFFSET (0x04)
- #define IDAU_SCFGB_RESETVALUE _U_(0x00)
- #define IDAU_SCFGB_BS_Pos 0
- #define IDAU_SCFGB_BS_Msk (_U_(0xFF) << IDAU_SCFGB_BS_Pos)
- #define IDAU_SCFGB_BS(value) (IDAU_SCFGB_BS_Msk & ((value) << IDAU_SCFGB_BS_Pos))
- #define IDAU_SCFGB_BNSC_Pos 8
- #define IDAU_SCFGB_BNSC_Msk (_U_(0x3F) << IDAU_SCFGB_BNSC_Pos)
- #define IDAU_SCFGB_BNSC(value) (IDAU_SCFGB_BNSC_Msk & ((value) << IDAU_SCFGB_BNSC_Pos))
- #define IDAU_SCFGB_BOOTPROT_Pos 16
- #define IDAU_SCFGB_BOOTPROT_Msk (_U_(0xFF) << IDAU_SCFGB_BOOTPROT_Pos)
- #define IDAU_SCFGB_BOOTPROT(value) (IDAU_SCFGB_BOOTPROT_Msk & ((value) << IDAU_SCFGB_BOOTPROT_Pos))
- #define IDAU_SCFGB_MASK _U_(0xFF3FFF)
- #define IDAU_SCFGB_Msk _U_(0xFF3FFF)
- #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
- typedef union {
- struct {
- uint32_t AS:8;
- uint32_t ANSC:6;
- uint32_t :2;
- uint32_t DS:4;
- uint32_t :12;
- } bit;
- uint32_t reg;
- } IDAU_SCFGA_Type;
- #endif
- #define IDAU_SCFGA_OFFSET (0x08)
- #define IDAU_SCFGA_RESETVALUE _U_(0x00)
- #define IDAU_SCFGA_AS_Pos 0
- #define IDAU_SCFGA_AS_Msk (_U_(0xFF) << IDAU_SCFGA_AS_Pos)
- #define IDAU_SCFGA_AS(value) (IDAU_SCFGA_AS_Msk & ((value) << IDAU_SCFGA_AS_Pos))
- #define IDAU_SCFGA_ANSC_Pos 8
- #define IDAU_SCFGA_ANSC_Msk (_U_(0x3F) << IDAU_SCFGA_ANSC_Pos)
- #define IDAU_SCFGA_ANSC(value) (IDAU_SCFGA_ANSC_Msk & ((value) << IDAU_SCFGA_ANSC_Pos))
- #define IDAU_SCFGA_DS_Pos 16
- #define IDAU_SCFGA_DS_Msk (_U_(0xF) << IDAU_SCFGA_DS_Pos)
- #define IDAU_SCFGA_DS(value) (IDAU_SCFGA_DS_Msk & ((value) << IDAU_SCFGA_DS_Pos))
- #define IDAU_SCFGA_MASK _U_(0xF3FFF)
- #define IDAU_SCFGA_Msk _U_(0xF3FFF)
- #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
- typedef union {
- struct {
- uint8_t RS:7;
- uint8_t :1;
- } bit;
- uint8_t reg;
- } IDAU_SCFGR_Type;
- #endif
- #define IDAU_SCFGR_OFFSET (0x0C)
- #define IDAU_SCFGR_RESETVALUE _U_(0x00)
- #define IDAU_SCFGR_RS_Pos 0
- #define IDAU_SCFGR_RS_Msk (_U_(0x7F) << IDAU_SCFGR_RS_Pos)
- #define IDAU_SCFGR_RS(value) (IDAU_SCFGR_RS_Msk & ((value) << IDAU_SCFGR_RS_Pos))
- #define IDAU_SCFGR_MASK _U_(0x7F)
- #define IDAU_SCFGR_Msk _U_(0x7F)
- #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
- typedef struct {
- __I uint8_t Reserved1[1];
- __IO IDAU_SECCTRL_Type SECCTRL;
- __I uint8_t Reserved2[2];
- __IO IDAU_SCFGB_Type SCFGB;
- __IO IDAU_SCFGA_Type SCFGA;
- __IO IDAU_SCFGR_Type SCFGR;
- } Idau;
- #endif
- #endif
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