1              		.cpu cortex-m4
   2              		.eabi_attribute 20, 1
   3              		.eabi_attribute 21, 1
   4              		.eabi_attribute 23, 3
   5              		.eabi_attribute 24, 1
   6              		.eabi_attribute 25, 1
   7              		.eabi_attribute 26, 1
   8              		.eabi_attribute 30, 4
   9              		.eabi_attribute 34, 1
  10              		.eabi_attribute 18, 4
  11              		.file	"speck3264.c"
  12              		.text
  13              	.Ltext0:
  14              		.cfi_sections	.debug_frame
  15              		.section	.text.FuncER16,"ax",%progbits
  16              		.align	1
  17              		.global	FuncER16
  18              		.arch armv7e-m
  19              		.syntax unified
  20              		.thumb
  21              		.thumb_func
  22              		.fpu softvfp
  24              	FuncER16:
  25              	.LVL0:
  26              	.LFB3:
  27              		.file 1 "speck3264.c"
   1:speck3264.c   **** #include <stdio.h>
   2:speck3264.c   **** #include <stdint.h>
   3:speck3264.c   **** #include "speck.h"
   4:speck3264.c   **** 
   5:speck3264.c   **** 
   6:speck3264.c   **** // This function is only used for the "x86" Speck compilation and as reference
   7:speck3264.c   **** void FuncER16(u16 *x, u16 *y, u16 k)
   8:speck3264.c   **** {
  28              		.loc 1 8 1 view -0
  29              		.cfi_startproc
  30              		@ args = 0, pretend = 0, frame = 0
  31              		@ frame_needed = 0, uses_anonymous_args = 0
   9:speck3264.c   ****     u16 tmp_x = *x;
  32              		.loc 1 9 5 view .LVU1
   8:speck3264.c   ****     u16 tmp_x = *x;
  33              		.loc 1 8 1 is_stmt 0 view .LVU2
  34 0000 30B5     		push	{r4, r5, lr}
  35              	.LCFI0:
  36              		.cfi_def_cfa_offset 12
  37              		.cfi_offset 4, -12
  38              		.cfi_offset 5, -8
  39              		.cfi_offset 14, -4
  40              		.loc 1 9 9 view .LVU3
  41 0002 0588     		ldrh	r5, [r0]
  42              	.LVL1:
  10:speck3264.c   ****     u16 tmp_y = *y;
  43              		.loc 1 10 5 is_stmt 1 view .LVU4
  44              		.loc 1 10 9 is_stmt 0 view .LVU5
  45 0004 0C88     		ldrh	r4, [r1]
  46              	.LVL2:
  11:speck3264.c   **** 
  12:speck3264.c   ****     *x = (((tmp_x)>>(7)) | ((tmp_x)<<(16-(7))));
  47              		.loc 1 12 5 is_stmt 1 view .LVU6
  48              		.loc 1 12 36 is_stmt 0 view .LVU7
  49 0006 6B02     		lsls	r3, r5, #9
  50              		.loc 1 12 26 view .LVU8
  51 0008 43EAD513 		orr	r3, r3, r5, lsr #7
  52 000c 9BB2     		uxth	r3, r3
  53              		.loc 1 12 8 view .LVU9
  54 000e 0380     		strh	r3, [r0]	@ movhi
  13:speck3264.c   ****     *x += *y;
  55              		.loc 1 13 5 is_stmt 1 view .LVU10
  14:speck3264.c   **** 
  15:speck3264.c   ****     *x = *x ^ k;
  56              		.loc 1 15 5 view .LVU11
  13:speck3264.c   ****     *x += *y;
  57              		.loc 1 13 8 is_stmt 0 view .LVU12
  58 0010 0D88     		ldrh	r5, [r1]
  59              	.LVL3:
  13:speck3264.c   ****     *x += *y;
  60              		.loc 1 13 8 view .LVU13
  61 0012 2B44     		add	r3, r3, r5
  62              		.loc 1 15 8 view .LVU14
  63 0014 5A40     		eors	r2, r2, r3
  64              	.LVL4:
  16:speck3264.c   **** 
  17:speck3264.c   ****     *y = (((tmp_y)<<(2)) | (tmp_y>>(16-(2))));
  65              		.loc 1 17 19 view .LVU15
  66 0016 A300     		lsls	r3, r4, #2
  67              		.loc 1 17 26 view .LVU16
  68 0018 43EA9433 		orr	r3, r3, r4, lsr #14
  69 001c 9BB2     		uxth	r3, r3
  15:speck3264.c   **** 
  70              		.loc 1 15 8 view .LVU17
  71 001e 0280     		strh	r2, [r0]	@ movhi
  72              		.loc 1 17 5 is_stmt 1 view .LVU18
  73              		.loc 1 17 8 is_stmt 0 view .LVU19
  74 0020 0B80     		strh	r3, [r1]	@ movhi
  18:speck3264.c   ****     *y = *y ^ *x;
  75              		.loc 1 18 5 is_stmt 1 view .LVU20
  76              		.loc 1 18 8 is_stmt 0 view .LVU21
  77 0022 0288     		ldrh	r2, [r0]
  78 0024 5340     		eors	r3, r3, r2
  79 0026 0B80     		strh	r3, [r1]	@ movhi
  19:speck3264.c   **** 
  20:speck3264.c   **** }
  80              		.loc 1 20 1 view .LVU22
  81 0028 30BD     		pop	{r4, r5, pc}
  82              		.loc 1 20 1 view .LVU23
  83              		.cfi_endproc
  84              	.LFE3:
  86              		.section	.text.FuncER16_ASM,"ax",%progbits
  87              		.align	1
  88              		.global	FuncER16_ASM
  89              		.syntax unified
  90              		.thumb
  91              		.thumb_func
  92              		.fpu softvfp
  94              	FuncER16_ASM:
  95              	.LVL5:
  96              	.LFB4:
  21:speck3264.c   **** 
  22:speck3264.c   **** 
  23:speck3264.c   **** #ifdef ARM
  24:speck3264.c   **** // This function is used when running on the CW
  25:speck3264.c   **** void FuncER16_ASM(u16 *x, u16 *y, u16 k)
  26:speck3264.c   **** {
  97              		.loc 1 26 1 is_stmt 1 view -0
  98              		.cfi_startproc
  99              		@ args = 0, pretend = 0, frame = 0
 100              		@ frame_needed = 0, uses_anonymous_args = 0
 101              		@ link register save eliminated.
  27:speck3264.c   **** 
  28:speck3264.c   ****     asm volatile (
 102              		.loc 1 28 5 view .LVU25
 103              		.syntax unified
 104              	@ 28 "speck3264.c" 1
 105 0000 00BF     		nop
 106 0002 30B5     		push	{r4, r5, lr}
 107 0004 0588     		ldrh	r5, [r0, #0]
 108 0006 0C88     		ldrh	r4, [r1, #0]
 109 0008 6B02     		lsls	r3, r5, #9
 110 000a 43EAD513 		orr.w	r3, r3, r5, lsr #7
 111 000e 9BB2     		uxth	r3, r3
 112 0010 0380     		strh	r3, [r0, #0]
 113 0012 0D88     		ldrh	r5, [r1, #0]
 114 0014 2B44     		add	r3, r5
 115 0016 5A40     		eors	r2, r3
 116 0018 A300     		lsls	r3, r4, #2
 117 001a 43EA9433 		orr.w	r3, r3, r4, lsr #14
 118 001e 9BB2     		uxth	r3, r3
 119 0020 0280     		strh	r2, [r0, #0]
 120 0022 0B80     		strh	r3, [r1, #0]
 121 0024 0288     		ldrh	r2, [r0, #0]
 122 0026 5340     		eors	r3, r2
 123 0028 0B80     		strh	r3, [r1, #0]
 124 002a 30BD     		pop	{r4, r5, pc}
 125              		
 126              	@ 0 "" 2
  29:speck3264.c   ****         "nop\n\t"
  30:speck3264.c   ****         "push	{r4, r5, lr}\n\t"
  31:speck3264.c   ****         "ldrh	r5, [r0, #0]\n\t"
  32:speck3264.c   ****         "ldrh	r4, [r1, #0]\n\t"
  33:speck3264.c   ****         "lsls	r3, r5, #9\n\t"
  34:speck3264.c   ****         "orr.w	r3, r3, r5, lsr #7\n\t"
  35:speck3264.c   ****         "uxth	r3, r3\n\t"
  36:speck3264.c   ****         "strh	r3, [r0, #0]\n\t"
  37:speck3264.c   ****         "ldrh	r5, [r1, #0]\n\t"
  38:speck3264.c   ****         "add	r3, r5\n\t"
  39:speck3264.c   ****         "eors	r2, r3\n\t"
  40:speck3264.c   ****         "lsls	r3, r4, #2\n\t"
  41:speck3264.c   ****         "orr.w	r3, r3, r4, lsr #14\n\t"
  42:speck3264.c   ****         "uxth	r3, r3\n\t"
  43:speck3264.c   ****         "strh	r2, [r0, #0]\n\t"
  44:speck3264.c   ****         "strh	r3, [r1, #0]\n\t"
  45:speck3264.c   ****         "ldrh	r2, [r0, #0]\n\t"
  46:speck3264.c   ****         "eors	r3, r2\n\t"
  47:speck3264.c   ****         "strh	r3, [r1, #0]\n\t"
  48:speck3264.c   ****         "pop	{r4, r5, pc}\n\t"
  49:speck3264.c   ****     );
  50:speck3264.c   **** 
  51:speck3264.c   **** }
 127              		.loc 1 51 1 is_stmt 0 view .LVU26
 128              		.thumb
 129              		.syntax unified
 130 002c 7047     		bx	lr
 131              		.cfi_endproc
 132              	.LFE4:
 134              		.section	.text.Words16ToBytes,"ax",%progbits
 135              		.align	1
 136              		.global	Words16ToBytes
 137              		.syntax unified
 138              		.thumb
 139              		.thumb_func
 140              		.fpu softvfp
 142              	Words16ToBytes:
 143              	.LVL6:
 144              	.LFB5:
  52:speck3264.c   **** #endif
  53:speck3264.c   **** 
  54:speck3264.c   **** 
  55:speck3264.c   **** void Words16ToBytes(u16 words[],u8 bytes[],int numwords)
  56:speck3264.c   **** {
 145              		.loc 1 56 1 is_stmt 1 view -0
 146              		.cfi_startproc
 147              		@ args = 0, pretend = 0, frame = 0
 148              		@ frame_needed = 0, uses_anonymous_args = 0
  57:speck3264.c   ****     int i,j=0;
 149              		.loc 1 57 5 view .LVU28
  58:speck3264.c   ****     for(i=0;i<numwords;i++){
 150              		.loc 1 58 5 view .LVU29
  56:speck3264.c   ****     int i,j=0;
 151              		.loc 1 56 1 is_stmt 0 view .LVU30
 152 0000 30B5     		push	{r4, r5, lr}
 153              	.LCFI1:
 154              		.cfi_def_cfa_offset 12
 155              		.cfi_offset 4, -12
 156              		.cfi_offset 5, -8
 157              		.cfi_offset 14, -4
 158 0002 0238     		subs	r0, r0, #2
 159              	.LVL7:
 160              		.loc 1 58 10 view .LVU31
 161 0004 0023     		movs	r3, #0
  59:speck3264.c   ****         bytes[j]=(u8)words[i];
  60:speck3264.c   ****         bytes[j+1]=(u8)(words[i]>>8);
 162              		.loc 1 60 19 view .LVU32
 163 0006 4D1C     		adds	r5, r1, #1
 164              	.LVL8:
 165              	.L4:
  58:speck3264.c   ****         bytes[j]=(u8)words[i];
 166              		.loc 1 58 14 is_stmt 1 discriminator 1 view .LVU33
 167 0008 9342     		cmp	r3, r2
 168 000a 00DB     		blt	.L5
  61:speck3264.c   ****         j+=2;
  62:speck3264.c   ****     }
  63:speck3264.c   **** }
 169              		.loc 1 63 1 is_stmt 0 view .LVU34
 170 000c 30BD     		pop	{r4, r5, pc}
 171              	.L5:
  59:speck3264.c   ****         bytes[j+1]=(u8)(words[i]>>8);
 172              		.loc 1 59 9 is_stmt 1 discriminator 3 view .LVU35
  59:speck3264.c   ****         bytes[j+1]=(u8)(words[i]>>8);
 173              		.loc 1 59 18 is_stmt 0 discriminator 3 view .LVU36
 174 000e 30F8024F 		ldrh	r4, [r0, #2]!
 175              	.LVL9:
  59:speck3264.c   ****         bytes[j+1]=(u8)(words[i]>>8);
 176              		.loc 1 59 18 discriminator 3 view .LVU37
 177 0012 01F81340 		strb	r4, [r1, r3, lsl #1]
  60:speck3264.c   ****         j+=2;
 178              		.loc 1 60 9 is_stmt 1 discriminator 3 view .LVU38
  60:speck3264.c   ****         j+=2;
 179              		.loc 1 60 20 is_stmt 0 discriminator 3 view .LVU39
 180 0016 0488     		ldrh	r4, [r0]
 181 0018 240A     		lsrs	r4, r4, #8
 182 001a 05F81340 		strb	r4, [r5, r3, lsl #1]
  61:speck3264.c   ****         j+=2;
 183              		.loc 1 61 9 is_stmt 1 discriminator 3 view .LVU40
 184              	.LVL10:
  58:speck3264.c   ****         bytes[j]=(u8)words[i];
 185              		.loc 1 58 25 discriminator 3 view .LVU41
 186 001e 0133     		adds	r3, r3, #1
 187              	.LVL11:
  58:speck3264.c   ****         bytes[j]=(u8)words[i];
 188              		.loc 1 58 25 is_stmt 0 discriminator 3 view .LVU42
 189 0020 F2E7     		b	.L4
 190              		.cfi_endproc
 191              	.LFE5:
 193              		.section	.text.BytesToWords16,"ax",%progbits
 194              		.align	1
 195              		.global	BytesToWords16
 196              		.syntax unified
 197              		.thumb
 198              		.thumb_func
 199              		.fpu softvfp
 201              	BytesToWords16:
 202              	.LVL12:
 203              	.LFB6:
  64:speck3264.c   **** 
  65:speck3264.c   **** void BytesToWords16(u8 bytes[],u16 words[],int numbytes)
  66:speck3264.c   **** {
 204              		.loc 1 66 1 is_stmt 1 view -0
 205              		.cfi_startproc
 206              		@ args = 0, pretend = 0, frame = 0
 207              		@ frame_needed = 0, uses_anonymous_args = 0
  67:speck3264.c   ****     int i,j=0; for(i=0;i<numbytes/2;i++){
 208              		.loc 1 67 5 view .LVU44
 209              		.loc 1 67 16 view .LVU45
 210              		.loc 1 67 34 is_stmt 0 view .LVU46
 211 0000 02EBD272 		add	r2, r2, r2, lsr #31
 212              	.LVL13:
  66:speck3264.c   ****     int i,j=0; for(i=0;i<numbytes/2;i++){
 213              		.loc 1 66 1 view .LVU47
 214 0004 70B5     		push	{r4, r5, r6, lr}
 215              	.LCFI2:
 216              		.cfi_def_cfa_offset 16
 217              		.cfi_offset 4, -16
 218              		.cfi_offset 5, -12
 219              		.cfi_offset 6, -8
 220              		.cfi_offset 14, -4
 221              		.loc 1 67 34 view .LVU48
 222 0006 5210     		asrs	r2, r2, #1
 223              		.loc 1 67 21 view .LVU49
 224 0008 0023     		movs	r3, #0
  68:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 225              		.loc 1 68 45 view .LVU50
 226 000a 451C     		adds	r5, r0, #1
 227              	.LVL14:
 228              	.L7:
  67:speck3264.c   ****     int i,j=0; for(i=0;i<numbytes/2;i++){
 229              		.loc 1 67 25 is_stmt 1 discriminator 1 view .LVU51
 230 000c 9A42     		cmp	r2, r3
 231 000e 00DC     		bgt	.L8
  69:speck3264.c   ****         j+=2;
  70:speck3264.c   ****     }
  71:speck3264.c   **** }
 232              		.loc 1 71 1 is_stmt 0 view .LVU52
 233 0010 70BD     		pop	{r4, r5, r6, pc}
 234              	.L8:
  68:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 235              		.loc 1 68 9 is_stmt 1 discriminator 3 view .LVU53
  68:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 236              		.loc 1 68 35 is_stmt 0 discriminator 3 view .LVU54
 237 0012 15F81360 		ldrb	r6, [r5, r3, lsl #1]	@ zero_extendqisi2
  68:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 238              		.loc 1 68 28 discriminator 3 view .LVU55
 239 0016 10F81340 		ldrb	r4, [r0, r3, lsl #1]	@ zero_extendqisi2
  68:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 240              		.loc 1 68 32 discriminator 3 view .LVU56
 241 001a 44EA0624 		orr	r4, r4, r6, lsl #8
  68:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 242              		.loc 1 68 17 discriminator 3 view .LVU57
 243 001e 21F81340 		strh	r4, [r1, r3, lsl #1]	@ movhi
  69:speck3264.c   ****         j+=2;
 244              		.loc 1 69 9 is_stmt 1 discriminator 3 view .LVU58
 245              	.LVL15:
  67:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 246              		.loc 1 67 38 discriminator 3 view .LVU59
 247 0022 0133     		adds	r3, r3, #1
 248              	.LVL16:
  67:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 249              		.loc 1 67 38 is_stmt 0 discriminator 3 view .LVU60
 250 0024 F2E7     		b	.L7
 251              		.cfi_endproc
 252              	.LFE6:
 254              		.section	.text.Speck3264KeySchedule,"ax",%progbits
 255              		.align	1
 256              		.global	Speck3264KeySchedule
 257              		.syntax unified
 258              		.thumb
 259              		.thumb_func
 260              		.fpu softvfp
 262              	Speck3264KeySchedule:
 263              	.LVL17:
 264              	.LFB7:
  72:speck3264.c   **** 
  73:speck3264.c   **** void Speck3264KeySchedule(u16 K[],u16 rk[])
  74:speck3264.c   **** {
 265              		.loc 1 74 1 is_stmt 1 view -0
 266              		.cfi_startproc
 267              		@ args = 0, pretend = 0, frame = 0
 268              		@ frame_needed = 0, uses_anonymous_args = 0
  75:speck3264.c   ****     u16 i,D=K[3],C=K[2],B=K[1],A=K[0];
 269              		.loc 1 75 5 view .LVU62
  74:speck3264.c   ****     u16 i,D=K[3],C=K[2],B=K[1],A=K[0];
 270              		.loc 1 74 1 is_stmt 0 view .LVU63
 271 0000 F0B5     		push	{r4, r5, r6, r7, lr}
 272              	.LCFI3:
 273              		.cfi_def_cfa_offset 20
 274              		.cfi_offset 4, -20
 275              		.cfi_offset 5, -16
 276              		.cfi_offset 6, -12
 277              		.cfi_offset 7, -8
 278              		.cfi_offset 14, -4
 279              		.loc 1 75 32 view .LVU64
 280 0002 0388     		ldrh	r3, [r0]
 281              		.loc 1 75 11 view .LVU65
 282 0004 C788     		ldrh	r7, [r0, #6]
 283              	.LVL18:
 284              		.loc 1 75 18 view .LVU66
 285 0006 8488     		ldrh	r4, [r0, #4]
 286              	.LVL19:
 287              		.loc 1 75 25 view .LVU67
 288 0008 4688     		ldrh	r6, [r0, #2]
 289              	.LVL20:
  76:speck3264.c   **** #ifdef ARM
  77:speck3264.c   ****     for(i=0;i<22;){
 290              		.loc 1 77 5 is_stmt 1 view .LVU68
 291              		.loc 1 77 14 view .LVU69
  75:speck3264.c   **** #ifdef ARM
 292              		.loc 1 75 32 is_stmt 0 view .LVU70
 293 000a 0025     		movs	r5, #0
 294              	.LVL21:
 295              	.L10:
  78:speck3264.c   ****         rk[i]=A;
  79:speck3264.c   ****         ER16(B,A,i++);
 296              		.loc 1 79 9 view .LVU71
 297 000c 7202     		lsls	r2, r6, #9
 298 000e 92B2     		uxth	r2, r2
 299 0010 42EAD612 		orr	r2, r2, r6, lsr #7
 300 0014 1A44     		add	r2, r2, r3
 301 0016 A8B2     		uxth	r0, r5
 302              	.LVL22:
  78:speck3264.c   ****         rk[i]=A;
 303              		.loc 1 78 9 is_stmt 1 view .LVU72
 304              		.loc 1 79 9 is_stmt 0 view .LVU73
 305 0018 92B2     		uxth	r2, r2
 306 001a 82EA0006 		eor	r6, r2, r0
 307              	.LVL23:
 308              		.loc 1 79 9 view .LVU74
 309 001e 9A00     		lsls	r2, r3, #2
 310 0020 92B2     		uxth	r2, r2
  78:speck3264.c   ****         rk[i]=A;
 311              		.loc 1 78 14 view .LVU75
 312 0022 0B80     		strh	r3, [r1]	@ movhi
 313              		.loc 1 79 9 is_stmt 1 view .LVU76
 314              	.LVL24:
 315              		.loc 1 79 9 is_stmt 0 view .LVU77
 316 0024 42EA9332 		orr	r2, r2, r3, lsr #14
 317              	.LVL25:
  80:speck3264.c   ****         rk[i]=A;
  81:speck3264.c   ****         ER16(C,A,i++);
 318              		.loc 1 81 9 view .LVU78
 319 0028 6302     		lsls	r3, r4, #9
  79:speck3264.c   ****         rk[i]=A;
 320              		.loc 1 79 9 view .LVU79
 321 002a 7240     		eors	r2, r2, r6
 322              	.LVL26:
  80:speck3264.c   ****         rk[i]=A;
 323              		.loc 1 80 9 is_stmt 1 view .LVU80
 324 002c 9BB2     		uxth	r3, r3
 325              		.loc 1 81 9 is_stmt 0 view .LVU81
 326 002e 43EAD413 		orr	r3, r3, r4, lsr #7
 327 0032 4FEA820C 		lsl	ip, r2, #2
 328 0036 1344     		add	r3, r3, r2
 329 0038 441C     		adds	r4, r0, #1
 330              	.LVL27:
 331              		.loc 1 81 9 view .LVU82
 332 003a 1FFA8CFC 		uxth	ip, ip
  80:speck3264.c   ****         rk[i]=A;
 333              		.loc 1 80 14 view .LVU83
 334 003e 4A80     		strh	r2, [r1, #2]	@ movhi
 335              		.loc 1 81 9 is_stmt 1 view .LVU84
 336              	.LVL28:
 337              		.loc 1 81 9 is_stmt 0 view .LVU85
 338 0040 5C40     		eors	r4, r4, r3
 339 0042 4CEA923C 		orr	ip, ip, r2, lsr #14
  82:speck3264.c   ****         rk[i]=A;
  83:speck3264.c   ****         ER16(D,A,i++);
 340              		.loc 1 83 9 view .LVU86
 341 0046 7A02     		lsls	r2, r7, #9
 342              	.LVL29:
  81:speck3264.c   ****         rk[i]=A;
 343              		.loc 1 81 9 view .LVU87
 344 0048 A4B2     		uxth	r4, r4
 345              	.LVL30:
  81:speck3264.c   ****         rk[i]=A;
 346              		.loc 1 81 9 view .LVU88
 347 004a 92B2     		uxth	r2, r2
 348 004c 84EA0C0C 		eor	ip, r4, ip
 349              	.LVL31:
  82:speck3264.c   ****         rk[i]=A;
 350              		.loc 1 82 9 is_stmt 1 view .LVU89
 351              		.loc 1 83 9 is_stmt 0 view .LVU90
 352 0050 42EAD712 		orr	r2, r2, r7, lsr #7
 353 0054 6244     		add	r2, r2, ip
 354 0056 0230     		adds	r0, r0, #2
 355              	.LVL32:
 356              		.loc 1 83 9 view .LVU91
 357 0058 4FEA8C03 		lsl	r3, ip, #2
 358 005c 5040     		eors	r0, r0, r2
 359              	.LVL33:
 360              		.loc 1 83 9 view .LVU92
 361 005e 9BB2     		uxth	r3, r3
  77:speck3264.c   ****         rk[i]=A;
 362              		.loc 1 77 14 view .LVU93
 363 0060 0335     		adds	r5, r5, #3
 364              	.LVL34:
 365              		.loc 1 83 9 view .LVU94
 366 0062 87B2     		uxth	r7, r0
 367              	.LVL35:
 368              		.loc 1 83 9 view .LVU95
 369 0064 43EA9C33 		orr	r3, r3, ip, lsr #14
  77:speck3264.c   ****         rk[i]=A;
 370              		.loc 1 77 14 view .LVU96
 371 0068 182D     		cmp	r5, #24
  82:speck3264.c   ****         rk[i]=A;
 372              		.loc 1 82 14 view .LVU97
 373 006a A1F804C0 		strh	ip, [r1, #4]	@ movhi
 374              		.loc 1 83 9 is_stmt 1 view .LVU98
 375              	.LVL36:
 376              		.loc 1 83 9 is_stmt 0 view .LVU99
 377 006e 83EA0703 		eor	r3, r3, r7
 378              	.LVL37:
  77:speck3264.c   ****         rk[i]=A;
 379              		.loc 1 77 14 is_stmt 1 view .LVU100
 380 0072 01F10601 		add	r1, r1, #6
 381 0076 C9D1     		bne	.L10
  84:speck3264.c   ****     }
  85:speck3264.c   **** #endif
  86:speck3264.c   **** 
  87:speck3264.c   **** #ifndef ARM
  88:speck3264.c   ****     for(i=0;i<22;){
  89:speck3264.c   **** 
  90:speck3264.c   ****         printf("A = 0x%x ; B = 0x%x ; C = 0x%x ; D = 0x%x\n", A, B, C, D);
  91:speck3264.c   **** 
  92:speck3264.c   ****         rk[i]=A;
  93:speck3264.c   ****         ER16(B,A,i++);
  94:speck3264.c   ****         printf("rk[%d] =  0x%x\n", i-1, A);
  95:speck3264.c   **** 
  96:speck3264.c   ****         printf("A = 0x%x ; B = 0x%x ; C = 0x%x ; D = 0x%x\n", A, B, C, D);
  97:speck3264.c   ****         rk[i]=A;
  98:speck3264.c   ****         ER16(C,A,i++);
  99:speck3264.c   ****         printf("rk[%d] =  0x%x\n", i-1, A);
 100:speck3264.c   **** 
 101:speck3264.c   ****         printf("A = 0x%x ; B = 0x%x ; C = 0x%x ; D = 0x%x\n", A, B, C, D);
 102:speck3264.c   ****         rk[i]=A;
 103:speck3264.c   ****         ER16(D,A,i++);
 104:speck3264.c   ****         printf("rk[%d] =  0x%x\n  <- D = 0x%x", i-1, A, D);
 105:speck3264.c   ****         printf("----------------------\n");
 106:speck3264.c   ****     }
 107:speck3264.c   **** #endif
 108:speck3264.c   **** }
 382              		.loc 1 108 1 is_stmt 0 view .LVU101
 383 0078 F0BD     		pop	{r4, r5, r6, r7, pc}
 384              		.loc 1 108 1 view .LVU102
 385              		.cfi_endproc
 386              	.LFE7:
 388              		.section	.text.Speck3264Encrypt,"ax",%progbits
 389              		.align	1
 390              		.global	Speck3264Encrypt
 391              		.syntax unified
 392              		.thumb
 393              		.thumb_func
 394              		.fpu softvfp
 396              	Speck3264Encrypt:
 397              	.LVL38:
 398              	.LFB8:
 109:speck3264.c   **** 
 110:speck3264.c   **** 
 111:speck3264.c   **** void Speck3264Encrypt(u16 Pt[],u16 Ct[],u16 rk[])
 112:speck3264.c   **** {
 399              		.loc 1 112 1 is_stmt 1 view -0
 400              		.cfi_startproc
 401              		@ args = 0, pretend = 0, frame = 0
 402              		@ frame_needed = 0, uses_anonymous_args = 0
 113:speck3264.c   ****     u16 i;
 403              		.loc 1 113 5 view .LVU104
 114:speck3264.c   ****     Ct[0]=Pt[0]; Ct[1]=Pt[1];
 404              		.loc 1 114 5 view .LVU105
 405              		.loc 1 114 13 is_stmt 0 view .LVU106
 406 0000 0388     		ldrh	r3, [r0]
 407              		.loc 1 114 10 view .LVU107
 408 0002 0B80     		strh	r3, [r1]	@ movhi
 409              		.loc 1 114 18 is_stmt 1 view .LVU108
 410              		.loc 1 114 23 is_stmt 0 view .LVU109
 411 0004 4388     		ldrh	r3, [r0, #2]
 412 0006 0846     		mov	r0, r1
 413              	.LVL39:
 112:speck3264.c   ****     u16 i;
 414              		.loc 1 112 1 view .LVU110
 415 0008 10B5     		push	{r4, lr}
 416              	.LCFI4:
 417              		.cfi_def_cfa_offset 8
 418              		.cfi_offset 4, -8
 419              		.cfi_offset 14, -4
 420              		.loc 1 114 23 view .LVU111
 421 000a 20F8023F 		strh	r3, [r0, #2]!	@ movhi
 115:speck3264.c   **** 
 116:speck3264.c   ****     // full 22  rounds
 117:speck3264.c   ****     for(i=0;i<22;) {
 422              		.loc 1 117 5 is_stmt 1 view .LVU112
 423              	.LVL40:
 424              		.loc 1 117 14 view .LVU113
 425 000e 941E     		subs	r4, r2, #2
 426 0010 02F12A03 		add	r3, r2, #42
 427              	.LVL41:
 428              	.L13:
 118:speck3264.c   ****         //ER16(Ct[1],Ct[0],rk[i++]);
 119:speck3264.c   **** #ifdef ARM
 120:speck3264.c   ****         FuncER16_ASM(&Ct[1], &Ct[0],rk[i++]);
 429              		.loc 1 120 9 view .LVU114
 430              		.loc 1 120 9 is_stmt 0 view .LVU115
 431 0014 34F8022F 		ldrh	r2, [r4, #2]!
 432              	.LVL42:
 433              		.loc 1 120 9 view .LVU116
 434 0018 FFF7FEFF 		bl	FuncER16_ASM
 435              	.LVL43:
 117:speck3264.c   ****         //ER16(Ct[1],Ct[0],rk[i++]);
 436              		.loc 1 117 14 is_stmt 1 view .LVU117
 437 001c 9C42     		cmp	r4, r3
 438 001e F9D1     		bne	.L13
 121:speck3264.c   ****         //FuncER16(&Ct[1], &Ct[0], rk[i++]);
 122:speck3264.c   **** #else
 123:speck3264.c   ****         ER16(Ct[1],Ct[0],rk[i++]);
 124:speck3264.c   **** #endif
 125:speck3264.c   **** 
 126:speck3264.c   ****     }
 127:speck3264.c   **** }
 439              		.loc 1 127 1 is_stmt 0 view .LVU118
 440 0020 10BD     		pop	{r4, pc}
 441              		.loc 1 127 1 view .LVU119
 442              		.cfi_endproc
 443              	.LFE8:
 445              		.section	.text.Speck3264Decrypt,"ax",%progbits
 446              		.align	1
 447              		.global	Speck3264Decrypt
 448              		.syntax unified
 449              		.thumb
 450              		.thumb_func
 451              		.fpu softvfp
 453              	Speck3264Decrypt:
 454              	.LVL44:
 455              	.LFB9:
 128:speck3264.c   **** 
 129:speck3264.c   **** 
 130:speck3264.c   **** void Speck3264Decrypt(u16 Pt[],u16 Ct[],u16 rk[])
 131:speck3264.c   **** {
 456              		.loc 1 131 1 is_stmt 1 view -0
 457              		.cfi_startproc
 458              		@ args = 0, pretend = 0, frame = 0
 459              		@ frame_needed = 0, uses_anonymous_args = 0
 132:speck3264.c   ****     int i;
 460              		.loc 1 132 5 view .LVU121
 133:speck3264.c   ****     Pt[0]=Ct[0]; Pt[1]=Ct[1];
 461              		.loc 1 133 5 view .LVU122
 462              		.loc 1 133 13 is_stmt 0 view .LVU123
 463 0000 0B88     		ldrh	r3, [r1]
 464              		.loc 1 133 10 view .LVU124
 465 0002 0380     		strh	r3, [r0]	@ movhi
 466              		.loc 1 133 18 is_stmt 1 view .LVU125
 467              		.loc 1 133 23 is_stmt 0 view .LVU126
 468 0004 4B88     		ldrh	r3, [r1, #2]
 469 0006 4380     		strh	r3, [r0, #2]	@ movhi
 134:speck3264.c   **** 
 135:speck3264.c   ****     for(i=21;i>=0;) DR16(Pt[1],Pt[0],rk[i--]);
 470              		.loc 1 135 5 is_stmt 1 view .LVU127
 471              	.LVL45:
 472              		.loc 1 135 15 view .LVU128
 131:speck3264.c   ****     int i;
 473              		.loc 1 131 1 is_stmt 0 view .LVU129
 474 0008 30B5     		push	{r4, r5, lr}
 475              	.LCFI5:
 476              		.cfi_def_cfa_offset 12
 477              		.cfi_offset 4, -12
 478              		.cfi_offset 5, -8
 479              		.cfi_offset 14, -4
 480 000a 02F12C05 		add	r5, r2, #44
 481              	.LVL46:
 482              	.L16:
 483              		.loc 1 135 21 is_stmt 1 discriminator 3 view .LVU130
 484 000e 4388     		ldrh	r3, [r0, #2]
 485 0010 0488     		ldrh	r4, [r0]
 486 0012 5C40     		eors	r4, r4, r3
 487 0014 A103     		lsls	r1, r4, #14
 488 0016 41EA9401 		orr	r1, r1, r4, lsr #2
 489 001a 89B2     		uxth	r1, r1
 490 001c 0180     		strh	r1, [r0]	@ movhi
 491              		.loc 1 135 21 is_stmt 0 discriminator 3 view .LVU131
 492 001e 35F8024D 		ldrh	r4, [r5, #-2]!
 493 0022 6340     		eors	r3, r3, r4
 494 0024 5B1A     		subs	r3, r3, r1
 495 0026 99B2     		uxth	r1, r3
 496 0028 C3F34623 		ubfx	r3, r3, #9, #7
 497 002c 43EAC113 		orr	r3, r3, r1, lsl #7
 498              		.loc 1 135 15 discriminator 3 view .LVU132
 499 0030 AA42     		cmp	r2, r5
 500              		.loc 1 135 21 discriminator 3 view .LVU133
 501 0032 4380     		strh	r3, [r0, #2]	@ movhi
 502              		.loc 1 135 15 is_stmt 1 discriminator 3 view .LVU134
 503 0034 EBD1     		bne	.L16
 136:speck3264.c   **** }
 504              		.loc 1 136 1 is_stmt 0 view .LVU135
 505 0036 30BD     		pop	{r4, r5, pc}
 506              		.cfi_endproc
 507              	.LFE9:
 509              		.section	.text.Speck3264_EncryptBlock,"ax",%progbits
 510              		.align	1
 511              		.global	Speck3264_EncryptBlock
 512              		.syntax unified
 513              		.thumb
 514              		.thumb_func
 515              		.fpu softvfp
 517              	Speck3264_EncryptBlock:
 518              	.LVL47:
 519              	.LFB10:
 137:speck3264.c   **** 
 138:speck3264.c   **** 
 139:speck3264.c   **** void Speck3264_EncryptBlock(u8 pt[], u8 k[], u8 ct[]) {
 520              		.loc 1 139 55 is_stmt 1 view -0
 521              		.cfi_startproc
 522              		@ args = 0, pretend = 0, frame = 88
 523              		@ frame_needed = 0, uses_anonymous_args = 0
 140:speck3264.c   **** 
 141:speck3264.c   ****     u16 Pt[2] = {0};
 524              		.loc 1 141 5 view .LVU137
 139:speck3264.c   **** 
 525              		.loc 1 139 55 is_stmt 0 view .LVU138
 526 0000 F0B5     		push	{r4, r5, r6, r7, lr}
 527              	.LCFI6:
 528              		.cfi_def_cfa_offset 20
 529              		.cfi_offset 4, -20
 530              		.cfi_offset 5, -16
 531              		.cfi_offset 6, -12
 532              		.cfi_offset 7, -8
 533              		.cfi_offset 14, -4
 534              		.loc 1 141 9 view .LVU139
 535 0002 0024     		movs	r4, #0
 139:speck3264.c   **** 
 536              		.loc 1 139 55 view .LVU140
 537 0004 97B0     		sub	sp, sp, #92
 538              	.LCFI7:
 539              		.cfi_def_cfa_offset 112
 139:speck3264.c   **** 
 540              		.loc 1 139 55 view .LVU141
 541 0006 0746     		mov	r7, r0
 542 0008 0E46     		mov	r6, r1
 543 000a 1546     		mov	r5, r2
 142:speck3264.c   ****     u16 K[4] = {0};
 143:speck3264.c   ****     u16 rk[34] = {0};
 544              		.loc 1 143 9 view .LVU142
 545 000c 2146     		mov	r1, r4
 546              	.LVL48:
 547              		.loc 1 143 9 view .LVU143
 548 000e 4422     		movs	r2, #68
 549              	.LVL49:
 550              		.loc 1 143 9 view .LVU144
 551 0010 05A8     		add	r0, sp, #20
 552              	.LVL50:
 142:speck3264.c   ****     u16 K[4] = {0};
 553              		.loc 1 142 9 view .LVU145
 554 0012 CDE90344 		strd	r4, r4, [sp, #12]
 141:speck3264.c   ****     u16 K[4] = {0};
 555              		.loc 1 141 9 view .LVU146
 556 0016 0194     		str	r4, [sp, #4]
 142:speck3264.c   ****     u16 K[4] = {0};
 557              		.loc 1 142 5 is_stmt 1 view .LVU147
 558              		.loc 1 143 5 view .LVU148
 559              		.loc 1 143 9 is_stmt 0 view .LVU149
 560 0018 FFF7FEFF 		bl	memset
 561              	.LVL51:
 144:speck3264.c   ****     u16 Ct[2] = {0};
 562              		.loc 1 144 5 is_stmt 1 view .LVU150
 145:speck3264.c   **** 
 146:speck3264.c   ****     BytesToWords16(pt,Pt,8);
 563              		.loc 1 146 5 is_stmt 0 view .LVU151
 564 001c 01A9     		add	r1, sp, #4
 565 001e 3846     		mov	r0, r7
 566 0020 0822     		movs	r2, #8
 144:speck3264.c   ****     u16 Ct[2] = {0};
 567              		.loc 1 144 9 view .LVU152
 568 0022 0294     		str	r4, [sp, #8]
 569              		.loc 1 146 5 is_stmt 1 view .LVU153
 570 0024 FFF7FEFF 		bl	BytesToWords16
 571              	.LVL52:
 147:speck3264.c   ****     BytesToWords16(k,K,16);
 572              		.loc 1 147 5 view .LVU154
 573 0028 1022     		movs	r2, #16
 574 002a 03A9     		add	r1, sp, #12
 575 002c 3046     		mov	r0, r6
 576 002e FFF7FEFF 		bl	BytesToWords16
 577              	.LVL53:
 148:speck3264.c   **** 
 149:speck3264.c   **** 
 150:speck3264.c   ****     Speck3264KeySchedule(K,rk);
 578              		.loc 1 150 5 view .LVU155
 579 0032 05A9     		add	r1, sp, #20
 580 0034 03A8     		add	r0, sp, #12
 581 0036 FFF7FEFF 		bl	Speck3264KeySchedule
 582              	.LVL54:
 151:speck3264.c   **** 
 152:speck3264.c   **** #ifndef ARM
 153:speck3264.c   ****     // DEBUG Purposes
 154:speck3264.c   ****     for (int i=0; i < 16; i++)
 155:speck3264.c   ****     {
 156:speck3264.c   ****         printf("Key: 0x%x\n", rk[i]);
 157:speck3264.c   ****     }
 158:speck3264.c   **** #endif
 159:speck3264.c   ****     Speck3264Encrypt(Pt,Ct,rk);
 583              		.loc 1 159 5 view .LVU156
 584 003a 05AA     		add	r2, sp, #20
 585 003c 02A9     		add	r1, sp, #8
 586 003e 01A8     		add	r0, sp, #4
 587 0040 FFF7FEFF 		bl	Speck3264Encrypt
 588              	.LVL55:
 160:speck3264.c   ****     Words16ToBytes(Ct,ct,2);
 589              		.loc 1 160 5 view .LVU157
 590 0044 0222     		movs	r2, #2
 591 0046 2946     		mov	r1, r5
 592 0048 02A8     		add	r0, sp, #8
 593 004a FFF7FEFF 		bl	Words16ToBytes
 594              	.LVL56:
 161:speck3264.c   **** }
 595              		.loc 1 161 1 is_stmt 0 view .LVU158
 596 004e 17B0     		add	sp, sp, #92
 597              	.LCFI8:
 598              		.cfi_def_cfa_offset 20
 599              		@ sp needed
 600 0050 F0BD     		pop	{r4, r5, r6, r7, pc}
 601              		.loc 1 161 1 view .LVU159
 602              		.cfi_endproc
 603              	.LFE10:
 605              		.text
 606              	.Letext0:
 607              		.file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
 608              		.file 3 "/usr/arm-none-eabi/include/sys/_stdint.h"
 609              		.file 4 "<built-in>"
DEFINED SYMBOLS
                            *ABS*:0000000000000000 speck3264.c
     /tmp/cc3Lq9np.s:16     .text.FuncER16:0000000000000000 $t
     /tmp/cc3Lq9np.s:24     .text.FuncER16:0000000000000000 FuncER16
     /tmp/cc3Lq9np.s:87     .text.FuncER16_ASM:0000000000000000 $t
     /tmp/cc3Lq9np.s:94     .text.FuncER16_ASM:0000000000000000 FuncER16_ASM
     /tmp/cc3Lq9np.s:135    .text.Words16ToBytes:0000000000000000 $t
     /tmp/cc3Lq9np.s:142    .text.Words16ToBytes:0000000000000000 Words16ToBytes
     /tmp/cc3Lq9np.s:194    .text.BytesToWords16:0000000000000000 $t
     /tmp/cc3Lq9np.s:201    .text.BytesToWords16:0000000000000000 BytesToWords16
     /tmp/cc3Lq9np.s:255    .text.Speck3264KeySchedule:0000000000000000 $t
     /tmp/cc3Lq9np.s:262    .text.Speck3264KeySchedule:0000000000000000 Speck3264KeySchedule
     /tmp/cc3Lq9np.s:389    .text.Speck3264Encrypt:0000000000000000 $t
     /tmp/cc3Lq9np.s:396    .text.Speck3264Encrypt:0000000000000000 Speck3264Encrypt
     /tmp/cc3Lq9np.s:446    .text.Speck3264Decrypt:0000000000000000 $t
     /tmp/cc3Lq9np.s:453    .text.Speck3264Decrypt:0000000000000000 Speck3264Decrypt
     /tmp/cc3Lq9np.s:510    .text.Speck3264_EncryptBlock:0000000000000000 $t
     /tmp/cc3Lq9np.s:517    .text.Speck3264_EncryptBlock:0000000000000000 Speck3264_EncryptBlock

UNDEFINED SYMBOLS
memset