VPATH += :$(HALPATH)/stm32l5
VPATH += :$(HALPATH)/stm32l5/Src
SRC += stm32l5_hal.c \
       stm32l5xx_hal.c \
       stm32l5xx_hal_rcc.c \
       stm32l5xx_hal_rcc_ex.c \
       stm32l5xx_hal_gpio.c \
       stm32l5xx_hal_uart.c \
       stm32l5xx_hal_pwr.c \
       stm32l5xx_hal_pwr_ex.c \
       stm32l5xx_hal_cortex.c \
       stm32l5xx_hal_cryp.c \
       stm32l5xx_hal_cryp_ex.c

EXTRAINCDIRS += $(HALPATH)/stm32l5 $(HALPATH)/stm32l5/Inc $(HALPATH)/stm32l5/Inc/Legacy $(HALPATH)/stm32l5/CMSIS

ASRC += startup_stm32l562xx.S

MCU_FLAGS = -mcpu=cortex-m33

CC = arm-none-eabi-gcc
OBJCOPY = arm-none-eabi-objcopy
OBJDUMP = arm-none-eabi-objdump
SIZE = arm-none-eabi-size
AR = arm-none-eabi-ar rcs
NM = arm-none-eabi-nm

#Output Format = Binary for this target
FORMAT = binary

CFLAGS += -mthumb -fmessage-length=0 -ffunction-sections 
CPPFLAGS += -mthumb -fmessage-length=0 -ffunction-sections 
ASFLAGS += -mthumb -fmessage-length=0 -ffunction-sections

CDEFS += -DSTM32L562RGTx -DSTM32L5 -DSTM32 -DDEBUG -DSTM32L562xx
CPPDEFS += -DSTM32F562RGTx -DSTM32L5 -DSTM32 -DDEBUG

LDFLAGS += --specs=nano.specs -T $(HALPATH)/stm32l5/stm32l562xx.ld -Wl,--gc-sections -lm