1              		.cpu cortex-m4
   2              		.eabi_attribute 20, 1
   3              		.eabi_attribute 21, 1
   4              		.eabi_attribute 23, 3
   5              		.eabi_attribute 24, 1
   6              		.eabi_attribute 25, 1
   7              		.eabi_attribute 26, 1
   8              		.eabi_attribute 30, 4
   9              		.eabi_attribute 34, 1
  10              		.eabi_attribute 18, 4
  11              		.file	"speck3264.c"
  12              		.text
  13              	.Ltext0:
  14              		.cfi_sections	.debug_frame
  15              		.section	.text.Words16ToBytes,"ax",%progbits
  16              		.align	1
  17              		.global	Words16ToBytes
  18              		.arch armv7e-m
  19              		.syntax unified
  20              		.thumb
  21              		.thumb_func
  22              		.fpu softvfp
  24              	Words16ToBytes:
  25              	.LVL0:
  26              	.LFB3:
  27              		.file 1 "speck3264.c"
   1:speck3264.c   **** #include <stdio.h>
   2:speck3264.c   **** #include <stdint.h>
   3:speck3264.c   **** #include "speck.h"
   4:speck3264.c   **** 
   5:speck3264.c   **** 
   6:speck3264.c   **** void Words16ToBytes(u16 words[],u8 bytes[],int numwords)
   7:speck3264.c   **** {
  28              		.loc 1 7 1 view -0
  29              		.cfi_startproc
  30              		@ args = 0, pretend = 0, frame = 0
  31              		@ frame_needed = 0, uses_anonymous_args = 0
   8:speck3264.c   ****     int i,j=0;
  32              		.loc 1 8 5 view .LVU1
   9:speck3264.c   ****     for(i=0;i<numwords;i++){
  33              		.loc 1 9 5 view .LVU2
   7:speck3264.c   ****     int i,j=0;
  34              		.loc 1 7 1 is_stmt 0 view .LVU3
  35 0000 30B5     		push	{r4, r5, lr}
  36              	.LCFI0:
  37              		.cfi_def_cfa_offset 12
  38              		.cfi_offset 4, -12
  39              		.cfi_offset 5, -8
  40              		.cfi_offset 14, -4
  41 0002 0238     		subs	r0, r0, #2
  42              	.LVL1:
  43              		.loc 1 9 10 view .LVU4
  44 0004 0023     		movs	r3, #0
  10:speck3264.c   ****         bytes[j]=(u8)words[i];
  11:speck3264.c   ****         bytes[j+1]=(u8)(words[i]>>8);
  45              		.loc 1 11 19 view .LVU5
  46 0006 4D1C     		adds	r5, r1, #1
  47              	.LVL2:
  48              	.L2:
   9:speck3264.c   ****         bytes[j]=(u8)words[i];
  49              		.loc 1 9 14 is_stmt 1 discriminator 1 view .LVU6
  50 0008 9342     		cmp	r3, r2
  51 000a 00DB     		blt	.L3
  12:speck3264.c   ****         j+=2;
  13:speck3264.c   ****     }
  14:speck3264.c   **** }
  52              		.loc 1 14 1 is_stmt 0 view .LVU7
  53 000c 30BD     		pop	{r4, r5, pc}
  54              	.L3:
  10:speck3264.c   ****         bytes[j+1]=(u8)(words[i]>>8);
  55              		.loc 1 10 9 is_stmt 1 discriminator 3 view .LVU8
  10:speck3264.c   ****         bytes[j+1]=(u8)(words[i]>>8);
  56              		.loc 1 10 18 is_stmt 0 discriminator 3 view .LVU9
  57 000e 30F8024F 		ldrh	r4, [r0, #2]!
  58              	.LVL3:
  10:speck3264.c   ****         bytes[j+1]=(u8)(words[i]>>8);
  59              		.loc 1 10 18 discriminator 3 view .LVU10
  60 0012 01F81340 		strb	r4, [r1, r3, lsl #1]
  11:speck3264.c   ****         j+=2;
  61              		.loc 1 11 9 is_stmt 1 discriminator 3 view .LVU11
  11:speck3264.c   ****         j+=2;
  62              		.loc 1 11 20 is_stmt 0 discriminator 3 view .LVU12
  63 0016 0488     		ldrh	r4, [r0]
  64 0018 240A     		lsrs	r4, r4, #8
  65 001a 05F81340 		strb	r4, [r5, r3, lsl #1]
  12:speck3264.c   ****         j+=2;
  66              		.loc 1 12 9 is_stmt 1 discriminator 3 view .LVU13
  67              	.LVL4:
   9:speck3264.c   ****         bytes[j]=(u8)words[i];
  68              		.loc 1 9 25 discriminator 3 view .LVU14
  69 001e 0133     		adds	r3, r3, #1
  70              	.LVL5:
   9:speck3264.c   ****         bytes[j]=(u8)words[i];
  71              		.loc 1 9 25 is_stmt 0 discriminator 3 view .LVU15
  72 0020 F2E7     		b	.L2
  73              		.cfi_endproc
  74              	.LFE3:
  76              		.section	.text.BytesToWords16,"ax",%progbits
  77              		.align	1
  78              		.global	BytesToWords16
  79              		.syntax unified
  80              		.thumb
  81              		.thumb_func
  82              		.fpu softvfp
  84              	BytesToWords16:
  85              	.LVL6:
  86              	.LFB4:
  15:speck3264.c   **** 
  16:speck3264.c   **** void BytesToWords16(u8 bytes[],u16 words[],int numbytes)
  17:speck3264.c   **** {
  87              		.loc 1 17 1 is_stmt 1 view -0
  88              		.cfi_startproc
  89              		@ args = 0, pretend = 0, frame = 0
  90              		@ frame_needed = 0, uses_anonymous_args = 0
  18:speck3264.c   ****     int i,j=0; for(i=0;i<numbytes/2;i++){
  91              		.loc 1 18 5 view .LVU17
  92              		.loc 1 18 16 view .LVU18
  93              		.loc 1 18 34 is_stmt 0 view .LVU19
  94 0000 02EBD272 		add	r2, r2, r2, lsr #31
  95              	.LVL7:
  17:speck3264.c   ****     int i,j=0; for(i=0;i<numbytes/2;i++){
  96              		.loc 1 17 1 view .LVU20
  97 0004 70B5     		push	{r4, r5, r6, lr}
  98              	.LCFI1:
  99              		.cfi_def_cfa_offset 16
 100              		.cfi_offset 4, -16
 101              		.cfi_offset 5, -12
 102              		.cfi_offset 6, -8
 103              		.cfi_offset 14, -4
 104              		.loc 1 18 34 view .LVU21
 105 0006 5210     		asrs	r2, r2, #1
 106              		.loc 1 18 21 view .LVU22
 107 0008 0023     		movs	r3, #0
  19:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 108              		.loc 1 19 45 view .LVU23
 109 000a 451C     		adds	r5, r0, #1
 110              	.LVL8:
 111              	.L5:
  18:speck3264.c   ****     int i,j=0; for(i=0;i<numbytes/2;i++){
 112              		.loc 1 18 25 is_stmt 1 discriminator 1 view .LVU24
 113 000c 9A42     		cmp	r2, r3
 114 000e 00DC     		bgt	.L6
  20:speck3264.c   ****         j+=2;
  21:speck3264.c   ****     }
  22:speck3264.c   **** }
 115              		.loc 1 22 1 is_stmt 0 view .LVU25
 116 0010 70BD     		pop	{r4, r5, r6, pc}
 117              	.L6:
  19:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 118              		.loc 1 19 9 is_stmt 1 discriminator 3 view .LVU26
  19:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 119              		.loc 1 19 35 is_stmt 0 discriminator 3 view .LVU27
 120 0012 15F81360 		ldrb	r6, [r5, r3, lsl #1]	@ zero_extendqisi2
  19:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 121              		.loc 1 19 28 discriminator 3 view .LVU28
 122 0016 10F81340 		ldrb	r4, [r0, r3, lsl #1]	@ zero_extendqisi2
  19:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 123              		.loc 1 19 32 discriminator 3 view .LVU29
 124 001a 44EA0624 		orr	r4, r4, r6, lsl #8
  19:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 125              		.loc 1 19 17 discriminator 3 view .LVU30
 126 001e 21F81340 		strh	r4, [r1, r3, lsl #1]	@ movhi
  20:speck3264.c   ****         j+=2;
 127              		.loc 1 20 9 is_stmt 1 discriminator 3 view .LVU31
 128              	.LVL9:
  18:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 129              		.loc 1 18 38 discriminator 3 view .LVU32
 130 0022 0133     		adds	r3, r3, #1
 131              	.LVL10:
  18:speck3264.c   ****         words[i]=(u16)bytes[j] | ((u16)bytes[j+1]<<8);
 132              		.loc 1 18 38 is_stmt 0 discriminator 3 view .LVU33
 133 0024 F2E7     		b	.L5
 134              		.cfi_endproc
 135              	.LFE4:
 137              		.section	.text.Speck3264KeySchedule,"ax",%progbits
 138              		.align	1
 139              		.global	Speck3264KeySchedule
 140              		.syntax unified
 141              		.thumb
 142              		.thumb_func
 143              		.fpu softvfp
 145              	Speck3264KeySchedule:
 146              	.LVL11:
 147              	.LFB5:
  23:speck3264.c   **** 
  24:speck3264.c   **** void Speck3264KeySchedule(u16 K[],u16 rk[])
  25:speck3264.c   **** {
 148              		.loc 1 25 1 is_stmt 1 view -0
 149              		.cfi_startproc
 150              		@ args = 0, pretend = 0, frame = 0
 151              		@ frame_needed = 0, uses_anonymous_args = 0
  26:speck3264.c   ****     u16 i,D=K[3],C=K[2],B=K[1],A=K[0];
 152              		.loc 1 26 5 view .LVU35
  25:speck3264.c   ****     u16 i,D=K[3],C=K[2],B=K[1],A=K[0];
 153              		.loc 1 25 1 is_stmt 0 view .LVU36
 154 0000 F0B5     		push	{r4, r5, r6, r7, lr}
 155              	.LCFI2:
 156              		.cfi_def_cfa_offset 20
 157              		.cfi_offset 4, -20
 158              		.cfi_offset 5, -16
 159              		.cfi_offset 6, -12
 160              		.cfi_offset 7, -8
 161              		.cfi_offset 14, -4
 162              		.loc 1 26 32 view .LVU37
 163 0002 0388     		ldrh	r3, [r0]
 164              		.loc 1 26 11 view .LVU38
 165 0004 C788     		ldrh	r7, [r0, #6]
 166              	.LVL12:
 167              		.loc 1 26 18 view .LVU39
 168 0006 8488     		ldrh	r4, [r0, #4]
 169              	.LVL13:
 170              		.loc 1 26 25 view .LVU40
 171 0008 4688     		ldrh	r6, [r0, #2]
 172              	.LVL14:
  27:speck3264.c   ****     for(i=0;i<22;){
 173              		.loc 1 27 5 is_stmt 1 view .LVU41
 174              		.loc 1 27 14 view .LVU42
  26:speck3264.c   ****     u16 i,D=K[3],C=K[2],B=K[1],A=K[0];
 175              		.loc 1 26 32 is_stmt 0 view .LVU43
 176 000a 0025     		movs	r5, #0
 177              	.LVL15:
 178              	.L8:
  28:speck3264.c   ****         rk[i]=A;
  29:speck3264.c   ****         ER16(B,A,i++);
 179              		.loc 1 29 9 view .LVU44
 180 000c 7202     		lsls	r2, r6, #9
 181 000e 92B2     		uxth	r2, r2
 182 0010 42EAD612 		orr	r2, r2, r6, lsr #7
 183 0014 1A44     		add	r2, r2, r3
 184 0016 A8B2     		uxth	r0, r5
 185              	.LVL16:
  28:speck3264.c   ****         rk[i]=A;
 186              		.loc 1 28 9 is_stmt 1 view .LVU45
 187              		.loc 1 29 9 is_stmt 0 view .LVU46
 188 0018 92B2     		uxth	r2, r2
 189 001a 82EA0006 		eor	r6, r2, r0
 190              	.LVL17:
 191              		.loc 1 29 9 view .LVU47
 192 001e 9A00     		lsls	r2, r3, #2
 193 0020 92B2     		uxth	r2, r2
  28:speck3264.c   ****         rk[i]=A;
 194              		.loc 1 28 14 view .LVU48
 195 0022 0B80     		strh	r3, [r1]	@ movhi
 196              		.loc 1 29 9 is_stmt 1 view .LVU49
 197              	.LVL18:
 198              		.loc 1 29 9 is_stmt 0 view .LVU50
 199 0024 42EA9332 		orr	r2, r2, r3, lsr #14
 200              	.LVL19:
  30:speck3264.c   ****         rk[i]=A;
  31:speck3264.c   ****         ER16(C,A,i++);
 201              		.loc 1 31 9 view .LVU51
 202 0028 6302     		lsls	r3, r4, #9
  29:speck3264.c   ****         rk[i]=A;
 203              		.loc 1 29 9 view .LVU52
 204 002a 7240     		eors	r2, r2, r6
 205              	.LVL20:
  30:speck3264.c   ****         rk[i]=A;
 206              		.loc 1 30 9 is_stmt 1 view .LVU53
 207 002c 9BB2     		uxth	r3, r3
 208              		.loc 1 31 9 is_stmt 0 view .LVU54
 209 002e 43EAD413 		orr	r3, r3, r4, lsr #7
 210 0032 4FEA820C 		lsl	ip, r2, #2
 211 0036 1344     		add	r3, r3, r2
 212 0038 441C     		adds	r4, r0, #1
 213              	.LVL21:
 214              		.loc 1 31 9 view .LVU55
 215 003a 1FFA8CFC 		uxth	ip, ip
  30:speck3264.c   ****         rk[i]=A;
 216              		.loc 1 30 14 view .LVU56
 217 003e 4A80     		strh	r2, [r1, #2]	@ movhi
 218              		.loc 1 31 9 is_stmt 1 view .LVU57
 219              	.LVL22:
 220              		.loc 1 31 9 is_stmt 0 view .LVU58
 221 0040 5C40     		eors	r4, r4, r3
 222 0042 4CEA923C 		orr	ip, ip, r2, lsr #14
  32:speck3264.c   ****         rk[i]=A;
  33:speck3264.c   ****         ER16(D,A,i++);
 223              		.loc 1 33 9 view .LVU59
 224 0046 7A02     		lsls	r2, r7, #9
 225              	.LVL23:
  31:speck3264.c   ****         rk[i]=A;
 226              		.loc 1 31 9 view .LVU60
 227 0048 A4B2     		uxth	r4, r4
 228              	.LVL24:
  31:speck3264.c   ****         rk[i]=A;
 229              		.loc 1 31 9 view .LVU61
 230 004a 92B2     		uxth	r2, r2
 231 004c 84EA0C0C 		eor	ip, r4, ip
 232              	.LVL25:
  32:speck3264.c   ****         rk[i]=A;
 233              		.loc 1 32 9 is_stmt 1 view .LVU62
 234              		.loc 1 33 9 is_stmt 0 view .LVU63
 235 0050 42EAD712 		orr	r2, r2, r7, lsr #7
 236 0054 6244     		add	r2, r2, ip
 237 0056 0230     		adds	r0, r0, #2
 238              	.LVL26:
 239              		.loc 1 33 9 view .LVU64
 240 0058 4FEA8C03 		lsl	r3, ip, #2
 241 005c 5040     		eors	r0, r0, r2
 242              	.LVL27:
 243              		.loc 1 33 9 view .LVU65
 244 005e 9BB2     		uxth	r3, r3
  27:speck3264.c   ****         rk[i]=A;
 245              		.loc 1 27 14 view .LVU66
 246 0060 0335     		adds	r5, r5, #3
 247              	.LVL28:
 248              		.loc 1 33 9 view .LVU67
 249 0062 87B2     		uxth	r7, r0
 250              	.LVL29:
 251              		.loc 1 33 9 view .LVU68
 252 0064 43EA9C33 		orr	r3, r3, ip, lsr #14
  27:speck3264.c   ****         rk[i]=A;
 253              		.loc 1 27 14 view .LVU69
 254 0068 182D     		cmp	r5, #24
  32:speck3264.c   ****         rk[i]=A;
 255              		.loc 1 32 14 view .LVU70
 256 006a A1F804C0 		strh	ip, [r1, #4]	@ movhi
 257              		.loc 1 33 9 is_stmt 1 view .LVU71
 258              	.LVL30:
 259              		.loc 1 33 9 is_stmt 0 view .LVU72
 260 006e 83EA0703 		eor	r3, r3, r7
 261              	.LVL31:
  27:speck3264.c   ****         rk[i]=A;
 262              		.loc 1 27 14 is_stmt 1 view .LVU73
 263 0072 01F10601 		add	r1, r1, #6
 264 0076 C9D1     		bne	.L8
  34:speck3264.c   ****     }
  35:speck3264.c   **** 
  36:speck3264.c   ****     /* DEBUG
  37:speck3264.c   ****     for(i=0;i<22;){
  38:speck3264.c   **** 
  39:speck3264.c   ****         printf("A = 0x%x ; B = 0x%x ; C = 0x%x ; D = 0x%x\n", A, B, C, D);
  40:speck3264.c   **** 
  41:speck3264.c   ****         rk[i]=A;
  42:speck3264.c   ****         ER16(B,A,i++);
  43:speck3264.c   ****         printf("rk[%d] =  0x%x\n", i-1, A);
  44:speck3264.c   **** 
  45:speck3264.c   ****         printf("A = 0x%x ; B = 0x%x ; C = 0x%x ; D = 0x%x\n", A, B, C, D);
  46:speck3264.c   ****         rk[i]=A;
  47:speck3264.c   ****         ER16(C,A,i++);
  48:speck3264.c   ****         printf("rk[%d] =  0x%x\n", i-1, A);
  49:speck3264.c   **** 
  50:speck3264.c   ****         printf("A = 0x%x ; B = 0x%x ; C = 0x%x ; D = 0x%x\n", A, B, C, D);
  51:speck3264.c   ****         rk[i]=A;
  52:speck3264.c   ****         ER16(D,A,i++);
  53:speck3264.c   ****         printf("rk[%d] =  0x%x\n  <- D = 0x%x", i-1, A, D);
  54:speck3264.c   ****         printf("----------------------\n");
  55:speck3264.c   ****     }
  56:speck3264.c   ****     */
  57:speck3264.c   **** }
 265              		.loc 1 57 1 is_stmt 0 view .LVU74
 266 0078 F0BD     		pop	{r4, r5, r6, r7, pc}
 267              		.loc 1 57 1 view .LVU75
 268              		.cfi_endproc
 269              	.LFE5:
 271              		.section	.text.Speck3264Encrypt,"ax",%progbits
 272              		.align	1
 273              		.global	Speck3264Encrypt
 274              		.syntax unified
 275              		.thumb
 276              		.thumb_func
 277              		.fpu softvfp
 279              	Speck3264Encrypt:
 280              	.LVL32:
 281              	.LFB6:
  58:speck3264.c   **** 
  59:speck3264.c   **** 
  60:speck3264.c   **** void Speck3264Encrypt(u16 Pt[],u16 Ct[],u16 rk[])
  61:speck3264.c   **** {
 282              		.loc 1 61 1 is_stmt 1 view -0
 283              		.cfi_startproc
 284              		@ args = 0, pretend = 0, frame = 0
 285              		@ frame_needed = 0, uses_anonymous_args = 0
  62:speck3264.c   ****     u16 i;
 286              		.loc 1 62 5 view .LVU77
  63:speck3264.c   ****     Ct[0]=Pt[0]; Ct[1]=Pt[1];
 287              		.loc 1 63 5 view .LVU78
 288              		.loc 1 63 13 is_stmt 0 view .LVU79
 289 0000 0388     		ldrh	r3, [r0]
 290              		.loc 1 63 10 view .LVU80
 291 0002 0B80     		strh	r3, [r1]	@ movhi
 292              		.loc 1 63 18 is_stmt 1 view .LVU81
 293              		.loc 1 63 23 is_stmt 0 view .LVU82
 294 0004 4388     		ldrh	r3, [r0, #2]
 295 0006 4B80     		strh	r3, [r1, #2]	@ movhi
  64:speck3264.c   **** 
  65:speck3264.c   ****     // full 22  rounds
  66:speck3264.c   ****     // for(i=0;i<22;) ;
  67:speck3264.c   ****     //er16(ct[1],ct[0],rk[0]);
  68:speck3264.c   ****     for(i=0;i<22;) {
 296              		.loc 1 68 5 is_stmt 1 view .LVU83
 297              	.LVL33:
 298              		.loc 1 68 14 view .LVU84
  61:speck3264.c   ****     u16 i;
 299              		.loc 1 61 1 is_stmt 0 view .LVU85
 300 0008 30B5     		push	{r4, r5, lr}
 301              	.LCFI3:
 302              		.cfi_def_cfa_offset 12
 303              		.cfi_offset 4, -12
 304              		.cfi_offset 5, -8
 305              		.cfi_offset 14, -4
 306 000a 941E     		subs	r4, r2, #2
 307 000c 2A32     		adds	r2, r2, #42
 308              	.LVL34:
 309              	.L11:
  69:speck3264.c   ****         //er16(ct[1],ct[0],0xdead);
  70:speck3264.c   ****         ER16(Ct[1],Ct[0],rk[i++]);
 310              		.loc 1 70 9 is_stmt 1 view .LVU86
 311 000e 4888     		ldrh	r0, [r1, #2]
 312 0010 0D88     		ldrh	r5, [r1]
 313 0012 4302     		lsls	r3, r0, #9
 314 0014 43EAD013 		orr	r3, r3, r0, lsr #7
 315 0018 2B44     		add	r3, r3, r5
 316 001a 9BB2     		uxth	r3, r3
 317 001c 4B80     		strh	r3, [r1, #2]	@ movhi
 318              	.LVL35:
 319              		.loc 1 70 9 is_stmt 0 view .LVU87
 320 001e 34F8020F 		ldrh	r0, [r4, #2]!
 321              	.LVL36:
 322              		.loc 1 70 9 view .LVU88
 323 0022 4340     		eors	r3, r3, r0
 324 0024 A800     		lsls	r0, r5, #2
 325 0026 40EA9530 		orr	r0, r0, r5, lsr #14
 326 002a 4B80     		strh	r3, [r1, #2]	@ movhi
  68:speck3264.c   ****         //er16(ct[1],ct[0],0xdead);
 327              		.loc 1 68 14 view .LVU89
 328 002c A242     		cmp	r2, r4
 329              		.loc 1 70 9 view .LVU90
 330 002e 83EA0003 		eor	r3, r3, r0
 331 0032 0B80     		strh	r3, [r1]	@ movhi
  68:speck3264.c   ****         //er16(ct[1],ct[0],0xdead);
 332              		.loc 1 68 14 is_stmt 1 view .LVU91
 333 0034 EBD1     		bne	.L11
  71:speck3264.c   **** #ifndef ARM
  72:speck3264.c   ****         printf("( c1=0x%x, c0=0x%x, k=0x%x )\n", Ct[1], Ct[0], rk[i]);
  73:speck3264.c   **** #endif
  74:speck3264.c   **** 
  75:speck3264.c   ****     }
  76:speck3264.c   **** }
 334              		.loc 1 76 1 is_stmt 0 view .LVU92
 335 0036 30BD     		pop	{r4, r5, pc}
 336              		.loc 1 76 1 view .LVU93
 337              		.cfi_endproc
 338              	.LFE6:
 340              		.section	.text.Speck3264Decrypt,"ax",%progbits
 341              		.align	1
 342              		.global	Speck3264Decrypt
 343              		.syntax unified
 344              		.thumb
 345              		.thumb_func
 346              		.fpu softvfp
 348              	Speck3264Decrypt:
 349              	.LVL37:
 350              	.LFB7:
  77:speck3264.c   **** 
  78:speck3264.c   **** 
  79:speck3264.c   **** void Speck3264Decrypt(u16 Pt[],u16 Ct[],u16 rk[])
  80:speck3264.c   **** {
 351              		.loc 1 80 1 is_stmt 1 view -0
 352              		.cfi_startproc
 353              		@ args = 0, pretend = 0, frame = 0
 354              		@ frame_needed = 0, uses_anonymous_args = 0
  81:speck3264.c   ****     int i;
 355              		.loc 1 81 5 view .LVU95
  82:speck3264.c   ****     Pt[0]=Ct[0]; Pt[1]=Ct[1];
 356              		.loc 1 82 5 view .LVU96
 357              		.loc 1 82 13 is_stmt 0 view .LVU97
 358 0000 0B88     		ldrh	r3, [r1]
 359              		.loc 1 82 10 view .LVU98
 360 0002 0380     		strh	r3, [r0]	@ movhi
 361              		.loc 1 82 18 is_stmt 1 view .LVU99
 362              		.loc 1 82 23 is_stmt 0 view .LVU100
 363 0004 4B88     		ldrh	r3, [r1, #2]
 364 0006 4380     		strh	r3, [r0, #2]	@ movhi
  83:speck3264.c   **** 
  84:speck3264.c   ****     for(i=21;i>=0;) DR16(Pt[1],Pt[0],rk[i--]);
 365              		.loc 1 84 5 is_stmt 1 view .LVU101
 366              	.LVL38:
 367              		.loc 1 84 15 view .LVU102
  80:speck3264.c   ****     int i;
 368              		.loc 1 80 1 is_stmt 0 view .LVU103
 369 0008 30B5     		push	{r4, r5, lr}
 370              	.LCFI4:
 371              		.cfi_def_cfa_offset 12
 372              		.cfi_offset 4, -12
 373              		.cfi_offset 5, -8
 374              		.cfi_offset 14, -4
 375 000a 02F12C05 		add	r5, r2, #44
 376              	.LVL39:
 377              	.L14:
 378              		.loc 1 84 21 is_stmt 1 discriminator 3 view .LVU104
 379 000e 4388     		ldrh	r3, [r0, #2]
 380 0010 0488     		ldrh	r4, [r0]
 381 0012 5C40     		eors	r4, r4, r3
 382 0014 A103     		lsls	r1, r4, #14
 383 0016 41EA9401 		orr	r1, r1, r4, lsr #2
 384 001a 89B2     		uxth	r1, r1
 385 001c 0180     		strh	r1, [r0]	@ movhi
 386              		.loc 1 84 21 is_stmt 0 discriminator 3 view .LVU105
 387 001e 35F8024D 		ldrh	r4, [r5, #-2]!
 388 0022 6340     		eors	r3, r3, r4
 389 0024 5B1A     		subs	r3, r3, r1
 390 0026 99B2     		uxth	r1, r3
 391 0028 C3F34623 		ubfx	r3, r3, #9, #7
 392 002c 43EAC113 		orr	r3, r3, r1, lsl #7
 393              		.loc 1 84 15 discriminator 3 view .LVU106
 394 0030 AA42     		cmp	r2, r5
 395              		.loc 1 84 21 discriminator 3 view .LVU107
 396 0032 4380     		strh	r3, [r0, #2]	@ movhi
 397              		.loc 1 84 15 is_stmt 1 discriminator 3 view .LVU108
 398 0034 EBD1     		bne	.L14
  85:speck3264.c   **** }
 399              		.loc 1 85 1 is_stmt 0 view .LVU109
 400 0036 30BD     		pop	{r4, r5, pc}
 401              		.cfi_endproc
 402              	.LFE7:
 404              		.section	.text.Speck3264_EncryptBlock,"ax",%progbits
 405              		.align	1
 406              		.global	Speck3264_EncryptBlock
 407              		.syntax unified
 408              		.thumb
 409              		.thumb_func
 410              		.fpu softvfp
 412              	Speck3264_EncryptBlock:
 413              	.LVL40:
 414              	.LFB8:
  86:speck3264.c   **** 
  87:speck3264.c   **** 
  88:speck3264.c   **** void Speck3264_EncryptBlock(u8 pt[], u8 k[], u8 ct[]) {
 415              		.loc 1 88 55 is_stmt 1 view -0
 416              		.cfi_startproc
 417              		@ args = 0, pretend = 0, frame = 88
 418              		@ frame_needed = 0, uses_anonymous_args = 0
  89:speck3264.c   **** 
  90:speck3264.c   ****     u16 Pt[2] = {0};
 419              		.loc 1 90 5 view .LVU111
  88:speck3264.c   **** 
 420              		.loc 1 88 55 is_stmt 0 view .LVU112
 421 0000 F0B5     		push	{r4, r5, r6, r7, lr}
 422              	.LCFI5:
 423              		.cfi_def_cfa_offset 20
 424              		.cfi_offset 4, -20
 425              		.cfi_offset 5, -16
 426              		.cfi_offset 6, -12
 427              		.cfi_offset 7, -8
 428              		.cfi_offset 14, -4
 429              		.loc 1 90 9 view .LVU113
 430 0002 0024     		movs	r4, #0
  88:speck3264.c   **** 
 431              		.loc 1 88 55 view .LVU114
 432 0004 97B0     		sub	sp, sp, #92
 433              	.LCFI6:
 434              		.cfi_def_cfa_offset 112
  88:speck3264.c   **** 
 435              		.loc 1 88 55 view .LVU115
 436 0006 0746     		mov	r7, r0
 437 0008 0E46     		mov	r6, r1
 438 000a 1546     		mov	r5, r2
  91:speck3264.c   ****     u16 K[4] = {0};
  92:speck3264.c   ****     u16 rk[34] = {0};
 439              		.loc 1 92 9 view .LVU116
 440 000c 2146     		mov	r1, r4
 441              	.LVL41:
 442              		.loc 1 92 9 view .LVU117
 443 000e 4422     		movs	r2, #68
 444              	.LVL42:
 445              		.loc 1 92 9 view .LVU118
 446 0010 05A8     		add	r0, sp, #20
 447              	.LVL43:
  91:speck3264.c   ****     u16 K[4] = {0};
 448              		.loc 1 91 9 view .LVU119
 449 0012 CDE90344 		strd	r4, r4, [sp, #12]
  90:speck3264.c   ****     u16 K[4] = {0};
 450              		.loc 1 90 9 view .LVU120
 451 0016 0194     		str	r4, [sp, #4]
  91:speck3264.c   ****     u16 K[4] = {0};
 452              		.loc 1 91 5 is_stmt 1 view .LVU121
 453              		.loc 1 92 5 view .LVU122
 454              		.loc 1 92 9 is_stmt 0 view .LVU123
 455 0018 FFF7FEFF 		bl	memset
 456              	.LVL44:
  93:speck3264.c   ****     u16 Ct[2] = {0};
 457              		.loc 1 93 5 is_stmt 1 view .LVU124
  94:speck3264.c   **** 
  95:speck3264.c   ****     BytesToWords16(pt,Pt,8);
 458              		.loc 1 95 5 is_stmt 0 view .LVU125
 459 001c 01A9     		add	r1, sp, #4
 460 001e 3846     		mov	r0, r7
 461 0020 0822     		movs	r2, #8
  93:speck3264.c   ****     u16 Ct[2] = {0};
 462              		.loc 1 93 9 view .LVU126
 463 0022 0294     		str	r4, [sp, #8]
 464              		.loc 1 95 5 is_stmt 1 view .LVU127
 465 0024 FFF7FEFF 		bl	BytesToWords16
 466              	.LVL45:
  96:speck3264.c   ****     BytesToWords16(k,K,16);
 467              		.loc 1 96 5 view .LVU128
 468 0028 1022     		movs	r2, #16
 469 002a 03A9     		add	r1, sp, #12
 470 002c 3046     		mov	r0, r6
 471 002e FFF7FEFF 		bl	BytesToWords16
 472              	.LVL46:
  97:speck3264.c   **** 
  98:speck3264.c   **** 
  99:speck3264.c   ****     Speck3264KeySchedule(K,rk);
 473              		.loc 1 99 5 view .LVU129
 474 0032 05A9     		add	r1, sp, #20
 475 0034 03A8     		add	r0, sp, #12
 476 0036 FFF7FEFF 		bl	Speck3264KeySchedule
 477              	.LVL47:
 100:speck3264.c   **** 
 101:speck3264.c   ****     // DEBUG Purposes
 102:speck3264.c   **** 
 103:speck3264.c   **** #ifndef ARM
 104:speck3264.c   ****     for (int i=0; i < 16; i++)
 105:speck3264.c   ****     {
 106:speck3264.c   ****         printf("Key: 0x%x\n", rk[i]);
 107:speck3264.c   ****     }
 108:speck3264.c   **** #endif
 109:speck3264.c   ****     Speck3264Encrypt(Pt,Ct,rk);
 478              		.loc 1 109 5 view .LVU130
 479 003a 05AA     		add	r2, sp, #20
 480 003c 02A9     		add	r1, sp, #8
 481 003e 01A8     		add	r0, sp, #4
 482 0040 FFF7FEFF 		bl	Speck3264Encrypt
 483              	.LVL48:
 110:speck3264.c   ****     Words16ToBytes(Ct,ct,2);
 484              		.loc 1 110 5 view .LVU131
 485 0044 0222     		movs	r2, #2
 486 0046 2946     		mov	r1, r5
 487 0048 02A8     		add	r0, sp, #8
 488 004a FFF7FEFF 		bl	Words16ToBytes
 489              	.LVL49:
 111:speck3264.c   **** }
 490              		.loc 1 111 1 is_stmt 0 view .LVU132
 491 004e 17B0     		add	sp, sp, #92
 492              	.LCFI7:
 493              		.cfi_def_cfa_offset 20
 494              		@ sp needed
 495 0050 F0BD     		pop	{r4, r5, r6, r7, pc}
 496              		.loc 1 111 1 view .LVU133
 497              		.cfi_endproc
 498              	.LFE8:
 500              		.text
 501              	.Letext0:
 502              		.file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
 503              		.file 3 "/usr/arm-none-eabi/include/sys/_stdint.h"
 504              		.file 4 "<built-in>"
DEFINED SYMBOLS
                            *ABS*:0000000000000000 speck3264.c
     /tmp/cc1zOjum.s:16     .text.Words16ToBytes:0000000000000000 $t
     /tmp/cc1zOjum.s:24     .text.Words16ToBytes:0000000000000000 Words16ToBytes
     /tmp/cc1zOjum.s:77     .text.BytesToWords16:0000000000000000 $t
     /tmp/cc1zOjum.s:84     .text.BytesToWords16:0000000000000000 BytesToWords16
     /tmp/cc1zOjum.s:138    .text.Speck3264KeySchedule:0000000000000000 $t
     /tmp/cc1zOjum.s:145    .text.Speck3264KeySchedule:0000000000000000 Speck3264KeySchedule
     /tmp/cc1zOjum.s:272    .text.Speck3264Encrypt:0000000000000000 $t
     /tmp/cc1zOjum.s:279    .text.Speck3264Encrypt:0000000000000000 Speck3264Encrypt
     /tmp/cc1zOjum.s:341    .text.Speck3264Decrypt:0000000000000000 $t
     /tmp/cc1zOjum.s:348    .text.Speck3264Decrypt:0000000000000000 Speck3264Decrypt
     /tmp/cc1zOjum.s:405    .text.Speck3264_EncryptBlock:0000000000000000 $t
     /tmp/cc1zOjum.s:412    .text.Speck3264_EncryptBlock:0000000000000000 Speck3264_EncryptBlock

UNDEFINED SYMBOLS
memset